1*2822c791SNishanth Menon// SPDX-License-Identifier: GPL-2.0-only OR MIT 24201af25SNishanth Menon/* 34201af25SNishanth Menon * Device Tree Source for AM6 SoC Family Wakeup Domain peripherals 44201af25SNishanth Menon * 5*2822c791SNishanth Menon * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 64201af25SNishanth Menon */ 74201af25SNishanth Menon 84201af25SNishanth Menon&cbass_wakeup { 99d3c9378SNishanth Menon dmsc: system-controller@44083000 { 10f5a5d83fSLokesh Vutla compatible = "ti,am654-sci"; 1142e54f64SNishanth Menon ti,host-id = <12>; 1242e54f64SNishanth Menon 1342e54f64SNishanth Menon mbox-names = "rx", "tx"; 1442e54f64SNishanth Menon 1542e54f64SNishanth Menon mboxes = <&secure_proxy_main 11>, 1642e54f64SNishanth Menon <&secure_proxy_main 13>; 1742e54f64SNishanth Menon 18830454bbSNishanth Menon reg-names = "debug_messages"; 19830454bbSNishanth Menon reg = <0x44083000 0x1000>; 20830454bbSNishanth Menon 2142e54f64SNishanth Menon k3_pds: power-controller { 2242e54f64SNishanth Menon compatible = "ti,sci-pm-domain"; 23c68272cbSLokesh Vutla #power-domain-cells = <2>; 2442e54f64SNishanth Menon }; 2542e54f64SNishanth Menon 26a0812885SNishanth Menon k3_clks: clock-controller { 2742e54f64SNishanth Menon compatible = "ti,k2g-sci-clk"; 2842e54f64SNishanth Menon #clock-cells = <2>; 2942e54f64SNishanth Menon }; 3042e54f64SNishanth Menon 3142e54f64SNishanth Menon k3_reset: reset-controller { 3242e54f64SNishanth Menon compatible = "ti,sci-reset"; 3342e54f64SNishanth Menon #reset-cells = <2>; 3442e54f64SNishanth Menon }; 3542e54f64SNishanth Menon }; 3642e54f64SNishanth Menon 378121e931SAndrew Davis wkup_conf: bus@43000000 { 388121e931SAndrew Davis compatible = "simple-bus"; 398121e931SAndrew Davis #address-cells = <1>; 408121e931SAndrew Davis #size-cells = <1>; 418121e931SAndrew Davis ranges = <0x0 0x43000000 0x20000>; 428121e931SAndrew Davis 438121e931SAndrew Davis chipid: chipid@14 { 4432369aa1SGrygorii Strashko compatible = "ti,am654-chipid"; 458121e931SAndrew Davis reg = <0x14 0x4>; 468121e931SAndrew Davis }; 4732369aa1SGrygorii Strashko }; 4832369aa1SGrygorii Strashko 49dcccf770SNishanth Menon wkup_pmx0: pinctrl@4301c000 { 501d79b437STero Kristo compatible = "pinctrl-single"; 511d79b437STero Kristo reg = <0x4301c000 0x118>; 521d79b437STero Kristo #pinctrl-cells = <1>; 531d79b437STero Kristo pinctrl-single,register-width = <32>; 541d79b437STero Kristo pinctrl-single,function-mask = <0xffffffff>; 551d79b437STero Kristo }; 561d79b437STero Kristo 574201af25SNishanth Menon wkup_uart0: serial@42300000 { 584201af25SNishanth Menon compatible = "ti,am654-uart"; 598588eac3SVignesh R reg = <0x42300000 0x100>; 604201af25SNishanth Menon interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>; 614201af25SNishanth Menon clock-frequency = <48000000>; 62c68272cbSLokesh Vutla power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>; 6365e8781aSAndrew Davis status = "disabled"; 644201af25SNishanth Menon }; 6519a1768fSVignesh R 6619a1768fSVignesh R wkup_i2c0: i2c@42120000 { 6719a1768fSVignesh R compatible = "ti,am654-i2c", "ti,omap4-i2c"; 6819a1768fSVignesh R reg = <0x42120000 0x100>; 6919a1768fSVignesh R interrupts = <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>; 7019a1768fSVignesh R #address-cells = <1>; 7119a1768fSVignesh R #size-cells = <0>; 7219a1768fSVignesh R clock-names = "fck"; 7319a1768fSVignesh R clocks = <&k3_clks 115 1>; 74c68272cbSLokesh Vutla power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>; 75c0a5ba87SAndrew Davis status = "disabled"; 7619a1768fSVignesh R }; 775fec389fSLokesh Vutla 78cab12badSNishanth Menon intr_wkup_gpio: interrupt-controller@42200000 { 795fec389fSLokesh Vutla compatible = "ti,sci-intr"; 80cab12badSNishanth Menon reg = <0x42200000 0x200>; 815fec389fSLokesh Vutla ti,intr-trigger-type = <1>; 825fec389fSLokesh Vutla interrupt-controller; 835fec389fSLokesh Vutla interrupt-parent = <&gic500>; 84fef84512SLokesh Vutla #interrupt-cells = <1>; 855fec389fSLokesh Vutla ti,sci = <&dmsc>; 86fef84512SLokesh Vutla ti,sci-dev-id = <156>; 87fef84512SLokesh Vutla ti,interrupt-ranges = <0 712 16>; 885fec389fSLokesh Vutla }; 897a558c46SKeerthy 9091e5f404SNishanth Menon wkup_gpio0: gpio@42110000 { 917a558c46SKeerthy compatible = "ti,am654-gpio", "ti,keystone-gpio"; 927a558c46SKeerthy reg = <0x42110000 0x100>; 937a558c46SKeerthy gpio-controller; 947a558c46SKeerthy #gpio-cells = <2>; 957a558c46SKeerthy interrupt-parent = <&intr_wkup_gpio>; 96fef84512SLokesh Vutla interrupts = <60>, <61>, <62>, <63>; 977a558c46SKeerthy interrupt-controller; 987a558c46SKeerthy #interrupt-cells = <2>; 997a558c46SKeerthy ti,ngpio = <56>; 1007a558c46SKeerthy ti,davinci-gpio-unbanked = <0>; 1017a558c46SKeerthy clocks = <&k3_clks 59 0>; 1027a558c46SKeerthy clock-names = "gpio"; 1037a558c46SKeerthy }; 1047fd28c6aSKeerthy 1059a8ecd41SNishanth Menon wkup_vtm0: temperature-sensor@42050000 { 1067fd28c6aSKeerthy compatible = "ti,am654-vtm"; 1077fd28c6aSKeerthy reg = <0x42050000 0x25c>; 1087fd28c6aSKeerthy power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>; 1097fd28c6aSKeerthy #thermal-sensor-cells = <1>; 1107fd28c6aSKeerthy }; 1114201af25SNishanth Menon}; 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