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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dqcom,sm8250-camss.yaml113 port@0:
308 reg = <0 0xac6a000 0 0x2000>,
309 <0 0xac6c000 0 0x2000>,
310 <0 0xac6e000 0 0x1000>,
311 <0 0xac70000 0 0x1000>,
312 <0 0xac72000 0 0x1000>,
313 <0 0xac74000 0 0x1000>,
314 <0 0xacb4000 0 0xd000>,
315 <0 0xacc3000 0 0xd000>,
316 <0 0xacd9000 0 0x2200>,
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/stingray/
H A Dstingray-pcie.dtsi8 reg = <0 0x60400000 0 0x1000>;
11 bus-range = <0x0 0x1>;
16 ranges = <0x83000000 0 0x10000000 0
[all...]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dt1024si-post.dtsi48 ranges = <0x0 0xf 0xfe140000 0x40000>;
49 reg = <0xf 0xfe140000 0 0x480>;
52 brg-frequency = <0>;
53 bus-frequency = <0>;
60 reg = <0x180000 1000>;
61 interrupts = <74 2 0 0>;
69 #address-cells = <0>;
71 reg = <0x80 0x80>;
72 interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78
77 reg = <0x2000 0x200>;
[all …]
H A Dp1021si-post.dtsi39 interrupts = <19 2 0 0>,
40 <16 2 0 0>;
43 /* controller at 0x9000 */
49 bus-range = <0 255>;
51 interrupts = <16 2 0 0>;
53 pcie@0 {
54 reg = <0 0 0 0 0>;
59 interrupts = <16 2 0 0>;
60 interrupt-map-mask = <0xf800 0 0 7>;
62 /* IDSEL 0x0 */
[all …]
H A Dmpc8569si-post.dtsi39 interrupts = <19 2 0 0>;
40 sleep = <&pmc 0x08000000>;
43 /* controller at 0xa000 */
49 bus-range = <0 255>;
51 interrupts = <26 2 0 0>;
52 sleep = <&pmc 0x20000000>;
54 pcie@0 {
55 reg = <0 0 0 0 0>;
60 interrupts = <26 2 0 0>;
61 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dqcom,msm8996-qmp-pcie-phy.yaml57 "^phy@[0-9a-f]+$":
92 const: 0
98 const: 0
130 reg = <0x34000 0x488>;
133 ranges = <0x0 0x34000 0x4000>;
149 reg = <0x1000 0x130>,
150 <0x1200 0x200>,
151 <0x1400 0x1dc>;
156 #clock-cells = <0>;
159 #phy-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Da4m072.dts27 ranges = <0 0xf0000000 0x0000c000>;
28 reg = <0xf0000000 0x00000100>;
29 bus-frequency = <0>; /* From boot loader */
30 system-frequency = <0>; /* From boot loader */
33 fsl,init-ext-48mhz-en = <0x0>;
34 fsl,init-fd-enable = <0x01>;
35 fsl,init-fd-counters = <0x3333>;
44 reg = <0x2000 0x100>;
45 interrupts = <2 1 0>;
50 reg = <0x2200 0x100>;
[all …]
H A Dtqm5200.dts20 #size-cells = <0>;
22 PowerPC,5200@0 {
24 reg = <0>;
27 d-cache-size = <0x4000>; // L1, 16K
28 i-cache-size = <0x4000>; // L1, 16K
29 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader
35 memory@0 {
37 reg = <0x00000000 0x04000000>; // 64MB
[all …]
H A Dlite5200.dts20 #size-cells = <0>;
22 PowerPC,5200@0 {
24 reg = <0>;
27 d-cache-size = <0x4000>; // L1, 16K
28 i-cache-size = <0x4000>; // L1, 16K
29 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader
35 memory@0 {
37 reg = <0x00000000 0x04000000>; // 64MB
[all …]
H A Dmpc5200b.dtsi21 #size-cells = <0>;
23 powerpc: PowerPC,5200@0 {
25 reg = <0>;
28 d-cache-size = <0x4000>; // L1, 16K
29 i-cache-size = <0x4000>; // L1, 16K
30 timebase-frequency = <0>; // from bootloader
31 bus-frequency = <0>; // from bootloader
32 clock-frequency = <0>; // from bootloader
36 memory: memory@0 {
38 reg = <0x00000000 0x04000000>; // 64MB
[all …]
H A Dmpc832x_rdb.dts26 #size-cells = <0>;
28 PowerPC,8323@0 {
30 reg = <0x0>;
31 d-cache-line-size = <0x20>; // 32 bytes
32 i-cache-line-size = <0x20>; // 32 bytes
35 timebase-frequency = <0>;
36 bus-frequency = <0>;
37 clock-frequency = <0>;
43 reg = <0x00000000 0x04000000>;
51 ranges = <0x0 0xe0000000 0x00100000>;
[all …]
H A Dmpc832x_mds.dts39 #size-cells = <0>;
41 PowerPC,8323@0 {
43 reg = <0x0>;
48 timebase-frequency = <0>;
49 bus-frequency = <0>;
50 clock-frequency = <0>;
56 reg = <0x00000000 0x08000000>;
61 reg = <0xf8000000 0x8000>;
69 ranges = <0x0 0xe0000000 0x00100000>;
70 reg = <0xe0000000 0x00000200>;
[all …]
/freebsd/usr.sbin/usbconfig/
H A Dusbconfig.8195 .Dl usbconfig -d ugen1.2 do_request 0x81 0x06 0x2200 0 0x100
/freebsd/sys/libkern/
H A Dcrc16.c32 /* CRC table for the CRC-16. The poly is 0x8005 (x16 + x15 + x2 + 1). */
34 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
35 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
36 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
37 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
38 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
39 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
40 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
41 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
42 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
[all …]
/freebsd/sys/dev/vnic/
H A Dnic_reg.h35 #define NIC_PF_CFG (0x0000)
36 #define NIC_PF_STATUS (0x0010)
37 #define NIC_PF_INTR_TIMER_CFG (0x0030)
38 #define NIC_PF_BIST_STATUS (0x0040)
39 #define NIC_PF_SOFT_RESET (0x0050)
40 #define NIC_PF_TCP_TIMER (0x0060)
41 #define NIC_PF_BP_CFG (0x0080)
42 #define NIC_PF_RRM_CFG (0x0088)
43 #define NIC_PF_CQM_CF (0x00A0)
44 #define NIC_PF_CNM_CF (0x00A8)
[all …]
/freebsd/sys/arm/ti/
H A Dti_cpuid.c56 #define OMAP4_STD_FUSE_DIE_ID_0 0x2200
57 #define OMAP4_ID_CODE 0x2204
58 #define OMAP4_STD_FUSE_DIE_ID_1 0x2208
59 #define OMAP4_STD_FUSE_DIE_ID_2 0x220C
60 #define OMAP4_STD_FUSE_DIE_ID_3 0x2210
61 #define OMAP4_STD_FUSE_PROD_ID_0 0x2214
62 #define OMAP4_STD_FUSE_PROD_ID_1 0x2218
64 #define OMAP3_ID_CODE 0xA204
66 static uint32_t chip_revision = 0xffffffff;
100 * the JTAG (?) tap registers, which are located in address 0x4A00_2200 to in omap4_get_revision()
[all …]
/freebsd/contrib/libxo/libxo/
H A Dxo_wcwidth.h73 int min = 0; in xo_bisearch()
76 if (ucs < table[0].first || ucs > table[max].last) in xo_bisearch()
77 return 0; in xo_bisearch()
88 return 0; in xo_bisearch()
95 * - The null character (U+0000) has a column width of 0.
102 * column width of 0.
107 * database) and ZERO WIDTH SPACE (U+200B) have a column width of 0.
110 * have a column width of 0.
130 { 0x0300, 0x036F }, { 0x0483, 0x0486 }, { 0x0488, 0x0489 }, in xo_wcwidth()
131 { 0x0591, 0x05BD }, { 0x05BF, 0x05BF }, { 0x05C1, 0x05C2 }, in xo_wcwidth()
[all …]
/freebsd/contrib/ncurses/ncurses/
H A Dwcwidth.h81 int min = 0; in bisearch()
84 if (ucs < table[0].first || ucs > table[max].last) in bisearch()
85 return 0; in bisearch()
96 return 0; in bisearch()
103 * - The null character (U+0000) has a column width of 0.
110 * column width of 0.
115 * database) and ZERO WIDTH SPACE (U+200B) have a column width of 0.
118 * have a column width of 0.
137 { 0x0300, 0x036F }, { 0x0483, 0x0486 }, { 0x0488, 0x0489 }, in mk_wcwidth()
138 { 0x0591, 0x05BD }, { 0x05BF, 0x05BF }, { 0x05C1, 0x05C2 }, in mk_wcwidth()
[all …]
/freebsd/sys/contrib/device-tree/src/mips/loongson/
H A Dloongson64-2k1000.dtsi15 #size-cells = <0>;
17 cpu0: cpu@0 {
20 reg = <0x0>;
29 reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */
30 <0x00000000 0x20000000 0x0000000
[all...]
/freebsd/sys/dev/nfe/
H A Dif_nfereg.h45 #define NFE_IRQ_STATUS 0x000
46 #define NFE_IRQ_MASK 0x004
47 #define NFE_SETUP_R6 0x008
48 #define NFE_IMTIMER 0x00c
49 #define NFE_MSI_MAP0 0x020
50 #define NFE_MSI_MAP1 0x024
51 #define NFE_MSI_IRQ_MASK 0x030
52 #define NFE_MAC_RESET 0x03c
53 #define NFE_MISC1 0x080
54 #define NFE_TX_CTL 0x084
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam3517-evm.dts26 reg = <0x80000000 0x10000000>; /* 256 MB */
99 pinctrl-0 = <&leds_pins>;
126 lcd0: display@0 {
146 pinctrl-0 = <&backlight_pins>;
147 pwms = <&pwm11 0 5000000 0>;
148 brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
156 pinctrl-0 = <&pwm_pins>;
159 ti,clock-source = <0x0
[all...]
/freebsd/share/i18n/csmapper/APPLE/
H A DUCS%SYMBOL.src4 SRC_ZONE 0x0000-0xF8FF
6 DST_INVALID 0x100
23 # c02 2005-Apr-05 Change mappings for 0xBD, 0xE0. Update
27 # 0xBE, 0xE6-EF, 0xF4, 0xF6-FE to use new
35 # mapping from 0xA0 to EURO SIGN. Matches
41 # change mappings for 0xE1 & 0xF1 from U+2329
78 # Column #1 is the Mac OS Symbol code (in hex as 0xNN)
80 # (in hex as 0xNNNN or 0xNNNN+0xNNNN).
92 # at 0x00-0x1F and 0x7F.
104 # (0) with the Mac OS Roman encoding. To determine if the Symbol
[all …]
/freebsd/sys/dev/etherswitch/ar40xx/
H A Dar40xx_hw_psgmii.c88 0, sc->sc_psgmii_mem_size, BUS_SPACE_BARRIER_WRITE); in ar40xx_hw_psgmii_reg_write()
97 0, sc->sc_psgmii_mem_size, BUS_SPACE_BARRIER_READ); in ar40xx_hw_psgmii_reg_read()
109 0x2200); in ar40xx_hw_psgmii_set_mac_mode()
111 0x8380); in ar40xx_hw_psgmii_set_mac_mode()
117 return (0); in ar40xx_hw_psgmii_set_mac_mode()
130 MDIO_WRITEREG(sc->sc_mdio_dev, phy, 0x0, 0x9000); in ar40xx_hw_psgmii_single_phy_testing()
131 MDIO_WRITEREG(sc->sc_mdio_dev, phy, 0x0, 0x4140); in ar40xx_hw_psgmii_single_phy_testing()
133 for (j = 0; j < AR40XX_PSGMII_CALB_NUM; j++) { in ar40xx_hw_psgmii_single_phy_testing()
136 status = MDIO_READREG(sc->sc_mdio_dev, phy, 0x11); in ar40xx_hw_psgmii_single_phy_testing()
151 ar40xx_hw_phy_mmd_write(sc, phy, 7, 0x8029, 0x0000); in ar40xx_hw_psgmii_single_phy_testing()
[all …]
/freebsd/sys/dev/bnxt/bnxt_re/
H A Dib_verbs.h41 #define BNXT_RE_ROCE_V2_UDP_SPORT 0x8CD1
42 #define BNXT_RE_QP_RANDOM_QKEY 0x81818181
97 #define CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_PG_256MB 0x1cUL
488 return 0; in bnxt_re_init_pow2_flag()
508 return 0; in bnxt_re_init_rsvd_wqe_flag()
516 return _is_chip_gen_p5_p7(cctx) ? 0 : BNXT_QPLIB_RESERVED_QP_WRS; in bnxt_re_get_diff()
518 return 0; in bnxt_re_get_diff()
559 return (*(u16 *)a ^ *(u16 *)b) | (a32[0] ^ b32[0]) | in compare_ether_header()
572 /* CRC table for the CRC-16. The poly is 0x8005 (x16 + x15 + x2 + 1). */ in crc16()
574 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241, in crc16()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynosautov9.dtsi47 #size-cells = <0>;
81 cpu0: cpu@0 {
84 reg = <0x0>;
91 reg = <0x100>;
98 reg = <0x200>;
105 reg = <0x300>;
112 reg = <0x10000>;
119 reg = <0x10100>;
126 reg = <0x10200>;
133 reg = <0x1030
[all...]

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