Lines Matching +full:0 +full:x2200
27 ranges = <0 0xf0000000 0x0000c000>;
28 reg = <0xf0000000 0x00000100>;
29 bus-frequency = <0>; /* From boot loader */
30 system-frequency = <0>; /* From boot loader */
33 fsl,init-ext-48mhz-en = <0x0>;
34 fsl,init-fd-enable = <0x01>;
35 fsl,init-fd-counters = <0x3333>;
44 reg = <0x2000 0x100>;
45 interrupts = <2 1 0>;
50 reg = <0x2200 0x100>;
51 interrupts = <2 2 0>;
56 reg = <0x2400 0x100>;
57 interrupts = <2 3 0>;
70 reg = <0x2c00 0x100>;
71 interrupts = <2 4 0>;
80 reg = <0x1f>;
81 interrupts = <1 2 0>; /* IRQ 2 active low */
92 reg = <0x2e>;
96 reg = <0x51>;
105 ranges = <0 0 0xfe000000 0x02000000
106 1 0 0x62000000 0x00400000
107 2 0 0x64000000 0x00200000
108 3 0 0x66000000 0x01000000
109 6 0 0x68000000 0x01000000
110 7 0 0x6a000000 0x00000004>;
112 flash@0,0 {
114 reg = <0 0 0x02000000>;
119 sram0@1,0 {
121 reg = <1 0x00000 0x00400000>;
132 reg = <0xf0000d00 0x100>;
133 interrupt-map-mask = <0xf800 0 0 7>;
135 /* IDSEL 0x16 */
136 0xc000 0 0 1 &mpc5200_pic 1 3 3
137 0xc000 0 0 2 &mpc5200_pic 1 3 3
138 0xc000 0 0 3 &mpc5200_pic 1 3 3
139 0xc000 0 0 4 &mpc5200_pic 1 3 3>;
140 clock-frequency = <0>; /* From boot loader */
141 interrupts = <2 8 0 2 9 0 2 10 0>;
142 bus-range = <0 0>;
143 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000>,
144 <0x02000000 0 0x90000000 0x90000000 0 0x10000000>,
145 <0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;