/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8mn-var-som.dtsi | 20 reg = <0x0 0x40000000 0 0x40000000>; 26 pinctrl-0 = <&pinctrl_reg_eth_phy>; 62 pinctrl-0 = <&pinctrl_ecspi1>; 64 <&gpio1 0 GPIO_ACTIVE_LOW>; 70 touchscreen@0 { 71 reg = <0>; 74 pinctrl-0 [all...] |
H A D | imx8mm-var-som.dtsi | 19 reg = <0x0 0x40000000 0 0x80000000>; 25 pinctrl-0 = <&pinctrl_reg_eth_phy>; 72 pinctrl-0 = <&pinctrl_ecspi1>; 74 <&gpio1 0 GPIO_ACTIVE_LOW>; 80 touchscreen@0 { 81 reg = <0>; 84 pinctrl-0 [all...] |
H A D | imx8mm-evk.dts | 42 pinctrl-0 = <&pinctrl_flexspi>; 45 flash@0 { 46 reg = <0>; 60 pinctrl-0 = <&pinctrl_usdhc3>; 71 MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2 72 MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82 73 MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82 74 MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82 75 MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82 76 MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82 [all …]
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H A D | imx8mm-prt8mm.dts | 22 reg = <0x0 0x40000000 0 0x40000000>; 28 pinctrl-0 = <&pinctrl_gpio_leds>; 32 gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>; 64 pinctrl-0 = <&pinctrl_i2c1>; 69 reg = <0x34>; 70 #sound-dai-cells = <0>; 77 pinctrl-0 = <&pinctrl_i2c2>; 82 reg = <0x60>; 83 regulator-name = "0V9_CORE"; 94 pinctrl-0 = <&pinctrl_i2c3>; [all …]
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H A D | imx8mm-innocomm-wb15.dtsi | 13 pinctrl-0 = <&pinctrl_modem_regulator>; 61 pinctrl-0 = <&pinctrl_i2c1>; 69 reg = <0x4b>; 70 pinctrl-0 = <&pinctrl_pmic>; 187 pinctrl-0 = <&pinctrl_i2c2>; 196 pinctrl-0 = <&pinctrl_i2c3>; 204 fsl,tx-deemph-gen1 = <0x2d>; 205 fsl,tx-deemph-gen2 = <0xf>; 211 pinctrl-0 = <&pinctrl_pcie0>; 222 pinctrl-0 = <&pinctrl_uart1>; [all …]
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H A D | imx8mm-icore-mx8mm.dtsi | 30 pinctrl-0 = <&pinctrl_fec1>; 36 #size-cells = <0>; 50 pinctrl-0 = <&pinctrl_i2c1>; 55 reg = <0x08>; 148 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 149 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 150 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 151 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 152 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 153 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f [all …]
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H A D | imx8mp-beacon-som.dtsi | 14 reg = <0x0 0x40000000 0 0xc0000000>, 15 <0x1 0x00000000 0 0xc0000000>; 21 pinctrl-0 = <&pinctrl_reg_wl_bt>; 49 pinctrl-0 = <&pinctrl_eqos>; 58 #size-cells = <0>; 73 pinctrl-0 = <&pinctrl_flexspi0>; 76 flash0: flash@0 { 78 reg = <0>; 87 pinctrl-0 = <&pinctrl_i2c1>; 93 reg = <0x25>; [all …]
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H A D | imx8mp-icore-mx8mp.dtsi | 31 pinctrl-0 = <&pinctrl_i2c1>; 39 pinctrl-0 = <&pinctrl_pmic>; 40 reg = <0x25>; 119 pinctrl-0 = <&pinctrl_usdhc3>; 128 MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3 129 MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3 135 MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01 0x41 141 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 142 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 143 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0 [all …]
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H A D | imx8mm-nitrogen-r2.dts | 30 pinctrl-0 = <&pinctrl_reg_wlan_vmmc>; 57 pinctrl-0 = <&pinctrl_sound_wm8960>; 83 pinctrl-0 = <&pinctrl_ecspi2>; 90 pinctrl-0 = <&pinctrl_fec1>; 98 #size-cells = <0>; 110 pinctrl-0 = <&pinctrl_flexspi>; 117 pinctrl-0 = <&pinctrl_i2c1>; 122 reg = <0x8>; 214 pinctrl-0 = <&pinctrl_i2c3>; 219 reg = <0x7 [all...] |
H A D | imx8mn-evk.dtsi | 17 pinctrl-0 = <&pinctrl_gpio_led>; 40 reg = <0x0 0x40000000 0 0x80000000>; 46 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 59 pinctrl-0 = <&pinctrl_ir>; 69 #sound-dai-cells = <0>; 72 pinctrl-0 = <&pinctrl_gpio_wlf>; 122 pinctrl-0 [all...] |
H A D | imx8mm-beacon-som.dtsi | 17 pinctrl-0 = <&pinctrl_usdhc1_gpio>; 26 reg = <0x0 0x40000000 0 0x80000000>; 68 pinctrl-0 = <&pinctrl_fec1>; 76 #size-cells = <0>; 78 ethphy0: ethernet-phy@0 { 80 reg = <0>; 87 pinctrl-0 [all...] |
H A D | imx8mn-beacon-som.dtsi | 18 pinctrl-0 = <&pinctrl_usdhc1_gpio>; 27 reg = <0x0 0x40000000 0 0x80000000>; 76 pinctrl-0 = <&pinctrl_fec1>; 86 #size-cells = <0>; 88 ethphy0: ethernet-phy@0 { 90 reg = <0>; 97 pinctrl-0 [all...] |
H A D | imx8mm-emcon.dtsi | 19 pinctrl-0 = <&pinctrl_gpio_led>; 38 pwms = <&pwm1 0 50000 0>; 40 0 4 8 16 32 64 80 96 112 68 pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>; 76 pinctrl-0 = <&pinctrl_fec1>; 84 #size-cells = <0>; 86 ethphy0: ethernet-phy@0 { 88 reg = <0>; 97 pinctrl-0 [all...] |
H A D | imx8mm-venice-gw72xx.dtsi | 20 pinctrl-0 = <&pinctrl_gpio_leds>; 22 led-0 { 40 #clock-cells = <0>; 47 pinctrl-0 = <&pinctrl_pps>; 62 pinctrl-0 = <&pinctrl_reg_usb1_en>; 73 pinctrl-0 = <&pinctrl_reg_usb2_en>; 86 pinctrl-0 = <&pinctrl_spi2>; 93 reg = <0x1>; 117 pinctrl-0 = <&pinctrl_i2c2>; 122 pinctrl-0 [all...] |
H A D | imx8mp-debix-model-a.dts | 26 pinctrl-0 = <&pinctrl_gpio_led>; 28 led-0 { 39 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 50 pinctrl-0 = <&pinctrl_reg_usb_hub>; 77 pinctrl-0 = <&pinctrl_eqos>; 85 #size-cells = <0>; 87 ethphy0: ethernet-phy@0 { /* RTL8211E */ 89 reg = <0>; 100 pinctrl-0 = <&pinctrl_i2c1>; 105 reg = <0x2 [all...] |
H A D | imx8mm-emtop-som.dtsi | 25 pinctrl-0 = <&pinctrl_gpio_led>; 27 led-0 { 54 pinctrl-0 = <&pinctrl_i2c1>; 59 reg = <0x25>; 61 pinctrl-0 = <&pinctrl_pmic>; 159 pinctrl-0 = <&pinctrl_uart2>; 165 pinctrl-0 = <&pinctrl_usdhc3>; 175 pinctrl-0 = <&pinctrl_wdog>; 183 MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 184 MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19 [all …]
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H A D | imx8mp-venice-gw702x.dtsi | 17 reg = <0x0 0x40000000 0 0x80000000>; 33 interrupts = <0>; 84 pinctrl-0 = <&pinctrl_eqos>; 92 #size-cells = <0>; 94 ethphy0: ethernet-phy@0 { 96 pinctrl-0 = <&pinctrl_ethphy0>; 98 reg = <0x0>; 112 pinctrl-0 = <&pinctrl_i2c1>; 120 reg = <0x20>; 121 pinctrl-0 = <&pinctrl_gsc>; [all …]
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H A D | imx8mm-venice-gw73xx.dtsi | 20 pinctrl-0 = <&pinctrl_gpio_leds>; 22 led-0 { 40 #clock-cells = <0>; 47 pinctrl-0 = <&pinctrl_pps>; 70 pinctrl-0 = <&pinctrl_reg_usb1_en>; 81 pinctrl-0 = <&pinctrl_reg_usb2_en>; 92 pinctrl-0 = <&pinctrl_reg_wl>; 106 pinctrl-0 = <&pinctrl_spi2>; 113 reg = <0x1>; 137 pinctrl-0 [all...] |
H A D | imx8mm-kontron-n801x-som.dtsi | 19 reg = <0x0 0x40000000 0 0x80000000>; 65 pinctrl-0 = <&pinctrl_ecspi1>; 69 flash@0 { 72 reg = <0>; 79 pinctrl-0 = <&pinctrl_i2c1>; 84 reg = <0x25>; 86 pinctrl-0 = <&pinctrl_pmic>; 88 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 189 pinctrl-0 = <&pinctrl_uart3>; 195 pinctrl-0 = <&pinctrl_usdhc1>; [all …]
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H A D | imx8mp-phycore-som.dtsi | 21 reg = <0x0 0x40000000 0 0x80000000>; 44 pinctrl-0 = <&pinctrl_fec>; 52 #size-cells = <0>; 54 ethphy1: ethernet-phy@0 { 56 reg = <0>; 69 pinctrl-0 = <&pinctrl_flexspi0>; 72 som_flash: flash@0 { [all...] |
H A D | imx8mm-kontron-sl.dtsi | 19 reg = <0x0 0x40000000 0 0x80000000>; 61 pinctrl-0 = <&pinctrl_ecspi1>; 65 flash@0 { 68 reg = <0>; 75 partition@0 { 77 reg = <0x0 0x1e0000>; 82 reg = <0x1e0000 0x10000>; 87 reg = <0x1f0000 0x10000>; 96 pinctrl-0 = <&pinctrl_i2c1>; 101 reg = <0x25>; [all …]
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H A D | imx8mm-icore-mx8mm-ctouch2.dts | 29 pinctrl-0 = <&pinctrl_i2c2>; 36 pinctrl-0 = <&pinctrl_i2c4>; 43 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 44 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 50 MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 51 MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 57 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 58 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 64 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41 70 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 [all …]
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H A D | imx8mm-icore-mx8mm-edimm2.2.dts | 29 pinctrl-0 = <&pinctrl_i2c2>; 36 pinctrl-0 = <&pinctrl_i2c4>; 43 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 44 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 50 MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 51 MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 57 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 58 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 64 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41 70 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 [all …]
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H A D | imx8mm-kontron-osm-s.dtsi | 25 reg = <0x0 0x40000000 0 0x80000000>; 67 pinctrl-0 = <&pinctrl_ecspi1>; 71 flash@0 { 74 reg = <0>; 81 partition@0 { 83 reg = <0x0 0x1e0000>; 88 reg = <0x1e0000 0x10000>; 93 reg = <0x1f0000 0x10000>; 102 pinctrl-0 = <&pinctrl_i2c1>; 107 reg = <0x25>; [all …]
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H A D | imx8mm-kontron-bl.dts | 23 #clock-cells = <0>; 31 pinctrl-0 = <&pinctrl_gpio_led>; 67 pwms = <&pwm2 0 5000 0>; 74 pinctrl-0 = <&pinctrl_usb_eth2>; 90 pinctrl-0 = <&pinctrl_ecspi2>; 94 can0: can@0 { 96 reg = <0>; 98 pinctrl-0 = <&pinctrl_can>; 110 pinctrl-0 = <&pinctrl_ecspi3>; 117 pinctrl-0 = <&pinctrl_enet>; [all …]
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