Lines Matching +full:0 +full:x1d0
19 reg = <0x0 0x40000000 0 0x80000000>;
61 pinctrl-0 = <&pinctrl_ecspi1>;
65 flash@0 {
68 reg = <0>;
75 partition@0 {
77 reg = <0x0 0x1e0000>;
82 reg = <0x1e0000 0x10000>;
87 reg = <0x1f0000 0x10000>;
96 pinctrl-0 = <&pinctrl_i2c1>;
101 reg = <0x25>;
103 pinctrl-0 = <&pinctrl_pmic>;
105 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
109 regulator-name = "+0V8_VDD_SOC (BUCK1)";
120 regulator-name = "+0V9_VDD_ARM (BUCK2)";
131 regulator-name = "+0V9_VDD_DRAM&PU (BUCK3)";
171 regulator-name = "+0V8_VDD_SNVS (LDO2)";
187 regulator-name = "+0V9_VDD_PHY (LDO4)";
205 pinctrl-0 = <&pinctrl_uart3>;
211 pinctrl-0 = <&pinctrl_usdhc1>;
223 pinctrl-0 = <&pinctrl_wdog>;
231 MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
232 MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
233 MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82
234 MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
240 MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
241 MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
247 MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141
253 MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
254 MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
260 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
261 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
262 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
263 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
264 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
265 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
266 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d0
267 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d0
268 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d0
269 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d0
270 MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019
271 MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x190
277 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
278 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
279 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
280 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
281 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
282 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
283 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d4
284 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d4
285 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d4
286 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d4
287 MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019
288 MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x194
294 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
295 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
296 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
297 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
298 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
299 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
300 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d6
301 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d6
302 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d6
303 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d6
304 MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019
305 MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x196
311 MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6