Lines Matching +full:0 +full:x1d0

17 		pinctrl-0 = <&pinctrl_usdhc1_gpio>;
26 reg = <0x0 0x40000000 0 0x80000000>;
68 pinctrl-0 = <&pinctrl_fec1>;
76 #size-cells = <0>;
78 ethphy0: ethernet-phy@0 {
80 reg = <0>;
87 pinctrl-0 = <&pinctrl_flexspi>;
90 flash@0 {
91 reg = <0>;
104 pinctrl-0 = <&pinctrl_i2c1>;
109 reg = <0x4b>;
111 pinctrl-0 = <&pinctrl_pmic>;
116 #clock-cells = <0>;
223 pinctrl-0 = <&pinctrl_i2c3>;
230 reg = <0x50>;
235 reg = <0x51>;
241 pinctrl-0 = <&pinctrl_uart1>;
260 #size-cells = <0>;
262 pinctrl-0 = <&pinctrl_usdhc1>;
276 pinctrl-0 = <&pinctrl_wlan>;
285 pinctrl-0 = <&pinctrl_usdhc3>;
295 pinctrl-0 = <&pinctrl_wdog>;
303 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
304 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
305 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
306 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
307 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
308 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
309 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
310 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
311 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
312 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
313 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
314 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
315 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
316 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
317 MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
323 MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
324 MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
330 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
331 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
337 MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
338 MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
339 MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
340 MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
341 MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
342 MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
348 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
354 MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
355 MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
356 MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
357 MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
358 MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x19
359 MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x19
360 MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x19
361 MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x141
367 MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41
373 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
374 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
375 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
376 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
377 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
378 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
384 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
385 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
386 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
387 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
388 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
389 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
395 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
396 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
397 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
398 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
399 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
400 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
406 MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
407 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
408 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
409 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
410 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
411 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
412 MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
413 MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
414 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
415 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
416 MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
422 MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
423 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
424 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
425 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
426 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
427 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
428 MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
429 MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
430 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
431 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
432 MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
438 MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
439 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
440 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
441 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
442 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
443 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
444 MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
445 MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
446 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
447 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
448 MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
454 MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166
460 MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x111