Lines Matching +full:0 +full:x1d0
19 pinctrl-0 = <&pinctrl_gpio_led>;
38 pwms = <&pwm1 0 50000 0>;
40 0 4 8 16 32 64 80 96 112
68 pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
76 pinctrl-0 = <&pinctrl_fec1>;
84 #size-cells = <0>;
86 ethphy0: ethernet-phy@0 {
88 reg = <0>;
97 pinctrl-0 = <&pinctrl_flexspi0>;
101 flash0: flash@0 {
102 reg = <0>;
113 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
119 MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82
120 MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
121 MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
127 MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40000
128 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40000
134 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
135 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
136 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
137 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
138 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
139 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
140 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
141 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
142 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
143 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
144 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
145 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
146 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
147 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
148 MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
154 MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
155 MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
156 MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
157 MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
158 MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
159 MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
160 MX8MM_IOMUXC_NAND_DQS_QSPI_A_DQS 0x82
166 MX8MM_IOMUXC_NAND_CLE_QSPI_B_SCLK 0x1c2
167 MX8MM_IOMUXC_NAND_CE2_B_QSPI_B_SS0_B 0x82
168 MX8MM_IOMUXC_NAND_DATA04_QSPI_B_DATA0 0x82
169 MX8MM_IOMUXC_NAND_DATA05_QSPI_B_DATA1 0x82
170 MX8MM_IOMUXC_NAND_DATA06_QSPI_B_DATA2 0x82
171 MX8MM_IOMUXC_NAND_DATA07_QSPI_B_DATA3 0x82
177 MX8MM_IOMUXC_ECSPI2_SCLK_GPIO5_IO10 0x19
178 MX8MM_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x19
184 MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
185 MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
191 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
192 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
198 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
199 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
205 MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x06
211 MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x41
212 MX8MM_IOMUXC_SAI5_RXFS_GPIO3_IO19 0x41
218 MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x41
224 MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT 0x06
230 MX8MM_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6
231 MX8MM_IOMUXC_SAI2_RXC_SAI2_RX_BCLK 0xd6
232 MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
233 MX8MM_IOMUXC_SAI2_RXFS_SAI2_RX_SYNC 0xd6
234 MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
235 MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
236 MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
242 MX8MM_IOMUXC_SPDIF_TX_SPDIF1_OUT 0xd6
243 MX8MM_IOMUXC_SPDIF_RX_SPDIF1_IN 0xd6
249 MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
250 MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
256 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
257 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
260 MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140
261 MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140
267 MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
268 MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
274 MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
275 MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
281 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
282 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
283 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
284 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
285 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
286 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
287 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d0
288 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d0
289 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d0
290 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d0
296 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
297 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
298 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
299 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
300 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
301 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
302 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d4
303 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d4
304 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d4
305 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d4
311 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
312 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
313 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
314 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
315 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
316 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
317 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d6
318 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d6
319 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d6
320 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d6
326 MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x41
327 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x1c4
333 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
334 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
335 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
336 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
337 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
338 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
339 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
345 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
346 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
347 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
348 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
349 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
350 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
351 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
357 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
358 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
359 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
360 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
361 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
362 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
363 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
370 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
371 MX8MM_IOMUXC_SD2_WP_USDHC2_WP 0x1c4
377 MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
385 pinctrl-0 = <&pinctrl_i2c1>;
392 pinctrl-0 = <&pinctrl_i2c2>;
399 pinctrl-0 = <&pinctrl_i2c3>;
404 reg = <0x4b>;
405 pinctrl-0 = <&pinctrl_pmic>;
511 reg = <0x69>;
521 pinctrl-0 = <&pinctrl_pwm1>;
525 #sound-dai-cells = <0>;
527 pinctrl-0 = <&pinctrl_sai2>;
536 pinctrl-0 = <&pinctrl_spdif1>;
553 pinctrl-0 = <&pinctrl_uart1>;
561 pinctrl-0 = <&pinctrl_uart2>;
569 pinctrl-0 = <&pinctrl_uart3>;
577 pinctrl-0 = <&pinctrl_uart4>;
597 pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
609 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
622 pinctrl-0 = <&pinctrl_wdog>;