Lines Matching +full:0 +full:x1d0
22 reg = <0x0 0x40000000 0 0x40000000>;
28 pinctrl-0 = <&pinctrl_gpio_leds>;
32 gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
64 pinctrl-0 = <&pinctrl_i2c1>;
69 reg = <0x34>;
70 #sound-dai-cells = <0>;
77 pinctrl-0 = <&pinctrl_i2c2>;
82 reg = <0x60>;
83 regulator-name = "0V9_CORE";
94 pinctrl-0 = <&pinctrl_i2c3>;
99 reg = <0x51>;
104 reg = <0x5d>;
106 pinctrl-0 = <&pinctrl_touchscreen>;
115 reg = <0x70>;
121 pinctrl-0 = <&pinctrl_sai3>;
136 pinctrl-0 = <&pinctrl_uart4>;
142 pinctrl-0 = <&pinctrl_usbotg1>;
151 pinctrl-0 = <&pinctrl_usdhc2>;
161 pinctrl-0 = <&pinctrl_usdhc3>;
175 pinctrl-0 = <&pinctrl_wdog>;
183 MX8MM_IOMUXC_NAND_ALE_GPIO3_IO0 0x00
184 MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x00
190 MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400000c3
191 MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400000c3
197 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400000c3
198 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400000c3
204 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400000c3
205 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400000c3
211 MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
212 MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
213 MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
214 MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
220 MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x80
221 MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x80
227 MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x040
228 MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x040
234 MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR 0x000
235 MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x000
241 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
242 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
243 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
244 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
245 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
246 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
247 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x0d4
253 MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
254 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
255 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
256 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
257 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
258 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
259 MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
260 MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
261 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
262 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
263 MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
269 MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
270 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
271 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
272 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
273 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
274 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
275 MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
276 MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
277 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
278 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
279 MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
285 MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
286 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
287 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
288 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
289 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
290 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
291 MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
292 MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
293 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
294 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
295 MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
301 MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6