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12

/linux/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dmarvell,comphy-cp110.yaml32 - description: Lane 0 (USB3/GbE) registers (Armada 3700)
47 const: 0
64 '^phy@[0-2]$':
108 reg = <0x120000 0x6000>;
112 #size-cells = <0>;
115 phy@0 {
116 reg = <0>;
129 reg = <0x18300 0x300>,
130 <0x1F000 0x400>,
131 <0x5C000 0x400>,
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-b3.dts25 reg = <0x00000000 0x20000000>;
60 m25p16@0 {
64 reg = <0>;
66 mode = <0>;
68 partition@0 {
69 reg = <0x0 0xc0000>;
74 reg = <0xc0000 0x20000>;
79 reg = <0xe0000 0x120000>;
88 * There is something on the bus at address 0x64.
117 pinctrl-0 = < &pmx_led_green &pmx_led_red
[all …]
H A Darmada-370-dlink-dns327l.dts9 * There's still some unknown device on i2c address 0x13
28 memory@0 {
30 reg = <0x00000000 0x20000000>; /* 512 MiB */
34 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
35 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
36 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
52 pinctrl-0 = <
73 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
79 pinctrl-0 = <
110 pinctrl-0 = <&xhci_pwr_pin>;
[all …]
/linux/drivers/net/ethernet/cavium/thunder/
H A Dnic_reg.h13 #define NIC_PF_CFG (0x0000)
14 #define NIC_PF_STATUS (0x0010)
15 #define NIC_PF_INTR_TIMER_CFG (0x0030)
16 #define NIC_PF_BIST_STATUS (0x0040)
17 #define NIC_PF_SOFT_RESET (0x0050)
18 #define NIC_PF_TCP_TIMER (0x0060)
19 #define NIC_PF_BP_CFG (0x0080)
20 #define NIC_PF_RRM_CFG (0x0088)
21 #define NIC_PF_CQM_CFG (0x00A0)
22 #define NIC_PF_CNM_CF (0x00A8)
[all …]
/linux/arch/arm/mach-versatile/
H A Dintegrator-hardware.h14 #define IO_BASE 0xF0000000 // VA of IO
15 #define IO_SIZE 0x0B000000 // How much?
19 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
25 #define INTEGRATOR_BOOT_ROM_LO 0x00000000
26 #define INTEGRATOR_BOOT_ROM_HI 0x20000000
40 #define INTEGRATOR_SSRAM_BASE 0x00000000
41 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000
44 #define INTEGRATOR_FLASH_BASE 0x24000000
47 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000
53 #define INTEGRATOR_SDRAM_BASE 0x00040000
[all …]
/linux/drivers/gpu/drm/etnaviv/
H A Detnaviv_hwdb.c10 .model = 0x400,
11 .revision = 0x4652,
12 .product_id = 0x70001,
13 .customer_id = 0x100,
14 .eco_id = 0,
19 .nn_core_count = 0,
25 .buffer_size = 0,
27 .features = 0xa0e9e004,
28 .minor_features0 = 0xe1299fff,
29 .minor_features1 = 0xbe13b219,
[all …]
/linux/arch/arm64/boot/dts/arm/
H A Drtsm_ve-motherboard.dtsi13 #clock-cells = <0>;
20 #clock-cells = <0>;
27 #clock-cells = <0>;
49 #clock-cells = <0>;
55 arm,vexpress-sysreg,func = <5 0>;
60 arm,vexpress-sysreg,func = <7 0>;
65 arm,vexpress-sysreg,func = <8 0>;
70 arm,vexpress-sysreg,func = <9 0>;
75 arm,vexpress-sysreg,func = <11 0>;
83 ranges = <0 0x8000000 0 0x8000000 0x18000000>;
[all …]
H A Djuno-motherboard.dtsi13 #clock-cells = <0>;
20 #clock-cells = <0>;
27 #clock-cells = <0>;
34 #clock-cells = <0>;
55 gpios = <&iofpga_gpio0 0 0x4>;
62 gpios = <&iofpga_gpio0 1 0x4>;
69 gpios = <&iofpga_gpio0 2 0x4>;
76 gpios = <&iofpga_gpio0 3 0x4>;
83 gpios = <&iofpga_gpio0 4 0x4>;
90 gpios = <&iofpga_gpio0 5 0x4>;
[all …]
/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa300-raumfeld-common.dtsi10 hw-revision = <0>;
19 reg = <0xa0000000 0x8000000>; /* 128 MB */
50 pinctrl-0 = <&ssp0_dai_pins>;
52 #sound-dai-cells = <0>;
62 pinctrl-0 = <&ssp1_dai_pins>;
64 #sound-dai-cells = <0>;
73 #address-cells = <0x1>;
74 #size-cells = <0>;
76 pinctrl-0 = <&spi_pins>;
98 pinctrl-0 = <&gpio_keys_pins>;
[all …]
/linux/sound/pci/ctxfi/
H A Dct20k1reg.h10 #define DSPXRAM_START 0x000000
11 #define DSPXRAM_END 0x013FFC
12 #define DSPAXRAM_START 0x020000
13 #define DSPAXRAM_END 0x023FFC
14 #define DSPYRAM_START 0x040000
15 #define DSPYRAM_END 0x04FFFC
16 #define DSPAYRAM_START 0x020000
17 #define DSPAYRAM_END 0x063FFC
18 #define DSPMICRO_START 0x080000
19 #define DSPMICRO_END 0x0B3FFC
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-display5.dtsi52 reg = <0x10000000 0x40000000>;
58 pinctrl-0 = <&pinctrl_backlight>;
59 pwms = <&pwm2 0 5000000 0>;
60 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
98 pinctrl-0 = <&pinctrl_reg_lvds>;
107 pinctrl-0 = <&pinctrl_usbh1_vbus>;
147 pinctrl-0 = <&pinctrl_audmux>;
181 pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs &pinctrl_ecspi2_flwp>;
184 s25fl256s: flash@0 {
189 reg = <0>;
[all …]
/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2m-rs1.dtsi33 #clock-cells = <0>;
40 #clock-cells = <0>;
47 #clock-cells = <0>;
57 gpios = <&v2m_led_gpios 0 0>;
63 gpios = <&v2m_led_gpios 1 0>;
69 gpios = <&v2m_led_gpios 2 0>;
75 gpios = <&v2m_led_gpios 3 0>;
81 gpios = <&v2m_led_gpios 4 0>;
87 gpios = <&v2m_led_gpios 5 0>;
93 gpios = <&v2m_led_gpios 6 0>;
[all …]
/linux/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/
H A Dtrans-gen2.c22 int ret = 0; in iwl_pcie_gen2_apm_init()
56 return 0; in iwl_pcie_gen2_apm_init()
133 "timeout waiting for FW reset ACK (inta_hw=0x%x, reset_done %d)\n", in iwl_trans_pcie_fw_reset_handshake()
277 iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTRL, 0x800FFFFF); in iwl_pcie_gen2_nic_init()
280 return 0; in iwl_pcie_gen2_nic_init()
291 if (buf[0]) in iwl_pcie_get_rf_name()
333 case 0x20000: in iwl_pcie_get_rf_name()
336 case 0x120000: in iwl_pcie_get_rf_name()
341 " (0x%x)", version); in iwl_pcie_get_rf_name()
349 pos += scnprintf(buf + pos, buflen - pos, ", rfid=0x%x", in iwl_pcie_get_rf_name()
[all …]
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-cp11x.dtsi29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
58 ranges = <0x0 0x0 ADDRESSIFY(CP11X_BASE) 0x2000000>;
60 CP11X_LABEL(ethernet): ethernet@0 {
62 #size-cells = <0>;
64 reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;
74 CP11X_LABEL(eth0): ethernet-port@0 {
88 reg = <0>;
89 port-id = <0>; /* For backward compatibility. */
[all …]
/linux/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_hw.c15 #define OCM_WIN_P3P(addr) (addr & 0xffc0000)
19 #define CRB_BLK(off) ((off >> 20) & 0x3f)
20 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
21 #define CRB_WINDOW_2M (0x130060)
22 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
23 #define CRB_INDIRECT_2M (0x1e0000UL)
52 {{{0, 0, 0, 0} } }, /* 0: PCI */
53 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
54 {1, 0x0110000, 0x0120000, 0x130000},
55 {1, 0x0120000, 0x0122000, 0x124000},
[all …]
/linux/drivers/net/can/kvaser_pciefd/
H A Dkvaser_pciefd_core.c33 #define KVASER_PCIEFD_VENDOR 0x1a07
36 #define KVASER_PCIEFD_4HS_DEVICE_ID 0x000d
37 #define KVASER_PCIEFD_2HS_V2_DEVICE_ID 0x000e
38 #define KVASER_PCIEFD_HS_V2_DEVICE_ID 0x000f
39 #define KVASER_PCIEFD_MINIPCIE_HS_V2_DEVICE_ID 0x0010
40 #define KVASER_PCIEFD_MINIPCIE_2HS_V2_DEVICE_ID 0x0011
43 #define KVASER_PCIEFD_2CAN_V3_DEVICE_ID 0x0012
44 #define KVASER_PCIEFD_1CAN_V3_DEVICE_ID 0x0013
45 #define KVASER_PCIEFD_4CAN_V2_DEVICE_ID 0x0014
46 #define KVASER_PCIEFD_MINIPCIE_2CAN_V3_DEVICE_ID 0x0015
[all …]
/linux/drivers/net/ethernet/amd/
H A Dsun3lance.c58 #define LANCE_OBIO 0x120000
62 * 0 = silent, print only serious errors
68 #define LANCE_DEBUG 0
75 module_param(lance_debug, int, 0);
76 MODULE_PARM_DESC(lance_debug, "SUN3 Lance debug level (0-3)");
84 } while( 0 )
164 #define DREG lp->iobase[0]
171 #define TMD1_ENP 0x01 /* end of packet */
172 #define TMD1_STP 0x02 /* start of packet */
173 #define TMD1_DEF 0x04 /* deferred */
[all …]
/linux/drivers/net/ethernet/qlogic/netxen/
H A Dnetxen_nic_hw.c16 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
18 #define MS_WIN(addr) (addr & 0x0ffc0000)
22 #define CRB_BLK(off) ((off >> 20) & 0x3f)
23 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
24 #define CRB_WINDOW_2M (0x130060)
25 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
26 #define CRB_INDIRECT_2M (0x1e0000UL)
57 {{{0, 0, 0, 0} } }, /* 0: PCI */
58 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
[all …]
/linux/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_main.c17 #define XTR_EOF_0 0x00000080U
18 #define XTR_EOF_1 0x01000080U
19 #define XTR_EOF_2 0x02000080U
20 #define XTR_EOF_3 0x03000080U
21 #define XTR_PRUNED 0x04000080U
22 #define XTR_ABORT 0x05000080U
23 #define XTR_ESCAPE 0x06000080U
24 #define XTR_NOT_READY 0x07000080U
42 { TARGET_CPU, 0xc0000, 0 }, /* 0xe00c0000 */
43 { TARGET_FDMA, 0xc0400, 0 }, /* 0xe00c0400 */
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dt4240si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
65 pcie@0 {
70 reg = <0 0 0 0 0>;
[all …]
/linux/sound/soc/codecs/
H A Dcs47l35.c41 { .type = WMFW_ADSP2_PM, .base = 0x080000 },
42 { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 },
43 { .type = WMFW_ADSP2_XM, .base = 0x0a0000 },
44 { .type = WMFW_ADSP2_YM, .base = 0x0c0000 },
48 { .type = WMFW_ADSP2_PM, .base = 0x100000 },
49 { .type = WMFW_ADSP2_ZM, .base = 0x160000 },
50 { .type = WMFW_ADSP2_XM, .base = 0x120000 },
51 { .type = WMFW_ADSP2_YM, .base = 0x140000 },
55 { .type = WMFW_ADSP2_PM, .base = 0x180000 },
56 { .type = WMFW_ADSP2_ZM, .base = 0x1e0000 },
[all …]
/linux/drivers/staging/media/meson/vdec/
H A Dcodec_vp9.c19 #define VP9_HEAD_PARSER_DONE 0xf0
36 #define DECODE_MODE_SINGLE 0
46 #define MV_MEM_UNIT 0x240
47 #define ADAPT_PROB_SIZE 0xf80
50 KEY_FRAME = 0,
56 #define MPRED_MV_BUF_SIZE 0x120000
58 #define IPP_SIZE 0x4000
59 #define SAO_ABV_SIZE 0x30000
60 #define SAO_VB_SIZE 0x30000
61 #define SH_TM_RPS_SIZE 0x800
[all …]
/linux/drivers/scsi/qla2xxx/
H A Dqla_nx.c15 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | \
16 ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | \
18 ((addr >> 25) & 0x3ff))
19 #define MS_WIN(addr) (addr & 0x0ffc0000)
20 #define QLA82XX_PCI_MN_2M (0)
21 #define QLA82XX_PCI_MS_2M (0x80000)
22 #define QLA82XX_PCI_OCM0_2M (0xc0000)
23 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
25 #define BLOCK_PROTECT_BITS 0x0F
[all …]
/linux/drivers/scsi/qla4xxx/
H A Dql4_nx.c18 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
19 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
20 #define MS_WIN(addr) (addr & 0x0ffc0000)
21 #define QLA82XX_PCI_MN_2M (0)
22 #define QLA82XX_PCI_MS_2M (0x80000)
23 #define QLA82XX_PCI_OCM0_2M (0xc0000)
24 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
28 #define CRB_BLK(off) ((off >> 20) & 0x3f)
29 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
30 #define CRB_WINDOW_2M (0x130060)
[all …]

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