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/linux/arch/arm/nwfpe/
H A Dfpa11.c27 for (i = 0; i <= 7; i++) { in resetFPA11()
79 memset(fpa11, 0, sizeof(FPA11)); in nwfpe_init_fpa()
92 code = opcode & 0x00000f00; in EmulateAll()
93 if (code == 0x00000100 || code == 0x00000200) { in EmulateAll()
95 code = opcode & 0x0e000000; in EmulateAll()
96 if (code == 0x0e000000) { in EmulateAll()
97 if (opcode & 0x00000010) { in EmulateAll()
107 } else if (code == 0x0c000000) { in EmulateAll()
115 return 0; in EmulateAll()
H A Dentry.S50 EmulateAll returns 1 if the emulation was successful, or 0 if not.
83 cmp r0, #0 @ was emulation successful
91 and r2, r6, #0x0F000000 @ test for FP insns
92 teq r2, #0x0C000000
93 teqne r2, #0x0D000000
94 teqne r2, #0x0E000000
138 tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27
140 and r8, r0, #0x00000f00 @ mask out CP number
144 rsbs r7, r8, #(1 << 8) @ CP 0 or 1 only
152 ret lr @ CP#0
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am64.dtsi54 ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
58 <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
59 <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
61 <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00000100>, /* Main RTI0 */
63 <0x00 0x0e010000 0x00 0x0e010000 0x00 0x00000100>, /* Main RTI1 */
[all …]
H A Dk3-am62l.dtsi35 arm,smc-id = <0x82004000>;
38 #size-cells = <0>;
41 reg = <0x14>;
47 reg = <0x11>;
69 ranges = <0x00 0x00600000 0x00 0x00600000 0x00 0x00010100>, /* GPIO */
70 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First Peripheral Window */
71 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000400>, /* Timesync Router */
72 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* CPSW */
73 <0x00 0x09000000 0x00 0x09000000 0x00 0x00400000>, /* CTRL MMRs */
74 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x1a001400>, /* Second Peripheral Window */
[all …]
H A Dk3-am62.dtsi77 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
78 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
79 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
80 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
81 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
82 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
83 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
84 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
85 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
86 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
H A Dk3-am62a.dtsi81 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
82 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
83 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
84 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
85 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
86 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
87 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
88 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
89 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
90 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
/linux/arch/m68k/include/asm/
H A Dpage_offset.h7 #define PAGE_OFFSET_RAW 0x0E000000
9 #define PAGE_OFFSET_RAW 0x00000000
H A Dpgtable_mm.h33 } while(0)
76 #define KMAP_START 0x0dc00000
77 #define KMAP_END 0x0e000000
79 #define KMAP_START 0xe0000000
80 #define KMAP_END 0xf0000000
82 #define KMAP_START 0xdf000000
83 #define KMAP_END 0xff000000
85 #define KMAP_START 0xd0000000
86 #define KMAP_END 0xf0000000
91 #define VMALLOC_START 0x0f800000
[all …]
/linux/arch/mips/boot/dts/mscc/
H A Docelot_pcb123.dts15 memory@0 {
17 reg = <0x0 0x0e000000>;
32 flash@0 {
35 reg = <0>;
H A Docelot_pcb120.dts18 memory@0 {
20 reg = <0x0 0x0e000000>;
43 pinctrl-0 = <&miim1_pins>, <&phy_int_pins>, <&phy_load_save_pins>;
45 phy7: ethernet-phy@0 {
46 reg = <0>;
/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra-ccplex-cluster.yaml21 pattern: "ccplex@([0-9a-f]+)$"
48 reg = <0x0e000000 0x5ffff>;
/linux/arch/arm/mach-pxa/
H A Dpxa-regs.h14 #define UNCACHED_PHYS_0 0xfe000000
15 #define UNCACHED_PHYS_0_SIZE 0x00100000
20 * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
21 * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
22 * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
23 * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
24 * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
25 * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
26 * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
31 #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
[all …]
/linux/arch/arm/probes/
H A Ddecode-arm.c19 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
21 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
72 regs->ARM_pc = iaddr + 8 + disp + ((insn >> 23) & 0x2); in simulate_blx1()
79 int rm = insn & 0xf; in simulate_blx2bx()
85 regs->ARM_pc = rmv & ~0x1; in simulate_blx2bx()
87 if (rmv & 0x1) in simulate_blx2bx()
94 int rd = (insn >> 12) & 0xf; in simulate_mrs()
95 unsigned long mask = 0xf8ff03df; /* Mask out execution state */ in simulate_mrs()
122 DECODE_SIMULATE (0xfe300000, 0xf4100000, PROBES_PRELOAD_IMM),
128 DECODE_SIMULATE (0xfe300010, 0xf6100000, PROBES_PRELOAD_REG),
[all …]
/linux/arch/powerpc/include/asm/
H A Dreg_8xx.h29 #define SPRN_EID 81 /* External interrupt disable (EE=0, RI=1) */
30 #define SPRN_NRI 82 /* Non recoverable interrupt (EE=0, RI=0) */
38 #define LCTRL1_CTE_GT 0xc0000000
39 #define LCTRL1_CTF_LT 0x14000000
40 #define LCTRL1_CRWE_RW 0x00000000
41 #define LCTRL1_CRWE_RO 0x00040000
42 #define LCTRL1_CRWE_WO 0x000c0000
43 #define LCTRL1_CRWF_RW 0x00000000
44 #define LCTRL1_CRWF_RO 0x00010000
45 #define LCTRL1_CRWF_WO 0x00030000
[all …]
/linux/arch/mips/boot/dts/brcm/
H A Dbcm3384_viper.dtsi7 memory@0 {
11 reg = <0x06000000 0x02000000>,
12 <0x0e000000 0x02000000>;
17 #size-cells = <0>;
22 cpu@0 {
25 reg = <0>;
30 #address-cells = <0>;
40 #clock-cells = <0>;
59 reg = <0x14e00048 0x4 0x14e0004c 0x4>,
60 <0x14e00350 0x4 0x14e00354 0x4>;
[all …]
/linux/drivers/net/ethernet/intel/igbvf/
H A Ddefines.h12 #define E1000_IVAR_VALID 0x80
15 #define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */
16 #define E1000_RXD_STAT_EOP 0x02 /* End of Packet */
17 #define E1000_RXD_STAT_IXSM 0x04 /* Ignore checksum */
18 #define E1000_RXD_STAT_VP 0x08 /* IEEE VLAN Packet */
19 #define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */
20 #define E1000_RXD_STAT_TCPCS 0x20 /* TCP xsum calculated */
21 #define E1000_RXD_STAT_IPCS 0x40 /* IP xsum calculated */
22 #define E1000_RXD_ERR_SE 0x02 /* Symbol Error */
23 #define E1000_RXD_SPC_VLAN_MASK 0x0FFF /* VLAN ID is in lower 12 bits */
[all …]
/linux/drivers/gpu/drm/mcde/
H A Dmcde_drm.h13 #define MCDE_CR 0x00000000
14 #define MCDE_CR_IFIFOEMPTYLINECOUNT_V422_SHIFT 0
15 #define MCDE_CR_IFIFOEMPTYLINECOUNT_V422_MASK 0x0000003F
22 #define MCDE_CONF0 0x00000004
23 #define MCDE_CONF0_SYNCMUX0 BIT(0)
32 #define MCDE_CONF0_IFIFOCTRLWTRMRKLVL_MASK 0x00007000
34 #define MCDE_CONF0_OUTMUX0_MASK 0x00070000
36 #define MCDE_CONF0_OUTMUX1_MASK 0x00380000
38 #define MCDE_CONF0_OUTMUX2_MASK 0x01C00000
40 #define MCDE_CONF0_OUTMUX3_MASK 0x0E000000
[all …]
/linux/arch/mips/include/asm/dec/
H A Dkn02xa.h22 #define KN02XA_SLOT_BASE 0x1c000000
27 #define KN02XA_MER 0x0c400000 /* memory error register */
28 #define KN02XA_MSR 0x0c800000 /* memory size register */
33 #define KN02XA_MEM_CONF 0x0e000000 /* write timeout config */
34 #define KN02XA_EAR 0x0e000004 /* error address register */
35 #define KN02XA_BOOT0 0x0e000008 /* boot 0 register */
36 #define KN02XA_MEM_INTR 0x0e00000c /* write err IRQ stat & ack */
42 #define KN02XA_MER_RES_28 (0xf<<28) /* unused */
43 #define KN02XA_MER_RES_17 (0x3ff<<17) /* unused */
49 #define KN02XA_MER_BYTERR (0xf<<8) /* byte lane error bitmask: */
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl-colibri-eval-v3.dts37 #clock-cells = <0>;
47 mcp251x0: mcp251x@0 {
51 interrupts = <27 0x2>;
52 reg = <0>;
67 reg = <0x68>;
73 pinctrl-0 = <
132 ranges = <0 0 0x08000000 0x02000000
133 1 0 0x0a000000 0x02000000
134 2 0 0x0c000000 0x02000000
135 3 0 0x0e000000 0x02000000>;
[all …]
H A Dimx53-sk-imx53.dts29 reg = <0x70000000 0x20000000>;
53 pinctrl-0 = <&pinctrl_audmux>;
59 pinctrl-0 = <&pinctrl_can1>;
75 pinctrl-0 = <&pinctrl_ecspi1>;
82 pinctrl-0 = <&pinctrl_ecspi2>;
91 pinctrl-0 = <&pinctrl_esdhc1>;
97 pinctrl-0 = <&pinctrl_fec>;
105 #size-cells = <0>;
107 phy0: ethernet-phy@0 {
108 reg = <0>;
[all …]
/linux/arch/mips/include/asm/ip32/
H A Dcrime.h18 #define CRIME_BASE 0x14000000 /* physical */
22 #define CRIME_ID_MASK 0xff
23 #define CRIME_ID_IDBITS 0xf0
24 #define CRIME_ID_IDVALUE 0xa0
25 #define CRIME_ID_REV 0x0f
26 #define CRIME_REV_PETTY 0x00
27 #define CRIME_REV_11 0x11
28 #define CRIME_REV_13 0x13
29 #define CRIME_REV_14 0x14
32 #define CRIME_CONTROL_MASK 0x3fff
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
H A Dgk104.c36 nvkm_wr32(device, 0x00c800, 0x00000000); in magic_()
37 nvkm_wr32(device, 0x00c808, 0x00000000); in magic_()
38 nvkm_wr32(device, 0x00c800, ctrl); in magic_()
40 if (nvkm_rd32(device, 0x00c800) & 0x40000000) { in magic_()
42 nvkm_wr32(device, 0x00c804, 0x00000000); in magic_()
46 nvkm_wr32(device, 0x00c800, 0x00000000); in magic_()
52 magic_(device, 0x8000a41f | ctrl, 6); in magic()
53 magic_(device, 0x80000421 | ctrl, 1); in magic()
61 if (!(nvkm_fuse_read(device->fuse, 0x31c) & 0x00000001)) in gk104_pmu_pgob()
64 nvkm_mask(device, 0x000200, 0x00001000, 0x00000000); in gk104_pmu_pgob()
[all …]
/linux/arch/sparc/include/asm/
H A Diommu_32.h45 #define IOMMU_CTRL_IMPL 0xf0000000 /* Implementation */
46 #define IOMMU_CTRL_VERS 0x0f000000 /* Version */
47 #define IOMMU_CTRL_RNGE 0x0000001c /* Mapping RANGE */
48 #define IOMMU_RNGE_16MB 0x00000000 /* 0xff000000 -> 0xffffffff */
49 #define IOMMU_RNGE_32MB 0x00000004 /* 0xfe000000 -> 0xffffffff */
50 #define IOMMU_RNGE_64MB 0x00000008 /* 0xfc000000 -> 0xffffffff */
51 #define IOMMU_RNGE_128MB 0x0000000c /* 0xf8000000 -> 0xffffffff */
52 #define IOMMU_RNGE_256MB 0x00000010 /* 0xf0000000 -> 0xffffffff */
53 #define IOMMU_RNGE_512MB 0x00000014 /* 0xe0000000 -> 0xffffffff */
54 #define IOMMU_RNGE_1GB 0x00000018 /* 0xc0000000 -> 0xffffffff */
[all …]
/linux/arch/mips/include/asm/mach-db1x00/
H A Dbcsr.h23 #define DB1000_BCSR_PHYS_ADDR 0x0E000000
24 #define DB1000_BCSR_HEXLED_OFS 0x01000000
26 #define DB1550_BCSR_PHYS_ADDR 0x0F000000
27 #define DB1550_BCSR_HEXLED_OFS 0x00400000
29 #define PB1550_BCSR_PHYS_ADDR 0x0F000000
30 #define PB1550_BCSR_HEXLED_OFS 0x00800000
32 #define DB1200_BCSR_PHYS_ADDR 0x19800000
33 #define DB1200_BCSR_HEXLED_OFS 0x00400000
35 #define PB1200_BCSR_PHYS_ADDR 0x0D800000
36 #define PB1200_BCSR_HEXLED_OFS 0x00400000
[all …]
/linux/drivers/net/wireless/ath/ath9k/
H A Dar9003_eeprom.h22 #define AR9300_EEP_VER 0xD000
23 #define AR9300_EEP_VER_MINOR_MASK 0xFFF
24 #define AR9300_EEP_MINOR_VER_1 0x1
41 #define AR9300_EEPMISC_WOW 0x02
48 #define AR9300_PAPRD_RATE_MASK 0x01ffffff
49 #define AR9300_PAPRD_SCALE_1 0x0e000000
51 #define AR9300_PAPRD_SCALE_2 0x70000000
54 #define AR9300_EEP_ANTDIV_CONTROL_DEFAULT_VALUE 0xc9
63 #define AR9300_PWR_TABLE_OFFSET 0
78 #define AR9300_BASE_ADDR_4K 0xfff
[all …]

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