xref: /linux/arch/mips/boot/dts/mscc/ocelot_pcb123.dts (revision 762f99f4f3cb41a775b5157dd761217beba65873)

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2017 Microsemi Corporation */

/dts-v1/;

#include "ocelot.dtsi"

/ {
	compatible = "mscc,ocelot-pcb123", "mscc,ocelot";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x0e000000>;
	};
};

&uart0 {
	status = "okay";
};

&uart2 {
	status = "okay";
};

&spi {
	status = "okay";

	flash@0 {
		compatible = "macronix,mx25l25635f", "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&i2c {
	clock-frequency = <100000>;
	i2c-sda-hold-time-ns = <300>;
	status = "okay";
};

&mdio0 {
	status = "okay";
};

&port0 {
	status = "okay";
	phy-handle = <&phy0>;
	phy-mode = "internal";
};

&port1 {
	status = "okay";
	phy-handle = <&phy1>;
	phy-mode = "internal";
};

&port2 {
	status = "okay";
	phy-handle = <&phy2>;
	phy-mode = "internal";
};

&port3 {
	status = "okay";
	phy-handle = <&phy3>;
	phy-mode = "internal";
};