Home
last modified time | relevance | path

Searched +full:0 +full:x00000800 (Results 1 – 25 of 471) sorted by relevance

12345678910>>...19

/freebsd/sys/dev/lge/
H A Dif_lgereg.h37 #define LGE_MODE1 0x00 /* CSR00 */
38 #define LGE_MODE2 0x04 /* CSR01 */
39 #define LGE_PPTXBUF_IDX 0x08 /* CSR02 */
40 #define LGE_PRODID 0x0C /* CSR03 */
41 #define LGE_PPTXBUF_ADDR_LO 0x10 /* CSR04 */
42 #define LGE_PPTXBUF_ADDR_HI 0x14 /* CSR05 */
43 #define LGE_RSVD0 0x18 /* CSR06 */
44 #define LGE_PPRXBUF_IDX 0x1C /* CSR07 */
45 #define LGE_PPRXBUF_ADDR_LO 0x20 /* CSR08 */
46 #define LGE_PPRXBUF_ADDR_HI 0x24 /* CSR09 */
[all …]
/freebsd/sys/dev/dc/
H A Dif_dcreg.h39 #define DC_BUSCTL 0x00 /* bus control */
40 #define DC_TXSTART 0x08 /* tx start demand */
41 #define DC_RXSTART 0x10 /* rx start demand */
42 #define DC_RXADDR 0x18 /* rx descriptor list start addr */
43 #define DC_TXADDR 0x20 /* tx descriptor list start addr */
44 #define DC_ISR 0x28 /* interrupt status register */
45 #define DC_NETCFG 0x30 /* network config register */
46 #define DC_IMR 0x38 /* interrupt mask */
47 #define DC_FRAMESDISCARDED 0x40 /* # of discarded frames */
48 #define DC_SIO 0x48 /* MII and ROM/EEPROM access */
[all …]
/freebsd/sys/dev/alc/
H A Dif_alcreg.h36 #define VENDORID_ATHEROS 0x1969
41 #define DEVICEID_ATHEROS_AR8131 0x1063 /* L1C */
42 #define DEVICEID_ATHEROS_AR8132 0x1062 /* L2C */
43 #define DEVICEID_ATHEROS_AR8151 0x1073 /* L1D V1.0 */
44 #define DEVICEID_ATHEROS_AR8151_V2 0x1083 /* L1D V2.0 */
45 #define DEVICEID_ATHEROS_AR8152_B 0x2060 /* L2C V1.1 */
46 #define DEVICEID_ATHEROS_AR8152_B2 0x2062 /* L2C V2.0 */
47 #define DEVICEID_ATHEROS_AR8161 0x1091
48 #define DEVICEID_ATHEROS_AR8162 0x1090
49 #define DEVICEID_ATHEROS_AR8171 0x10A1
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dnvidia,tegra20-pcie.txt27 - cell 0 specifies the bus and device numbers of the root port:
30 - cell 1 denotes the upper 32 address bits and should be 0
45 - 0x81000000: I/O memory region
46 - 0x82000000: non-prefetchable memory region
47 - 0xc2000000: prefetchable memory region
73 - pinctrl-0: phandle for the default/active state of pin configurations.
104 - If lanes 0 to 3 are used:
150 - Root port 0 uses 4 lanes, root port 1 is unused.
158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes.
171 reg = <0x80003000 0x00000800 /* PADS registers */
[all …]
/freebsd/sys/dev/age/
H A Dif_agereg.h36 #define VENDORID_ATTANSIC 0x1969
41 #define DEVICEID_ATTANSIC_L1 0x1048
43 #define AGE_VPD_REG_CONF_START 0x0100
44 #define AGE_VPD_REG_CONF_END 0x01FF
45 #define AGE_VPD_REG_CONF_SIG 0x5A
47 #define AGE_SPI_CTRL 0x200
48 #define SPI_STAT_NOT_READY 0x00000001
49 #define SPI_STAT_WR_ENB 0x00000002
50 #define SPI_STAT_WRP_ENB 0x00000080
51 #define SPI_INST_MASK 0x000000FF
[all …]
/freebsd/contrib/llvm-project/clang/lib/Headers/
H A Dcpuid.h3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
17 /* Responses identification request with %eax 0 */
19 #define signature_AMD_ebx 0x68747541
20 #define signature_AMD_edx 0x69746e65
21 #define signature_AMD_ecx 0x444d4163
23 #define signature_CENTAUR_ebx 0x746e6543
24 #define signature_CENTAUR_edx 0x48727561
25 #define signature_CENTAUR_ecx 0x736c7561
27 #define signature_CYRIX_ebx 0x69727943
28 #define signature_CYRIX_edx 0x736e4978
[all …]
/freebsd/sys/dev/sound/macio/
H A Ddavbusreg.h36 #define DAVBUS_SOUND_CTRL 0x00
37 #define DAVBUS_CODEC_CTRL 0x10
38 #define DAVBUS_CODEC_STATUS 0x20
39 #define DAVBUS_CLIP_COUNT 0x30
40 #define DAVBUS_BYTE_SWAP 0x40
44 * but the controller itself uses subframe 0 to communicate with the codec.
49 #define DAVBUS_INPUT_SUBFRAME0 0x00000001
50 #define DAVBUS_INPUT_SUBFRAME1 0x00000002
51 #define DAVBUS_INPUT_SUBFRAME2 0x00000004
52 #define DAVBUS_INPUT_SUBFRAME3 0x00000008
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212.ini21 { 0x00001040, 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f },
22 { 0x00001044, 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f },
23 { 0x00001048, 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f },
24 { 0x0000104c, 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f },
25 { 0x00001050, 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f },
26 { 0x00001054, 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f },
27 { 0x00001058, 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f },
28 { 0x0000105c, 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f },
29 { 0x00001060, 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f },
30 { 0x00001064, 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f },
[all …]
/freebsd/contrib/bearssl/src/symcipher/
H A Ddes_tab.c30 * order (rightmost bit is 0).
36 4, 14, 18, 8, 17, 0, 19
46 24, 7, 13, 0, 21, 17, 1
53 0x00808200, 0x00000000, 0x00008000, 0x00808202,
54 0x00808002, 0x00008202, 0x00000002, 0x00008000,
55 0x00000200, 0x00808200, 0x00808202, 0x00000200,
56 0x00800202, 0x00808002, 0x00800000, 0x00000002,
57 0x00000202, 0x00800200, 0x00800200, 0x00008200,
58 0x00008200, 0x00808000, 0x00808000, 0x00800202,
59 0x00008002, 0x00800002, 0x00800002, 0x00008002,
[all …]
/freebsd/sys/sys/
H A D_termios.h42 #define VEOF 0 /* ICANON */
77 #define _POSIX_VDISABLE 0xff
82 #define IGNBRK 0x00000001 /* ignore BREAK condition */
83 #define BRKINT 0x00000002 /* map BREAK to SIGINTR */
84 #define IGNPAR 0x00000004 /* ignore (discard) parity errors */
85 #define PARMRK 0x00000008 /* mark parity and framing errors */
86 #define INPCK 0x00000010 /* enable checking of parity errors */
87 #define ISTRIP 0x00000020 /* strip 8th bit off chars */
88 #define INLCR 0x00000040 /* map NL into CR */
89 #define IGNCR 0x00000080 /* ignore CR */
[all …]
/freebsd/sys/x86/include/
H A Dspecialreg.h38 #define CR0_PE 0x00000001 /* Protected mode Enable */
39 #define CR0_MP 0x00000002 /* "Math" (fpu) Present */
40 #define CR0_EM 0x00000004 /* EMulate FPU instructions. (trap ESC only) */
41 #define CR0_TS 0x00000008 /* Task Switched (if MP, trap ESC and WAIT) */
42 #define CR0_PG 0x80000000 /* PaGing enable */
47 #define CR0_NE 0x00000020 /* Numeric Error enable (EX16 vs IRQ13) */
48 #define CR0_WP 0x00010000 /* Write Protect (honor page protect in
50 #define CR0_AM 0x00040000 /* Alignment Mask (set to enable AC flag) */
51 #define CR0_NW 0x20000000 /* Not Write-through */
52 #define CR0_CD 0x40000000 /* Cache Disable */
[all …]
H A Dapicreg.h40 * is 0xfee00000.
55 * 0A0 Processor Priority Register R
56 * 0B0 EOI Register W
57 * 0C0 RRR Remote read R
58 * 0D0 Logical Destination R/W
59 * 0E0 Destination Format Register 0..27 R; 28..31 R/W
60 * 0F0 SVR Spurious Interrupt Vector Reg. 0..3 R; 4..9 R/W
93 * 300 ICR_LOW Interrupt Command Reg. (0-31) R/W
195 LAPIC_ID = 0x2,
196 LAPIC_VERSION = 0x3,
[all …]
/freebsd/sys/dev/igc/
H A Digc_base.h43 #define IGC_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */
44 #define IGC_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */
45 #define IGC_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */
46 #define IGC_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */
47 #define IGC_ADVTXD_DCMD_RS 0x08000000 /* Report Status */
48 #define IGC_ADVTXD_DCMD_DDTYP_ISCSI 0x10000000 /* DDP hdr type or iSCSI */
49 #define IGC_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */
50 #define IGC_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */
51 #define IGC_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */
52 #define IGC_ADVTXD_MAC_LINKSEC 0x00040000 /* Apply LinkSec on pkt */
[all …]
/freebsd/sys/dev/nge/
H A Dif_ngereg.h36 #define NGE_CSR 0x00
37 #define NGE_CFG 0x04
38 #define NGE_MEAR 0x08
39 #define NGE_PCITST 0x0C
40 #define NGE_ISR 0x10
41 #define NGE_IMR 0x14
42 #define NGE_IER 0x18
43 #define NGE_IHR 0x1C
44 #define NGE_TX_LISTPTR_LO 0x20
45 #define NGE_TX_LISTPTR_HI 0x24
[all …]
/freebsd/sys/dev/bge/
H A Dif_bgereg.h54 * device register space at offset 0x8000 to read any 32K chunk
60 * accessed directly. NIC memory addresses are offset by 0x01000000.
64 #define BGE_PAGE_ZERO 0x00000000
65 #define BGE_PAGE_ZERO_END 0x000000FF
66 #define BGE_SEND_RING_RCB 0x00000100
67 #define BGE_SEND_RING_RCB_END 0x000001FF
68 #define BGE_RX_RETURN_RING_RCB 0x00000200
69 #define BGE_RX_RETURN_RING_RCB_END 0x000002FF
70 #define BGE_STATS_BLOCK 0x00000300
71 #define BGE_STATS_BLOCK_END 0x00000AFF
[all …]
/freebsd/sys/dev/rtwn/rtl8188e/
H A Dr88e_reg.h29 #define R88E_BB_PAD_CTRL 0x064
30 #define R88E_HIMR 0x0b0
31 #define R88E_HISR 0x0b4
32 #define R88E_HIMRE 0x0b8
33 #define R88E_HISRE 0x0bc
34 #define R88E_XCK_OUT_CTRL 0x07c
36 #define R88E_32K_CTRL 0x194
37 #define R88E_HMEBOX_EXT(idx) (0x1f0 + (idx) * 4)
39 #define R88E_TXPKTBUF_BCNQ1_BDNY 0x457
40 #define R88E_MACID_NO_LINK 0x484
[all …]
/freebsd/sys/dev/jme/
H A Dif_jmereg.h36 #define VENDORID_JMICRON 0x197B
41 #define DEVICEID_JMC250 0x0250
42 #define DEVICEREVID_JMC250_A0 0x00
43 #define DEVICEREVID_JMC250_A2 0x11
48 #define DEVICEID_JMC260 0x0260
49 #define DEVICEREVID_JMC260_A0 0x00
51 #define DEVICEID_JMC2XX_MASK 0x0FF0
54 #define JME_PCI_BAR0 0x10 /* 16KB memory window. */
56 #define JME_PCI_BAR1 0x18 /* 128bytes I/O window. */
58 #define JME_PCI_BAR2 0x1C /* 256bytes I/O window. */
[all …]
/freebsd/crypto/heimdal/lib/ntlm/
H A Dheimntlm.h48 #define NTLM_NEG_UNICODE 0x00000001
49 #define NTLM_NEG_OEM 0x00000002
50 #define NTLM_NEG_TARGET 0x00000004
51 #define NTLM_MBZ9 0x00000008
53 #define NTLM_NEG_SIGN 0x00000010
54 #define NTLM_NEG_SEAL 0x00000020
55 #define NTLM_NEG_DATAGRAM 0x00000040
56 #define NTLM_NEG_LM_KEY 0x00000080
57 #define NTLM_NEG_NTLM 0x00000200
58 #define NTLM_NEG_ANONYMOUS 0x00000800
[all …]
/freebsd/sys/powerpc/mpc85xx/
H A Dfsl_sata.h32 #define ATA_F_DMA 0x01 /* enable DMA */
33 #define ATA_F_OVL 0x02 /* enable overlap */
41 #define ATA_D_LBA 0x40 /* use LBA addressing */
42 #define ATA_D_IBM 0xa0 /* 512 byte sectors, ECC */
47 #define ATA_E_ILI 0x01 /* illegal length */
48 #define ATA_E_NM 0x02 /* no media */
49 #define ATA_E_ABORT 0x04 /* command aborted */
50 #define ATA_E_MCR 0x08 /* media change request */
51 #define ATA_E_IDNF 0x10 /* ID not found */
52 #define ATA_E_MC 0x20 /* media changed */
[all …]
/freebsd/sys/dev/cxgbe/firmware/
H A Dt6fw_cfg_hashfilter.txt19 reg[0x10c4] = 0x20000000/0x20000000 # GK_CONTROL, enable 5th thread
21 reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT
32 # TP number of RX channels (0 = auto)
33 tp_nrxch = 0
38 # TP number of TX channels (0 = auto)
39 tp_ntxch = 0
45 reg[0x7d04] = 0x00010008/0x00010008
48 reg[0x7d08] = 0x00000800/0x00000800 # set IssFromCplEnable
51 reg[0x7d48] = 0x00000000/0x00000400 # clear EnableFLMError
54 reg[0x7d4c] = 0x00010000/0x00010000 # set DisableNewPshFlag
[all …]
/freebsd/sys/compat/linux/
H A Dlinux_file.h33 #define LINUX_AT_SYMLINK_NOFOLLOW 0x100
34 #define LINUX_AT_EACCESS 0x200
35 #define LINUX_AT_REMOVEDIR 0x200
36 #define LINUX_AT_SYMLINK_FOLLOW 0x400
37 #define LINUX_AT_NO_AUTOMOUNT 0x800
44 #define LINUX_AT_EMPTY_PATH 0x1000
49 #define LINUX_POSIX_FADV_NORMAL 0
59 #define LINUX_MS_RDONLY 0x0001
60 #define LINUX_MS_NOSUID 0x0002
61 #define LINUX_MS_NODEV 0x0004
[all …]
/freebsd/sys/dev/e1000/
H A De1000_base.h71 #define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */
72 #define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */
73 #define E1000_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */
74 #define E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */
75 #define E1000_ADVTXD_DCMD_RS 0x08000000 /* Report Status */
76 #define E1000_ADVTXD_DCMD_DDTYP_ISCSI 0x10000000 /* DDP hdr type or iSCSI */
77 #define E1000_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */
78 #define E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */
79 #define E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */
80 #define E1000_ADVTXD_MAC_LINKSEC 0x00040000 /* Apply LinkSec on pkt */
[all …]
/freebsd/sys/dev/ath/ath_hal/
H A Dah_btcoex.h26 HAL_BT_MODULE_CSR_BC4 = 0, /* CSR BlueCore v4 */
44 HAL_BT_COEX_MODE_LEGACY = 0, /* legacy rx_clear mode */
60 HAL_BT_COEX_SET_ACK_PWR = 0, /* Change ACK power setting */
71 #define HAL_BT_COEX_FLAG_LOW_ACK_PWR 0x00000001
72 #define HAL_BT_COEX_FLAG_LOWER_TX_PWR 0x00000002
74 #define HAL_BT_COEX_FLAG_ANT_DIV_ALLOW 0x00000004
76 #define HAL_BT_COEX_FLAG_ANT_DIV_ENABLE 0x00000008
78 #define HAL_BT_COEX_ANTDIV_CONTROL1_ENABLE 0x0b
80 #define HAL_BT_COEX_ANTDIV_CONTROL2_ENABLE 0x09
81 #define HAL_BT_COEX_ANTDIV_CONTROL1_FIXED_A 0x04
[all …]
/freebsd/crypto/libecc/src/examples/hash/
H A Dtdes.c24 } while( 0 )
34 } while( 0 )
40 0x01010400, 0x00000000, 0x00010000, 0x01010404,
41 0x01010004, 0x00010404, 0x00000004, 0x00010000,
42 0x00000400, 0x01010400, 0x01010404, 0x00000400,
43 0x01000404, 0x01010004, 0x01000000, 0x00000004,
44 0x00000404, 0x01000400, 0x01000400, 0x00010400,
45 0x00010400, 0x01010000, 0x01010000, 0x01000404,
46 0x00010004, 0x01000004, 0x01000004, 0x00010004,
47 0x00000000, 0x00000404, 0x00010404, 0x01000000,
[all …]
/freebsd/sys/dev/sk/
H A Dif_skreg.h54 #define SK_GENESIS 0x0A
55 #define SK_YUKON 0xB0
56 #define SK_YUKON_LITE 0xB1
57 #define SK_YUKON_LP 0xB2
58 #define SK_YUKON_FAMILY(x) ((x) & 0xB0)
61 #define SK_YUKON_LITE_REV_A0 0x0 /* invented, see test in skc_attach. */
62 #define SK_YUKON_LITE_REV_A1 0x3
63 #define SK_YUKON_LITE_REV_A3 0x7
68 #define VENDORID_SK 0x1148
73 #define VENDORID_MARVELL 0x11AB
[all …]

12345678910>>...19