Lines Matching +full:0 +full:x00000800
71 #define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */
72 #define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */
73 #define E1000_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */
74 #define E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */
75 #define E1000_ADVTXD_DCMD_RS 0x08000000 /* Report Status */
76 #define E1000_ADVTXD_DCMD_DDTYP_ISCSI 0x10000000 /* DDP hdr type or iSCSI */
77 #define E1000_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */
78 #define E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */
79 #define E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */
80 #define E1000_ADVTXD_MAC_LINKSEC 0x00040000 /* Apply LinkSec on pkt */
81 #define E1000_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 Timestamp pkt */
82 #define E1000_ADVTXD_STAT_SN_CRC 0x00000002 /* NXTSEQ/SEED prsnt in WB */
84 #define E1000_ADVTXD_POPTS_ISCO_1ST 0x00000000 /* 1st TSO of iSCSI PDU */
85 #define E1000_ADVTXD_POPTS_ISCO_MDL 0x00000800 /* Middle TSO of iSCSI PDU */
86 #define E1000_ADVTXD_POPTS_ISCO_LAST 0x00001000 /* Last TSO of iSCSI PDU */
88 #define E1000_ADVTXD_POPTS_ISCO_FULL 0x00001800
89 #define E1000_ADVTXD_POPTS_IPSEC 0x00000400 /* IPSec offload request */
95 #define E1000_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */
96 #define E1000_ADVTXD_TUCMD_IPV6 0x00000000 /* IP Packet Type: 0=IPv6 */
97 #define E1000_ADVTXD_TUCMD_L4T_UDP 0x00000000 /* L4 Packet TYPE of UDP */
98 #define E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */
99 #define E1000_ADVTXD_TUCMD_L4T_SCTP 0x00001000 /* L4 Packet TYPE of SCTP */
100 #define E1000_ADVTXD_TUCMD_IPSEC_TYPE_ESP 0x00002000 /* IPSec Type ESP */
102 #define E1000_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN 0x00004000
104 #define E1000_ADVTXD_TUCMD_MKRREQ 0x00002000
108 #define E1000_ADVTXD_IPSEC_SA_INDEX_MASK 0x000000FF
110 #define E1000_ADVTXD_IPSEC_ESP_LEN_MASK 0x000000FF
147 #define E1000_TXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Tx Queue */
150 #define E1000_RXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Rx Queue */
155 #define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF 0x02000000