sys: Remove $FreeBSD$: two-line .h pattern

Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.

Discussed with: pfg
MFC After: 3 days
Sponsored by: Netflix

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sys/dev: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error

sys/dev: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.

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Merge from head

- Merge from HEAD

o Don't access VPD even if hardware advertised the capability.
It seems that some revision of controller hang while accessing
the VPD. Because VPD access routine are unused, nuke it.
o Let TWSI r

o Don't access VPD even if hardware advertised the capability.
It seems that some revision of controller hang while accessing
the VPD. Because VPD access routine are unused, nuke it.
o Let TWSI reload EEPROM if VPD capability is detected. Reloading
EEPROM will also set ethernet address so age(4) now reads AGE_PAR0
and AGE_PAR1 register to get ethernet address. This removes a lot
of hack and enhance readability a lot.
o Double PHY reset timeout as it takes more time to take PHY out of
power-saving state.
o Explicitly check power-saving state by checking undocumented PHY
registers. If link is not up, poke undocumented registers to take
PHY out of power-saving state. This is the same way what Linux
does. On resume, make sure to wake up PHY.
o Don't rely on auto-clearing feature of master reset bit, just wait
1ms and check idle status of MAC.
o Add PCI device revision information in bootverbose mode.
This should fix occasional controller hang in device attach phase.

Reported by: barbara < barbara.xxx1975 at libero DOT it >
Tested by: barbara < barbara.xxx1975 at libero DOT it >

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Add age(4), a driver for Attansic/Atheros L1 gigabit ethernet
controller. L1 has several threshold/timer registers and they
seem to require careful tuned parameters to get best
performance. Datasheet

Add age(4), a driver for Attansic/Atheros L1 gigabit ethernet
controller. L1 has several threshold/timer registers and they
seem to require careful tuned parameters to get best
performance. Datasheet for L1 is not available to open source
driver writers so age(4) focus on stability and correctness of
basic Tx/Rx operation. ATM the performance of age(4) is far from
optimal which in turn means there are mis-programmed registers or
incorrectly configured registers.
Currently age(4) supports all known hardware assistance including
- MSI support.
- TCP Segmentation Offload.
- Hardware VLAN tag insertion/stripping.
- TCP/UDP checksum offload.
- Interrupt moderation.
- Hardware statistics counter support.
- Jumbo frame support.
- WOL support.

L1 gigabit ethernet controller is mainly found on ASUS
motherboards. Note, it seems that there are other variants of
hardware as known as L2(Fast ethernet) and newer gigabit ethernet
(AR81xx) from Atheros. These are not supported by age(4) and
requires a seperate driver. Big thanks to all people who reported
feedback or tested patches.

Tested by: kevlo, bsam, Francois Ranchin < fyr AT fyrou DOT net >
Thomas Nystroem < thn AT saeab DOT se >
Roman Pogosyan < asternetadmin AT gmail DOT com >
Derek Tattersal < dlt AT mebtel DOT net >
Oliver Seitz < karlkiste AT yahoo DOT com >

show more ...

- Merge from HEAD

o Don't access VPD even if hardware advertised the capability.
It seems that some revision of controller hang while accessing
the VPD. Because VPD access routine are unused, nuke it.
o Let TWSI r

o Don't access VPD even if hardware advertised the capability.
It seems that some revision of controller hang while accessing
the VPD. Because VPD access routine are unused, nuke it.
o Let TWSI reload EEPROM if VPD capability is detected. Reloading
EEPROM will also set ethernet address so age(4) now reads AGE_PAR0
and AGE_PAR1 register to get ethernet address. This removes a lot
of hack and enhance readability a lot.
o Double PHY reset timeout as it takes more time to take PHY out of
power-saving state.
o Explicitly check power-saving state by checking undocumented PHY
registers. If link is not up, poke undocumented registers to take
PHY out of power-saving state. This is the same way what Linux
does. On resume, make sure to wake up PHY.
o Don't rely on auto-clearing feature of master reset bit, just wait
1ms and check idle status of MAC.
o Add PCI device revision information in bootverbose mode.
This should fix occasional controller hang in device attach phase.

Reported by: barbara < barbara.xxx1975 at libero DOT it >
Tested by: barbara < barbara.xxx1975 at libero DOT it >

show more ...

Add age(4), a driver for Attansic/Atheros L1 gigabit ethernet
controller. L1 has several threshold/timer registers and they
seem to require careful tuned parameters to get best
performance. Datasheet

Add age(4), a driver for Attansic/Atheros L1 gigabit ethernet
controller. L1 has several threshold/timer registers and they
seem to require careful tuned parameters to get best
performance. Datasheet for L1 is not available to open source
driver writers so age(4) focus on stability and correctness of
basic Tx/Rx operation. ATM the performance of age(4) is far from
optimal which in turn means there are mis-programmed registers or
incorrectly configured registers.
Currently age(4) supports all known hardware assistance including
- MSI support.
- TCP Segmentation Offload.
- Hardware VLAN tag insertion/stripping.
- TCP/UDP checksum offload.
- Interrupt moderation.
- Hardware statistics counter support.
- Jumbo frame support.
- WOL support.

L1 gigabit ethernet controller is mainly found on ASUS
motherboards. Note, it seems that there are other variants of
hardware as known as L2(Fast ethernet) and newer gigabit ethernet
(AR81xx) from Atheros. These are not supported by age(4) and
requires a seperate driver. Big thanks to all people who reported
feedback or tested patches.

Tested by: kevlo, bsam, Francois Ranchin < fyr AT fyrou DOT net >
Thomas Nystroem < thn AT saeab DOT se >
Roman Pogosyan < asternetadmin AT gmail DOT com >
Derek Tattersal < dlt AT mebtel DOT net >
Oliver Seitz < karlkiste AT yahoo DOT com >

show more ...