| 65954899 | 25-Feb-2025 |
Amelie Delaunay <amelie.delaunay@foss.st.com> |
arm64: dts: st: add stm32mp215f-dk board support
Add STM32MP215F Discovery Kit board support. It embeds a STM32MP235FAN SoC,
with 2GB of LPDDR4, 1*USB2 peripheral bus powered typeC, 1*ETH, wifi/BT
c
arm64: dts: st: add stm32mp215f-dk board support
Add STM32MP215F Discovery Kit board support. It embeds a STM32MP235FAN SoC,
with 2GB of LPDDR4, 1*USB2 peripheral bus powered typeC, 1*ETH, wifi/BT
combo, LCD 18bit connector, CSI camera connector, ...
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250225-b4-stm32mp2_new_dts-v2-10-1a628c1580c7@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| 7a57b1bb | 25-Feb-2025 |
Alexandre Torgue <alexandre.torgue@foss.st.com> |
arm64: dts: st: introduce stm32mp21 SoCs family
STM32MP21 family is composed of 3 SoCs defined as following:
-STM32MP211: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART,
arm64: dts: st: introduce stm32mp21 SoCs family
STM32MP21 family is composed of 3 SoCs defined as following:
-STM32MP211: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI, I2C, parallel display, 1*ETH ...
-STM32MP213: STM32MP211 + a second ETH, CAN-FD.
-STM32MP215: STM32MP213 + Display and CSI2.
A second diversity layer exists for security features/ A35 frequency:
-STM32MP21xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250225-b4-stm32mp2_new_dts-v2-8-1a628c1580c7@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| c57a222a | 25-Feb-2025 |
Amelie Delaunay <amelie.delaunay@foss.st.com> |
arm64: dts: st: add stm32mp235f-dk board support
Add STM32MP235F Discovery Kit board support. It embeds a STM32MP235FAK
SoC, with 4GB of LPDDR4, 2*USB typeA, 1*USB3 typeC, 1*ETH, wifi/BT
combo, DSI
arm64: dts: st: add stm32mp235f-dk board support
Add STM32MP235F Discovery Kit board support. It embeds a STM32MP235FAK
SoC, with 4GB of LPDDR4, 2*USB typeA, 1*USB3 typeC, 1*ETH, wifi/BT
combo, DSI HDMI, LVDS connector ...
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250225-b4-stm32mp2_new_dts-v2-7-1a628c1580c7@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| e9b03ef2 | 25-Feb-2025 |
Alexandre Torgue <alexandre.torgue@foss.st.com> |
arm64: dts: st: introduce stm32mp23 SoCs family
STM32MP23 family is composed of 3 SoCs defined as following:
-STM32MP231: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART,
arm64: dts: st: introduce stm32mp23 SoCs family
STM32MP23 family is composed of 3 SoCs defined as following:
-STM32MP231: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI, I2C, parallel display, 1*ETH ...
-STM32MP233: STM32MP231 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD.
-STM32MP235: STM32MP233 + GPU/AI and video encode/decode, DSI and LDVS
display.
A second diversity layer exists for security features/ A35 frequency:
-STM32MP23xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250225-b4-stm32mp2_new_dts-v2-5-1a628c1580c7@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| 8df9bff2 | 12-Dec-2024 |
Alain Volmat <alain.volmat@foss.st.com> |
arm64: dts: st: enable imx335/csi/dcmipp pipeline on stm32mp257f-ev1
Enable the camera pipeline with a imx335 sensor connected to the
dcmipp via the csi interface.
Signed-off-by: Alain Volmat <alai
arm64: dts: st: enable imx335/csi/dcmipp pipeline on stm32mp257f-ev1
Enable the camera pipeline with a imx335 sensor connected to the
dcmipp via the csi interface.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| 0df076d3 | 30-Sep-2024 |
Christian Bruel <christian.bruel@foss.st.com> |
arm64: dts: st: Enable COMBOPHY on the stm32mp257f-ev1 board
Enable the COMBOPHY with external pad clock on stm32mp257f-ev1
board, to be used for the PCIe clock provider.
Signed-off-by: Christian B
arm64: dts: st: Enable COMBOPHY on the stm32mp257f-ev1 board
Enable the COMBOPHY with external pad clock on stm32mp257f-ev1
board, to be used for the PCIe clock provider.
Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| 486f87a8 | 30-Sep-2024 |
Christian Bruel <christian.bruel@foss.st.com> |
arm64: dts: st: Add combophy node on stm32mp251
Add support for COMBOPHY which is used either by the USB3 and PCIe
controller.
USB3 or PCIe mode is done with phy_set_mode().
PCIe internal reference
arm64: dts: st: Add combophy node on stm32mp251
Add support for COMBOPHY which is used either by the USB3 and PCIe
controller.
USB3 or PCIe mode is done with phy_set_mode().
PCIe internal reference clock can be generated from the internal clock
source or optionnaly from an external 100Mhz pad.
Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| 7c7abd1b | 05-Nov-2024 |
Olivier Moysan <olivier.moysan@foss.st.com> |
arm64: dts: st: add spdifrx support on stm32mp251
Add S/PDIFRX support to STM32MP25 SoC family.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre
arm64: dts: st: add spdifrx support on stm32mp251
Add S/PDIFRX support to STM32MP25 SoC family.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| bf26d75a | 13-Nov-2024 |
Olivier Moysan <olivier.moysan@foss.st.com> |
arm64: dts: st: add sai support on stm32mp251
Add SAI support to STM32MP25 SoC family.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@f
arm64: dts: st: add sai support on stm32mp251
Add SAI support to STM32MP25 SoC family.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| b0191a5c | 16-Oct-2024 |
Amelie Delaunay <amelie.delaunay@foss.st.com> |
arm64: dts: st: add DMA support on SPI instances of stm32mp25
Add dmas and dma-names properties in spi nodes of stm32mp251.dtsi to
enable DMA support.
Signed-off-by: Amelie Delaunay <amelie.delauna
arm64: dts: st: add DMA support on SPI instances of stm32mp25
Add dmas and dma-names properties in spi nodes of stm32mp251.dtsi to
enable DMA support.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| ceb9f837 | 16-Oct-2024 |
Amelie Delaunay <amelie.delaunay@foss.st.com> |
arm64: dts: st: add DMA support on I2C instances of stm32mp25
Add dmas and dma-names properties in i2c nodes of stm32mp251.dtsi to
enable DMA support.
Signed-off-by: Amelie Delaunay <amelie.delauna
arm64: dts: st: add DMA support on I2C instances of stm32mp25
Add dmas and dma-names properties in i2c nodes of stm32mp251.dtsi to
enable DMA support.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| 1e110e44 | 16-Oct-2024 |
Amelie Delaunay <amelie.delaunay@foss.st.com> |
arm64: dts: st: add DMA support on U(S)ART instances of stm32mp25
Add dmas and dma-names properties in u(s)art nodes of stm32mp251.dtsi to
enable DMA support.
RX channel requires to prevent pack/unp
arm64: dts: st: add DMA support on U(S)ART instances of stm32mp25
Add dmas and dma-names properties in u(s)art nodes of stm32mp251.dtsi to
enable DMA support.
RX channel requires to prevent pack/unpack feature of DMA to avoid losing
bytes when interrupting RX transfer, as it uses a cyclic buffer.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| fab334f4 | 16-Oct-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
arm64: dts: st: add RNG node on stm32mp251
Update the device-tree stm32mp251.dtsi by adding the Random Number
Generator(RNG) node.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
R
arm64: dts: st: add RNG node on stm32mp251
Update the device-tree stm32mp251.dtsi by adding the Random Number
Generator(RNG) node.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| 737245a7 | 27-Aug-2024 |
Valentin Caron <valentin.caron@foss.st.com> |
arm64: dts: st: enable RTC on stm32mp257f-ev1 board
Enable RTC on stm32mp257f-ev1 board.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue
arm64: dts: st: enable RTC on stm32mp257f-ev1 board
Enable RTC on stm32mp257f-ev1 board.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| 419ed754 | 28-Jun-2024 |
Pascal Paillet <p.paillet@foss.st.com> |
arm64: dts: st: describe power supplies for stm32mp257f-ev1 board
Describe power supplies for stm32mp257f-ev1 board.
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Alexandre T
arm64: dts: st: describe power supplies for stm32mp257f-ev1 board
Describe power supplies for stm32mp257f-ev1 board.
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| e0fc47d8 | 19-Jun-2024 |
Christophe Roullier <christophe.roullier@foss.st.com> |
arm64: dts: st: enable Ethernet2 on stm32mp257f-ev1 board
ETHERNET2 instance is connected to Realtek PHY in RGMII mode
Ethernet is SNSP IP with GMAC5 version.
Signed-off-by: Christophe Roullier <ch
arm64: dts: st: enable Ethernet2 on stm32mp257f-ev1 board
ETHERNET2 instance is connected to Realtek PHY in RGMII mode
Ethernet is SNSP IP with GMAC5 version.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| b4c354b1 | 19-Jun-2024 |
Christophe Roullier <christophe.roullier@foss.st.com> |
arm64: dts: st: add eth2 pinctrl entries in stm32mp25-pinctrl.dtsi
Add pinctrl entry related to ETH2 in stm32mp25-pinctrl.dtsi
ethernet2: RGMII with crystal.
Signed-off-by: Christophe Roullier <chr
arm64: dts: st: add eth2 pinctrl entries in stm32mp25-pinctrl.dtsi
Add pinctrl entry related to ETH2 in stm32mp25-pinctrl.dtsi
ethernet2: RGMII with crystal.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| ed4dd5b7 | 19-Jun-2024 |
Christophe Roullier <christophe.roullier@foss.st.com> |
arm64: dts: st: add ethernet1 and ethernet2 support on stm32mp25
Both instances ethernet based on GMAC SNPS IP on stm32mp25.
GMAC IP version is SNPS 5.3
Signed-off-by: Christophe Roullier <christop
arm64: dts: st: add ethernet1 and ethernet2 support on stm32mp25
Both instances ethernet based on GMAC SNPS IP on stm32mp25.
GMAC IP version is SNPS 5.3
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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| 9c8d852d | 25-Apr-2024 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
arm64: dts: st: add power domain on stm32mp25
Add power domains on STM32MP25x SoC for supported low power modes:
- CPU_PD0/1: domain for idle of each core Cortex A35 (CStop)
- CLUSTER_PD: D1 domain
arm64: dts: st: add power domain on stm32mp25
Add power domains on STM32MP25x SoC for supported low power modes:
- CPU_PD0/1: domain for idle of each core Cortex A35 (CStop)
- CLUSTER_PD: D1 domain with Stop1 and LP-Stop1 modes support when
the Cortex A35 cluster and each device assigned to CPU1=CA35
are deactivated
- RET_PD: D1 domain retention (VDDCore is reduced) to support
the LPLV-Stop1 mode
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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