17468 comm page should handle larger NCPUReviewed by: Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org>Reviewed by: Andy Fiddaman <illumos@fiddaman.net>Reviewed by: Dan Cross <cross@oxidecomputer.co
17468 comm page should handle larger NCPUReviewed by: Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org>Reviewed by: Andy Fiddaman <illumos@fiddaman.net>Reviewed by: Dan Cross <cross@oxidecomputer.com>Approved by: Gordon Ross <gordon.w.ross@gmail.com>
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17379 Stop using a fixed size buffer for AMD microcode17381 AMD microcode updater needlessly discards cached fileReviewed by: Robert Mustacchi <rm+illumos@fingolfin.org>Reviewed by: Luqman Aden <l
17379 Stop using a fixed size buffer for AMD microcode17381 AMD microcode updater needlessly discards cached fileReviewed by: Robert Mustacchi <rm+illumos@fingolfin.org>Reviewed by: Luqman Aden <luqman@oxide.computer>Approved by: Patrick Mooney <pmooney@pfmooney.com>
16906 bhyve should support AMD perf countersReviewed by: Greg Colombo <greg@oxidecomputer.com>Reviewed by: ixi meow <illumos@iximeow.net>Approved by: Robert Mustacchi <rm@fingolfin.org>
17054 Strix Halo and Krackan amdzen(4D) support17055 missing families in usmn(4D) and zen_udf(4D)Reviewed by: Andy Fiddaman <illumos@fiddaman.net>Reviewed by: Bill Sommerfeld <sommerfeld@hamachi.o
17054 Strix Halo and Krackan amdzen(4D) support17055 missing families in usmn(4D) and zen_udf(4D)Reviewed by: Andy Fiddaman <illumos@fiddaman.net>Reviewed by: Bill Sommerfeld <sommerfeld@hamachi.org>Approved by: Dan McDonald <danmcd@mnx.io>
17096 CPUs mistakenly showing up with fully-associative cachesReviewed by: Andy Fiddaman <illumos@fiddaman.net>Reviewed by: iximeow <illumos@iximeow.net>Approved by: Dan McDonald <danmcd@mnx.io>
16922 i86pc: support AMD C-statesReviewed by: Robert Mustacchi <rm+illumos@fingolfin.org>Reviewed by: Andy Fiddaman <illumos@fiddaman.net>Approved by: Dan McDonald <danmcd@mnx.io>
16854 CPUID_PASS_IDENT is sufficient for cpuid_getsig16907 Apply microcode updates before CPUID_PASS_BASICReviewed by: Dan McDonald <danmcd@mnx.io>Reviewed by: Andy Fiddaman <illumos@fiddaman.net>
16854 CPUID_PASS_IDENT is sufficient for cpuid_getsig16907 Apply microcode updates before CPUID_PASS_BASICReviewed by: Dan McDonald <danmcd@mnx.io>Reviewed by: Andy Fiddaman <illumos@fiddaman.net>Approved by: Robert Mustacchi <rm@fingolfin.org>
16853 cpuid_pass_basic filling in wrong cpi_extd entry for CPUID_LEAF_EXT_21Reviewed by: Dan McDonald <danmcd@mnx.io>Reviewed by: Robert Mustacchi <rm@fingolfin.org>Reviewed by: Bill Sommerfeld <s
16853 cpuid_pass_basic filling in wrong cpi_extd entry for CPUID_LEAF_EXT_21Reviewed by: Dan McDonald <danmcd@mnx.io>Reviewed by: Robert Mustacchi <rm@fingolfin.org>Reviewed by: Bill Sommerfeld <sommerfeld@hamachi.org>Approved by: Patrick Mooney <pmooney@pfmooney.com>
16222 TSC vmware calibration could be more generalReviewed by: Andy Fiddaman <illumos@fiddaman.net>Reviewed by: Joshua M. Clulow <josh@sysmgr.org>Reviewed by: Jason King <jason.brian.king@gmail.co
16222 TSC vmware calibration could be more generalReviewed by: Andy Fiddaman <illumos@fiddaman.net>Reviewed by: Joshua M. Clulow <josh@sysmgr.org>Reviewed by: Jason King <jason.brian.king@gmail.com>Approved by: Gordon Ross <gordon.w.ross@gmail.com>
16637 Add Zen 5 client cpuid infoReviewed by: Andy Fiddaman <illumos@fiddaman.net>Reviewed by: Dan McDonald <danmcd@mnx.io>Reviewed by: Luqman Aden <luqman@oxide.computer>Approved by: Gordon Ross
16637 Add Zen 5 client cpuid infoReviewed by: Andy Fiddaman <illumos@fiddaman.net>Reviewed by: Dan McDonald <danmcd@mnx.io>Reviewed by: Luqman Aden <luqman@oxide.computer>Approved by: Gordon Ross <gordon.w.ross@gmail.com>
16632 unix: conflicting types for 'cpuid_getchiprev'Reviewed by: Robert Mustacchi <rm@fingolfin.org>Reviewed by: Luqman Aden <luqman@oxide.computer>Approved by: Patrick Mooney <pmooney@pfmooney.co
16632 unix: conflicting types for 'cpuid_getchiprev'Reviewed by: Robert Mustacchi <rm@fingolfin.org>Reviewed by: Luqman Aden <luqman@oxide.computer>Approved by: Patrick Mooney <pmooney@pfmooney.com>
16627 Flesh out AMD Turin chip and Zen 5 uarch revisions.Reviewed by: Robert Mustacchi <rm@fingolfin.org>Reviewed by: Dan Cross <cross@oxidecomputer.com>Approved by: Dan McDonald <danmcd@mnx.io>
16466 cpuid_pass_ucode() may return without calling cpuid_scan_security()Reviewed by: Toomas Soome <tsoome@me.com>Reviewed by: Marco van Wieringen <marco.van.wieringen@planets.elm.net>Approved by:
16466 cpuid_pass_ucode() may return without calling cpuid_scan_security()Reviewed by: Toomas Soome <tsoome@me.com>Reviewed by: Marco van Wieringen <marco.van.wieringen@planets.elm.net>Approved by: Robert Mustacchi <rm@fingolfin.org>
16461 Introduce sequence to clear Branch History Buffer (BHB)Reviewed by: Robert Mustacchi <rm@fingolfin.org>Reviewed by: Andy Fiddaman <illumos@fiddaman.net>Approved by: Gordon Ross <Gordon.W.Ros
16461 Introduce sequence to clear Branch History Buffer (BHB)Reviewed by: Robert Mustacchi <rm@fingolfin.org>Reviewed by: Andy Fiddaman <illumos@fiddaman.net>Approved by: Gordon Ross <Gordon.W.Ross@gmail.com>
16407 Raphael DF revision detection is incorrect16405 initial amdzen family 1ah and cpuid support16406 zen topo should tolerate missing revision or ppin infoReviewed by: Andy Fiddaman <illumos@fid
16407 Raphael DF revision detection is incorrect16405 initial amdzen family 1ah and cpuid support16406 zen topo should tolerate missing revision or ppin infoReviewed by: Andy Fiddaman <illumos@fiddaman.net>Reviewed by: Luqman Aden <luqman@oxide.computer>Approved by: Richard Lowe <richlowe@richlowe.net>
16413 Post-barrier Return Stack Buffer (PBRSB) fixes can be detected in HWReviewed by: Robert Mustacchi <rm@fingolfin.org>Reviewed by: Richard Lowe <richlowe@richlowe.net>Approved by: Gordon Ross
16413 Post-barrier Return Stack Buffer (PBRSB) fixes can be detected in HWReviewed by: Robert Mustacchi <rm@fingolfin.org>Reviewed by: Richard Lowe <richlowe@richlowe.net>Approved by: Gordon Ross <Gordon.W.Ross@gmail.com>
16417 ucodeadm panic in virtual machineReviewed by: Jason King <jason.brian.king+illumos@gmail.com>Reviewed by: Dan McDonald <danmcd@mnx.io>Approved by: Rich Lowe <richlowe@richlowe.net>
16397 Re-enable VERW-using x86_md_clear() function on RFDS-afflicted Intel CPUsReviewed by: Robert Mustacchi <rm@fingolfin.org>Reviewed by: Bill Sommerfeld <sommerfeld@hamachi.org>Approved by: Ric
16397 Re-enable VERW-using x86_md_clear() function on RFDS-afflicted Intel CPUsReviewed by: Robert Mustacchi <rm@fingolfin.org>Reviewed by: Bill Sommerfeld <sommerfeld@hamachi.org>Approved by: Richard Lowe <richlowe@richlowe.net>
16139 unix: we should recognize qemuReviewed by: Gordon Ross <gordon.w.ross@gmail.com>Reviewed by: Igor Kozhukhov <igor@dilos.org>Reviewed by: Garrett D'Amore <garrett@damore.org>Approved by: Rob
16139 unix: we should recognize qemuReviewed by: Gordon Ross <gordon.w.ross@gmail.com>Reviewed by: Igor Kozhukhov <igor@dilos.org>Reviewed by: Garrett D'Amore <garrett@damore.org>Approved by: Robert Mustacchi <rm@fingolfin.org>
16170 Flesh out AMD Zen4 microarchitecture (core) revisions.Reviewed by: Robert Mustacchi <rm@fingolfin.org>Approved by: Dan McDonald <danmcd@mnx.io>
15951 want Zen specific CPU topology mapping15952 want way of exposing AMD SoC topology to userland15953 /dev/fm should support cache information15954 snapshot new AMD CPUID topology leaves15955
15951 want Zen specific CPU topology mapping15952 want way of exposing AMD SoC topology to userland15953 /dev/fm should support cache information15954 snapshot new AMD CPUID topology leaves15955 want more convenient topo module API for setting propertiesReviewed by: Keith Wesolowski <wesolows@oxide.computer>Reviewed by: Andy Fiddaman <illumos@fiddaman.net>Approved by: Gordon Ross <gordon.w.ross@gmail.com>
15923 Add support for SP6 Socket Types15924 Improve AMD Socket ManagementReviewed by: Andy Fiddaman <illumos@fiddaman.net>Reviewed by: Marco van Wieringen <marco.van.wieringen@planets.elm.net>Rev
15923 Add support for SP6 Socket Types15924 Improve AMD Socket ManagementReviewed by: Andy Fiddaman <illumos@fiddaman.net>Reviewed by: Marco van Wieringen <marco.van.wieringen@planets.elm.net>Reviewed by: Keith M Wesolowski <wesolows@oxide.computer>Approved by: Dan McDonald <danmcd@mnx.io>
15878 Do not attempt to update CPU microcode on virtual hardwareReviewed by: Igor Kozhukhov <igor@dilos.org>Reviewed by: Dan Cross <cross@oxidecomputer.com>Reviewed by: Peter Tribble <peter.tribbl
15878 Do not attempt to update CPU microcode on virtual hardwareReviewed by: Igor Kozhukhov <igor@dilos.org>Reviewed by: Dan Cross <cross@oxidecomputer.com>Reviewed by: Peter Tribble <peter.tribble@gmail.com>Approved by: Patrick Mooney <pmooney@pfmooney.com>
15846 Restructure CPU microcode update15475 ucodeadm -l could be more ergonomic15847 Remove vestigial bootadm support for microcode extraction15848 Remove support for Xen DOM0 CPU microcode update
15846 Restructure CPU microcode update15475 ucodeadm -l could be more ergonomic15847 Remove vestigial bootadm support for microcode extraction15848 Remove support for Xen DOM0 CPU microcode updatesReviewed by: Rich Lowe <richlowe@richlowe.net>Reviewed by: Toomas Soome <tsoome@me.com>Approved by: Dan McDonald <danmcd@mnx.io>
15254 %ymm registers not restored after signal handler15367 x86 getfpregs() summons corrupting %xmm ghosts15333 want x86 /proc xregs support (libc_db, libproc, mdb, etc.)15336 want libc functions
15254 %ymm registers not restored after signal handler15367 x86 getfpregs() summons corrupting %xmm ghosts15333 want x86 /proc xregs support (libc_db, libproc, mdb, etc.)15336 want libc functions for extended ucontext_t15334 want ps_lwphandle-specific reg routines15328 FPU_CW_INIT mistreats reserved bit15335 i86pc fpu_subr.c isn't really platform-specific15332 setcontext(2) isn't actually noreturn15331 need <sys/stdalign.h>Reviewed by: Patrick Mooney <pmooney@pfmooney.com>Reviewed by: Dan McDonald <danmcd@mnx.io>Reviewed by: Rich Lowe <richlowe@richlowe.net>Approved by: Joshua M. Clulow <josh@sysmgr.org>
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