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/freebsd/contrib/llvm-project/clang/lib/Headers/
H A Damxavx512intrin.h283 static __m512 __tile_cvtrowd2ps(__tile1024i src0, unsigned src1) { in __tile_cvtrowd2ps() argument
284 return _tile_cvtrowd2ps_internal(src0.row, src0.col, src0.tile, src1); in __tile_cvtrowd2ps()
302 static __m512bh __tile_cvtrowps2bf16h(__tile1024i src0, unsigned src1) { in __tile_cvtrowps2bf16h() argument
303 return _tile_cvtrowps2bf16h_internal(src0.row, src0.col, src0.tile, src1); in __tile_cvtrowps2bf16h()
321 static __m512bh __tile_cvtrowps2bf16l(__tile1024i src0, unsigned src1) { in __tile_cvtrowps2bf16l() argument
322 return _tile_cvtrowps2bf16l_internal(src0.row, src0.col, src0.tile, src1); in __tile_cvtrowps2bf16l()
340 static __m512h __tile_cvtrowps2phh(__tile1024i src0, unsigned src1) { in __tile_cvtrowps2phh() argument
341 return _tile_cvtrowps2phh_internal(src0.row, src0.col, src0.tile, src1); in __tile_cvtrowps2phh()
359 static __m512h __tile_cvtrowps2phl(__tile1024i src0, unsigned src1) { in __tile_cvtrowps2phl() argument
360 return _tile_cvtrowps2phl_internal(src0.row, src0.col, src0.tile, src1); in __tile_cvtrowps2phl()
[all …]
H A Damxintrin.h151 #define _tile_dpbssd(dst, src0, src1) \ argument
152 __builtin_ia32_tdpbssd((dst), (src0), (src1))
170 #define _tile_dpbsud(dst, src0, src1) \ argument
171 __builtin_ia32_tdpbsud((dst), (src0), (src1))
189 #define _tile_dpbusd(dst, src0, src1) \ argument
190 __builtin_ia32_tdpbusd((dst), (src0), (src1))
208 #define _tile_dpbuud(dst, src0, src1) \ argument
209 __builtin_ia32_tdpbuud((dst), (src0), (src1))
226 #define _tile_dpbf16ps(dst, src0, src1) \ argument
227 __builtin_ia32_tdpbf16ps((dst), (src0), (src1))
[all …]
H A Damxcomplextransposeintrin.h231 static void __tile_tcmmimfp16ps(__tile1024i *dst, __tile1024i src0, in __tile_tcmmimfp16ps() argument
233 dst->tile = _tile_tcmmimfp16ps_internal(src0.row, src1.col, src0.col, in __tile_tcmmimfp16ps()
234 dst->tile, src0.tile, src1.tile); in __tile_tcmmimfp16ps()
254 static void __tile_tcmmrlfp16ps(__tile1024i *dst, __tile1024i src0, in __tile_tcmmrlfp16ps() argument
256 dst->tile = _tile_tcmmrlfp16ps_internal(src0.row, src1.col, src0.col, in __tile_tcmmrlfp16ps()
257 dst->tile, src0.tile, src1.tile); in __tile_tcmmrlfp16ps()
278 static void __tile_conjtcmmimfp16ps(__tile1024i *dst, __tile1024i src0, in __tile_conjtcmmimfp16ps() argument
280 dst->tile = _tile_conjtcmmimfp16ps_internal(src0.row, src1.col, src0.col, in __tile_conjtcmmimfp16ps()
281 dst->tile, src0.tile, src1.tile); in __tile_conjtcmmimfp16ps()
H A Damxcomplexintrin.h139 __tile_cmmimfp16ps(__tile1024i *dst, __tile1024i src0, __tile1024i src1) { in __tile_cmmimfp16ps() argument
140 dst->tile = _tile_cmmimfp16ps_internal(src0.row, src1.col, src0.col, in __tile_cmmimfp16ps()
141 dst->tile, src0.tile, src1.tile); in __tile_cmmimfp16ps()
161 __tile_cmmrlfp16ps(__tile1024i *dst, __tile1024i src0, __tile1024i src1) { in __tile_cmmrlfp16ps() argument
162 dst->tile = _tile_cmmrlfp16ps_internal(src0.row, src1.col, src0.col, in __tile_cmmrlfp16ps()
163 dst->tile, src0.tile, src1.tile); in __tile_cmmrlfp16ps()
H A Damxtf32intrin.h101 static void __tile_mmultf32ps(__tile1024i *dst, __tile1024i src0, in __tile_mmultf32ps() argument
103 dst->tile = _tile_mmultf32ps_internal(src0.row, src1.col, src0.col, dst->tile, in __tile_mmultf32ps()
104 src0.tile, src1.tile); in __tile_mmultf32ps()
H A Damxtf32transposeintrin.h98 static void __tile_tmmultf32ps(__tile1024i *dst, __tile1024i src0, in __tile_tmmultf32ps() argument
100 dst->tile = _tile_tmmultf32ps_internal(src0.row, src1.col, src0.col, in __tile_tmmultf32ps()
101 dst->tile, src0.tile, src1.tile); in __tile_tmmultf32ps()
H A Damxbf16transposeintrin.h85 static __inline__ void __tile_tdpbf16ps(__tile1024i *dst, __tile1024i src0, in __tile_tdpbf16ps() argument
87 dst->tile = _tile_tdpbf16ps_internal(src0.row, src1.col, src0.col, dst->tile, in __tile_tdpbf16ps()
88 src0.tile, src1.tile); in __tile_tdpbf16ps()
H A Damxfp16intrin.h84 static __inline__ void __tile_dpfp16ps(__tile1024i *dst, __tile1024i src0, in __tile_dpfp16ps() argument
86 dst->tile = _tile_dpfp16ps_internal(src0.row, src1.col, src0.col, dst->tile, in __tile_dpfp16ps()
87 src0.tile, src1.tile); in __tile_dpfp16ps()
H A Damxfp16transposeintrin.h85 static __inline__ void __tile_tdpfp16ps(__tile1024i *dst, __tile1024i src0, in __tile_tdpfp16ps() argument
87 dst->tile = _tile_tdpfp16ps_internal(src0.row, src1.col, src0.col, dst->tile, in __tile_tdpfp16ps()
88 src0.tile, src1.tile); in __tile_tdpfp16ps()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstrInfo.td214 // out = (src0 + src1 > 0xFFFFFFFF) ? 1 : 0
217 // out = (src1 > src0) ? 1 : 0
253 // Special case divide FMA with scale and flags (src0 = Quotient,
259 // Special case divide fixup and flags(src0 = Quotient, src1 =
278 // src0: vec4(src, 0, 0, mask)
355 // i32 or f32 src0
428 def AMDGPUfp_class : PatFrags<(ops node:$src0, node:$src1),
429 [(int_amdgcn_class node:$src0, node:$src1),
430 (AMDGPUfp_class_impl node:$src0, node:$src1)]>;
432 def AMDGPUfmed3 : PatFrags<(ops node:$src0, node:$src1, node:$src2),
[all …]
H A DAMDGPUInstructions.td172 (ops node:$src0),
173 (op $src0)> {
178 (ops node:$src0, node:$src1),
179 (op $src0, $src1)> {
184 (ops node:$src0, node:$src1, node:$src2),
185 (op $src0, $src1, $src2)> {
190 (ops node:$src0),
191 (op $src0),
208 (ops node:$src0, node:$src1),
209 (op $src0, $src1),
[all …]
H A DSIInstructions.td69 let DisableEncoding = "$src0", Constraints = "$src0 = $vdst" in {
74 (ins VGPR_32:$src0, VGPR_32:$vsrc, InterpAttr:$attr,
77 [(set f32:$vdst, (int_amdgcn_interp_p2 f32:$src0, f32:$vsrc,
80 } // End DisableEncoding = "$src0", Constraints = "$src0 = $vdst"
124 (ins VSrc_b64:$src0, VSrc_b64:$src1, SSrc_b64:$src2), "", []> {
133 (ins VSrc_b64:$src0)> {
149 : VPseudoInstSI<(outs AV_32:$vdst), (ins VCSrc_b32:$src0)> {
170 (ins i64imm:$src0)> {
182 def WQM : PseudoInstSI <(outs unknown:$vdst), (ins unknown:$src0)>;
186 def SOFT_WQM : PseudoInstSI <(outs unknown:$vdst), (ins unknown:$src0)>;
[all …]
H A DSOPInstructions.td74 bits<8> src0;
76 let Inst{7-0} = !if(ps.has_src0, src0, ?);
84 !if(tied_in, (ins SSrc_b32:$src0, SReg_32:$sdst_in),
85 (ins SSrc_b32:$src0)),
86 "$sdst, $src0", pattern> {
92 opName, (outs SReg_32:$sdst), (ins SReg_32:$src0),
93 "$sdst, $src0", pattern>;
97 opName, (outs), (ins SSrc_b32:$src0),
98 "$src0", pattern> {
104 opName, (outs), (ins SReg_32:$sdst, SSrc_b32:$src0),
[all …]
H A DEvergreenInstructions.td348 // [(set f64:$dst, (fma f64:$src0, f64:$src1, f64:$src2))]
366 [(set i32:$dst, (AMDGPUbfe_u32 i32:$src0, i32:$src1, i32:$src2))],
371 [(set i32:$dst, (AMDGPUbfe_i32 i32:$src0, i32:$src1, i32:$src2))],
412 [(set i32:$dst, (AMDGPUbfi i32:$src0, i32:$src1, i32:$src2))],
464 (fcopysign f32:$src0, f32:$src1),
465 (BFI_INT_eg (MOV_IMM_I32 (i32 0x7fffffff)), $src0, $src1)
469 (fcopysign f32:$src0, f64:$src1),
470 (BFI_INT_eg (MOV_IMM_I32 (i32 0x7fffffff)), $src0,
475 (fcopysign f64:$src0, f64:$src1),
477 (i32 (EXTRACT_SUBREG $src0, sub0)), sub0,
[all …]
H A DVOP3Instructions.td44 let Asm64 = "$vdst, $sdst, $src0, $src1, $src2$clamp";
74 let Ins64 = (ins Src0Mod:$src0_modifiers, VRegSrc_32:$src0,
82 let Ins64 = (ins InterpSlot:$src0,
86 let Asm64 = "$vdst, $src0, $attr$attrchan$clamp$omod";
103 (ins Src0Mod:$src0_modifiers, VRegSrc_32:$src0,
107 (ins Src0Mod:$src0_modifiers, VRegSrc_32:$src0,
112 (ins Src0Mod:$src0_modifiers, VRegSrc_32:$src0,
192 // result = src0 * src1 + src2
199 // result = src0 * src1 + src2
276 (i32 (int_amdgcn_alignbyte (i32 (VOP3OpSelMods i32:$src0, i32:$src0_modifiers)),
[all …]
H A DR600Instructions.td105 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, ABS:$src0_abs, SEL:$src0_sel,
110 "$src0_neg$src0_abs$src0$src0_abs$src0_rel, "
136 [(set R600_Reg32:$dst, (node R600_Reg32:$src0))], itin
147 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, ABS:$src0_abs, SEL:$src0_sel,
153 "$src0_neg$src0_abs$src0$src0_abs$src0_rel, "
175 [(set R600_Reg32:$dst, (node R600_Reg32:$src0,
187 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, SEL:$src0_sel,
193 "$src0_neg$src0$src0_rel, "
372 (ins i32imm:$src0, R600_TReg32_Y:$src1, R600_TReg32_X:$src2),
373 "INTERP_PAIR_XY $src0
[all...]
H A DVOP2Instructions.td15 bits<9> src0;
18 let Inst{8-0} = !if(P.HasSrc0, src0, 0);
27 bits<9> src0;
31 let Inst{8-0} = !if(P.HasSrc0, src0, 0);
41 bits<9> src0;
45 let Inst{8-0} = !if(P.HasSrc0, src0, 0);
151 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omod),
152 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp))),
154 [(set P.DstVT:$vdst, (node P.Src0VT:$src0, P.Src1VT:$src1))]);
302 (inst ps.Pfl.DstRC:$vdst, ps.Pfl.Src0RC32:$src0,
[all …]
H A DEXPInstructions.td16 ExpSrc0:$src0, ExpSrc1:$src1, ExpSrc2:$src2, ExpSrc3:$src3,
41 : EXPCommon<0, ps.done, "exp$tgt $src0, $src1, $src2, $src3"
49 : EXPCommon<ps.row, ps.done, name#"$tgt $src0, $src1, $src2, $src3"
143 (vt ExpSrc0:$src0), (vt ExpSrc1:$src1),
146 (Inst timm:$tgt, ExpSrc0:$src0, ExpSrc1:$src1,
152 (vt ExpSrc0:$src0), (vt ExpSrc1:$src1),
155 (Inst timm:$tgt, ExpSrc0:$src0, ExpSrc1:$src1,
161 (vt ExpSrc0:$src0), (vt ExpSrc1:$src1),
163 (Inst timm:$tgt, ExpSrc0:$src0, ExpSrc1:$src1,
H A DVOPInstructions.td229 bits<9> src0;
242 let Inst{40-32} = !if(P.HasSrc0, src0, 0);
257 bits<11> src0;
277 let Inst{40-32} = !if(P.HasSrc0, src0{8-0}, 0);
376 // NB: For V_INTERP* opcodes, src0 is encoded as src1 and vice versa
382 let Inst{8} = 0; // No modifiers for src0
392 let Inst{49-41} = src0;
405 let Inst{49-41} = src0;
415 bits<9> src0;
426 let Inst{40-32} = !if(P.HasSrc0, src0, 0);
[all …]
H A DVINTERPInstructions.td16 bits<11> src0;
35 let Inst{40-32} = src0{8-0};
79 let Ins64 = (ins Src0Mod:$src0_modifiers, VRegSrc_32:$src0,
93 let Ins64 = (ins Src0Mod:$src0_modifiers, VRegSrc_16:$src0,
109 let Ins64 = (ins Src0Mod:$src0_modifiers, VRegSrc_fake16:$src0,
151 (VINTERPMods f32:$src0, i32:$src0_modifiers),
154 (inst $src0_modifiers, $src0,
165 (pat[0] f32:$src0, i32:$src0_modifiers),
169 (inst $src0_modifiers, $src0,
187 (VINTERPMods f32:$src0, i32:$src0_modifiers),
[all …]
H A DAMDGPUGISel.td309 (dst_vt (node (src0_vt SReg_32:$src0), (src1_vt SReg_32:$src1))),
310 (inst src0_vt:$src0, src1_vt:$src1)
319 (dst_vt (node (src0_vt (sd_vsrc0 src0_vt:$src0)), (src1_vt VGPR_32:$src1))),
320 (inst src0_vt:$src0, src1_vt:$src1)
329 (dst_vt (node (src1_vt VGPR_32:$src1), (src0_vt (sd_vsrc0 src0_vt:$src0)))),
330 (inst src0_vt:$src0, src1_vt:$src1)
339 (dst_vt (node (src0_vt (sd_vcsrc src0_vt:$src0)), (src1_vt (sd_vcsrc src1_vt:$src1)))),
340 (inst src0_vt:$src0, src1_vt:$src1)
349 (dst_vt (node (src0_vt (sd_vcsrc src0_vt:$src0)), (src1_vt (sd_vcsrc src1_vt:$src1)))),
350 (inst src0_vt:$src1, src1_vt:$src0)
[all …]
H A DVOP3PInstructions.td39 (ins FP16InputMods:$src0_modifiers, VCSrc_f16:$src0,
43 (ins FPVRegInputMods:$src0_modifiers, VGPRSrc_32:$src0,
136 (pat (v2i16 (VOP3PMods v2i16:$src0, i32:$src0_modifiers)),
138 (inst $src0_modifiers, $src0, $src1_modifiers, $src1, DSTCLAMP.ENABLE)
162 (f32 (fma_like (f32 (VOP3PMadMixModsExt f16:$src0, i32:$src0_mods)),
165 (mix_inst $src0_mods, $src0, $src1_mods, $src1, $src2_mods, $src2,
168 (f32 (fma_like (f32 (VOP3PMadMixMods f16:$src0, i32:$src0_mods)),
171 (mix_inst $src0_mods, $src0, $src1_mods, $src1, $src2_mods, $src2,
174 (f32 (fma_like (f32 (VOP3PMadMixMods f16:$src0, i32:$src0_mods)),
177 (mix_inst $src0_mods, $src0, $src1_mods, $src1, $src2_mods, $src2,
[all …]
H A DVOP1Instructions.td16 bits<9> src0;
18 let Inst{8-0} = !if(P.HasSrc0, src0{8-0}, ?);
113 [(set P.DstVT:$vdst, (node (P.Src0VT (VOP3Mods P.Src0VT:$src0, i32:$src0_modifiers))))],
115 [(set P.DstVT:$vdst, (node (P.Src0VT (VOP3OMods P.Src0VT:$src0,
117 [(set P.DstVT:$vdst, (node (P.Src0VT P.Src0RC32:$src0)))]
187 let Ins64 = (ins Src0RC64:$src0, Clamp:$clamp, omod:$omod);
188 let InsVOP3Base = (ins Src0VOP3DPP:$src0, Clamp:$clamp, omod:$omod);
189 let AsmVOP3Base = "$vdst, $src0$clamp$omod";
250 let Asm32 = " $vdst, $src0";
261 def : GCNPat<(vt (int_amdgcn_readfirstlane (vt VRegOrLdsSrc_32:$src0))),
[all …]
/freebsd/crypto/openssl/crypto/ec/asm/
H A Decp_nistz256-x86_64.pl3062 my ($a,$b,$src0) = @_;
3063 my $bias = $src0 eq "%rax" ? 0 : -128;
3065 " mov $b, $src0
3075 my ($a,$src0) = @_;
3076 my $bias = $src0 eq "%rax" ? 0 : -128;
3078 " mov 8*0+$a, $src0
3225 my ($src0,$sfx,$bias);
3229 $src0 = "%rax";
3247 $src0 = "%rdx";
3297 mov 0x40+8*0($a_ptr), $src0
[all …]
/freebsd/lib/libc/string/
H A Dbcopy.c59 (void *dst0, const void *src0, size_t length) in memcpy() argument
66 bcopy(const void *src0, void *dst0, size_t length) in memcpy()
70 const char *src = src0; in memcpy()

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