| /linux/Documentation/driver-api/ |
| H A D | edac.rst | 5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
13 creating a common ground for discussion, terms and their definitions
18 The individual DRAM chips on a memory stick. These devices commonly
25 A printed circuit board that aggregates multiple memory devices in
32 A physical connector on the motherboard that accepts a single memory
33 stick. Also called as "slot" on several datasheets.
37 A memory controller channel, responsible to communicate with a group of
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
50 of correcting more errors than on single mode.
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| H A D | sm501.rst | 9 The Silicon Motion SM501 multimedia companion chip is a multifunction device
11 asynchronous serial ports, audio functions, and a dual display video interface.
15 ----
23 chips via the platform device and driver system.
25 On detection of a device, the core initialises the chip (which may
29 The core re-uses the platform device system as the platform device
30 system provides enough features to support the drivers without the
31 need to create a new bus-type and the associated code to go with it.
35 ---------
37 Each peripheral has a view of the device which is implicitly narrowed to
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| /linux/drivers/rtc/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
16 depends on !S390
20 be allowed to plug one or more RTCs to your system. You will
26 bool "Set system time from RTC on startup and resume"
29 If you say yes here, the system time (wall clock) will be set using
30 the value read from a specified RTC device. This is useful to avoid
34 string "RTC used to set the system time"
35 depends on RTC_HCTOSYS
38 The RTC device that will be used to (re)initialize the system
39 clock, usually rtc0. Initialization is done when the system
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| /linux/Documentation/hwmon/ |
| H A D | max16065.rst | 11 Addresses scanned: -
15 http://datasheets.maxim-ic.com/en/ds/MAX16065-MAX16066.pdf
21 Addresses scanned: -
25 http://datasheets.maxim-ic.com/en/ds/MAX16067.pdf
31 Addresses scanned: -
35 http://datasheets.maxim-ic.com/en/ds/MAX16068.pdf
41 Addresses scanned: -
45 http://datasheets.maxim-ic.com/en/ds/MAX16070-MAX16071.pdf
47 Author: Guenter Roeck <linux@roeck-us.net>
51 -----------
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| H A D | tmp513.rst | 1 .. SPDX-License-Identifier: GPL-2.0
22 Eric Tremblay <etremblay@distech-controls.com>
25 -----------
28 The TMP512 (dual-channel) and TMP513 (triple-channel) are system monitors
29 that include remote sensors, a local temperature sensor, and a high-side current
30 shunt monitor. These system monitors have the capability of measuring remote
31 temperatures, on-chip temperatures, and system voltage/power/current
34 The temperatures are measured in degrees Celsius with a range of
35 -40 to + 125 degrees with a resolution of 0.0625 degree C.
39 hysteresis value. The hysteresis is in degrees Celsius with a range of
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| H A D | adm1025.rst | 10 Addresses scanned: I2C 0x2c - 0x2e
18 Addresses scanned: I2C 0x2c - 0x2d
24 * Only two possible addresses (0x2c - 0x2d).
29 - Chen-Yuan Wu <gwu@esoft.com>,
30 - Jean Delvare <jdelvare@suse.de>
33 -----------
35 (This is from Analog Devices.) The ADM1025 is a complete system hardware
36 monitor for microprocessor-based systems, providing measurement and limit
37 comparison of various system parameters. Five voltage measurement inputs
39 the processor core voltage. The ADM1025 can monitor a sixth power-supply
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| H A D | adt7475.rst | 12 Datasheet: Publicly available at the On Semiconductors website
20 Datasheet: Publicly available at the On Semiconductors website
28 Datasheet: Publicly available at the On Semiconductors website
36 Datasheet: Publicly available at the On Semiconductors website
39 - Jordan Crouse
40 - Hans de Goede
41 - Darrick J. Wong (documentation)
42 - Jean Delvare
46 -----------
49 ADT7476 and ADT7490 chip family. The ADT7473 and ADT7475 differ only in
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| H A D | it87.rst | 174 - Christophe Gauthron
175 - Jean Delvare <jdelvare@suse.de>
179 -----------------
182 0 if vbat should report power on value, 1 if vbat should be updated after
183 each read. Default is 0. On some boards the battery voltage is provided
185 at power on will be the actual battery voltage (which the chip does
186 automatically). On other boards the battery voltage is always fed to
187 the chip so can be read at any time. Excessive reading may decrease
192 misconfigured by BIOS - PWM values would be inverted. This option tries
197 Force multiple chip ID to specified value, separated by ','.
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| /linux/tools/perf/pmu-events/arch/powerpc/power8/ |
| H A D | frontend.json | 5 …"BriefDescription": "Branch instruction completed with a target address less than current instruct…
41 "BriefDescription": "Cycles when a demand ifetch was pending",
47 "BriefDescription": "Number of I-ERAT reloads",
53 "BriefDescription": "IERAT Reloaded (Miss) for a 16M page",
59 "BriefDescription": "IERAT Miss (Not implemented as DI on POWER6)",
60 "PublicDescription": "IERAT Reloaded (Miss) for a 4k page"
65 "BriefDescription": "IERAT Reloaded (Miss) for a 64k page",
71 …"BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for an instru…
72 …"PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pum…
89 …oaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), …
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| H A D | other.json | 11 …"BriefDescription": "Cycles in 2-lpar mode. Threads 0-3 belong to Lpar0 and threads 4-7 belong to …
17 …cles in 4 LPAR mode. Threads 0-1 belong to lpar0, threads 2-3 belong to lpar1, threads 4-5 belong …
23 …"BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for all data …
24 …"PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pum…
36 … got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump w…
41 …"BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for a…
42 …urced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump w…
59 …"BriefDescription": "Initial and Final Pump Scope was system pump for all data types (demand load,…
60 …n": "Initial and Final Pump Scope and data sourced across this scope was system pump for all data …
65 …n": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) …
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| /linux/tools/perf/pmu-events/arch/powerpc/power9/ |
| H A D | marked.json | 5 …"BriefDescription": "Number of cycles the marked instruction is experiencing a stall while it is n…
10 …"BriefDescription": "A Page Directory Entry was reloaded to a level 1 page walk cache from beyond …
20 …BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another c…
25 …ocessor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) d…
30 …"BriefDescription": "Completion stall by Dcache miss which resolved from remote chip (cache or mem…
45 …"BriefDescription": "A Page Table Entry was reloaded to a level 3 page walk cache from the core's …
50 …"BriefDescription": "A Page Table Entry was reloaded to a level 3 page walk cache from the core's …
60 …"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due…
70 …iefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another cor…
85 …he processor's Instruction cache was reloaded from a location other than the local core's L3 due t…
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| /linux/Documentation/networking/device_drivers/atm/ |
| H A D | iphase.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 ATM (i)Chip IA Linux Driver Source
9 --------------------------------------------------------------------------------
13 --------------------------------------------------------------------------------
18 This is the README file for the Interphase PCI ATM (i)Chip IA Linux driver
23 - A single VPI (VPI value of 0) is supported.
24 - Supports 4K VCs for the server board (with 512K control memory) and 1K
26 - UBR, ABR and CBR service categories are supported.
27 - Only AAL5 is supported.
28 - Supports setting of PCR on the VCs.
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| /linux/drivers/fsi/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
8 depends on OF
11 FSI - the FRU Support Interface - is a simple bus for low-level
12 access to POWER-based hardware.
21 located under a common /dev/fsi/ directory. Set to N unless your
25 by one so that chip 0 will have /dev/scom1 and chip1 /dev/scom2
29 symlinks in /dev/fsi/by-path when this option is enabled.
32 tristate "GPIO-based FSI master"
33 depends on GPIOLIB
36 This option enables a FSI master driver using GPIO lines.
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| /linux/Documentation/driver-api/gpio/ |
| H A D | drivers-on-gpio.rst | 6 the right in-kernel and userspace APIs/ABIs for the job, and that these
10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
13 - ledtrig-gpio: drivers/leds/trigger/ledtrig-gpio.c will provide a LED trigger,
14 i.e. a LED will turn on/off in response to a GPIO line going high or low
15 (and that LED may in turn use the leds-gpio as per above).
17 - gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line
18 can generate interrupts in response to a key press. Also supports debounce.
20 - gpio-keys-polled: drivers/input/keyboard/gpio_keys_polled.c is used when your
22 by a timer.
24 - gpio_mouse: drivers/input/mouse/gpio_mouse.c is used to provide a mouse with
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-event_source-devices-hv_24x7 | 3 Contact: Linux on PowerPC Developer List <linuxppc-dev@lists.ozlabs.org>
4 Description: Read-only. Attribute group to describe the magic bits
5 that go into perf_event_attr.config for a particular pmu.
6 (See ABI/testing/sysfs-bus-event_source-devices-format).
8 Each attribute under this group defines a bit range of the
12 chip = "config:16-31"
13 core = "config:16-31"
14 domain = "config:0-3"
15 lpar = "config:0-15"
16 offset = "config:32-63"
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| H A D | sysfs-class-hwmon | 3 The chip name.
4 This should be a short, lowercase string, not containing
6 This attribute represents the chip name. It is the only
14 A descriptive label that allows to uniquely identify a
15 device within the system.
16 The contents of the label are free-form.
22 The interval at which the chip will update readings.
27 Some devices have a variable update rate or interval.
46 If voltage drops to or below this limit, the system may
48 least, it should report a fault.
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| /linux/Documentation/scsi/ |
| H A D | 53c700.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 This driver supports the 53c700 and 53c700-66 chips. It also supports
12 does sync (-66 and 710 only), disconnects and tag command queueing.
14 Since the 53c700 must be interfaced to a bus, you need to wrapper the
25 A compile time flag is::
29 define if the chipset must be supported in little endian mode on a big
30 endian architecture (used for the 700 on parisc).
33 Using the Chip Core Driver
36 In order to plumb the 53c700 chip core driver into a working SCSI
37 driver, you need to know three things about the way the chip is wired
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| /linux/drivers/mtd/devices/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Self-contained MTD device drivers"
3 depends on MTD!=n
4 depends on HAS_IOMEM
8 depends on PCI
10 This provides a MTD device driver for the Ramix PMC551 RAM PCI card
12 These devices come in memory configurations from 32M - 1G. If you
15 If this driver is compiled as a module you get the ability to select
17 What this means is that if you have a 1G card, normally the kernel
18 will use a 1G memory map as its view of the device. As a module,
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| /linux/Documentation/devicetree/bindings/bus/ |
| H A D | socionext,uniphier-system-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier System Bus
10 The UniPhier System Bus is an external bus that connects on-board devices to
11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and
12 some control signals. It supports up to 8 banks (chip selects).
16 within each bank to the CPU-viewed address. The needed setup includes the
21 - Masahiro Yamada <yamada.masahiro@socionext.com>
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| /linux/drivers/parisc/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
10 The VSC, GSC and HSC busses were used from the earliest 700-series
12 were also used in servers from the E-class to the K-class. They
17 bool "HP-PB bus support"
18 depends on GSC
20 The HP-PB bus was used in the Nova class and K-class servers.
25 depends on GSC
28 generation of PA-RISC cache-coherent machines. Programs the
29 U2/Uturn chip in "Virtual Mode" and use the I/O MMU.
33 depends on GSC
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| /linux/drivers/platform/x86/intel/ |
| H A D | int0002_vgpio.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Loosely based on android x86 kernel code which is:
13 * Some peripherals on Bay Trail and Cherry Trail platforms signal a Power
15 * the system. When this happens software needs to clear the PME bus 0 status
16 * bit in the GPE0a_STS register to avoid an IRQ storm on IRQ 9.
19 * called a "Virtual GPIO controller" in ACPI because it defines the event
21 * methods as would be done for a real GPIO interrupt in ACPI. Note this
22 * is a hack to define an AML event handler for the PME while using existing
23 * ACPI mechanisms, this is not a real GPIO at all.
25 * This driver will bind to the INT0002 device, and register as a GPIO
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| /linux/Documentation/devicetree/bindings/memory-controllers/ddr/ |
| H A D | jedec,lpddr-channel.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR channel with chip/rank topology description
10 An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS,
11 CK, etc.) that connect one or more LPDDR chips to a host system. The main
12 purpose of this node is to overall LPDDR topology of the system, including the
13 amount of individual LPDDR chips and the ranks per chip.
16 - Julius Werner <jwerner@chromium.org>
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| /linux/drivers/mtd/maps/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Mapping drivers for chip access"
3 depends on MTD!=n
4 depends on HAS_IOMEM
7 bool "Support non-linear mappings of flash chips"
9 This causes the chip drivers to allow for complicated
14 depends on MTD_CFI || MTD_JEDECPROBE || MTD_ROM || MTD_RAM || MTD_LPDDR
16 This provides a 'mapping' driver which allows the NOR Flash and
19 the physical address and size of the flash chips on your
21 with config options or at run-time.
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| /linux/drivers/net/ethernet/wiznet/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
8 depends on HAS_IOMEM
11 If you have a network (Ethernet) card belonging to this class, say Y.
22 depends on HAS_IOMEM
26 W5100 is a single chip with integrated 10/100 Ethernet MAC,
30 To compile this driver as a module, choose M here: the module
35 depends on HAS_IOMEM
39 W5300 is a single chip with integrated 10/100 Ethernet MAC,
43 To compile this driver as a module, choose M here: the module
48 depends on WIZNET_W5100 || WIZNET_W5300
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| /linux/Documentation/devicetree/bindings/powerpc/fsl/ |
| H A D | pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - J. Neuschäfer <j.ne@posteo.net>
14 controlling chip-wide low-power states as well as peripheral clock gating.
18 called a sleep specifier.
20 For "fsl,mpc8349-pmc", sleep specifiers consist of one cell. For each bit that
22 on suspend, and restored on resume. This sleep controller supports disabling
25 For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of
27 resume. The first two cells are as described for fsl,mpc8548-pmc. This
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