xref: /linux/Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml (revision bf373e4c786bfe989e637195252698f45b157a68) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/powerpc/fsl/pmc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Power Management Controller
8
9maintainers:
10  - J. Neuschäfer <j.ne@posteo.net>
11
12description: |
13  The Power Management Controller in several MPC8xxx SoCs helps save power by
14  controlling chip-wide low-power states as well as peripheral clock gating.
15
16  Sleep of peripheral devices is configured by the `sleep` property, for
17  example `sleep = <&pmc 0x00000030>`. Any cells after the &pmc phandle are
18  called a sleep specifier.
19
20  For "fsl,mpc8349-pmc", sleep specifiers consist of one cell.  For each bit that
21  is set in the cell, the corresponding bit in SCCR will be saved and cleared
22  on suspend, and restored on resume.  This sleep controller supports disabling
23  and resuming devices at any time.
24
25  For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of
26  which will be ORed into PMCDR upon suspend, and cleared from PMCDR upon
27  resume.  The first two cells are as described for fsl,mpc8548-pmc.  This
28  sleep controller only supports disabling devices during system sleep, or
29  permanently.
30
31  For "fsl,mpc8548-pmc" or "fsl,mpc8641d-pmc", Sleep specifiers consist of one
32  or two cells, the first of which will be ORed into DEVDISR (and the second
33  into DEVDISR2, if present -- this cell should be zero or absent if the
34  hardware does not have DEVDISR2) upon a request for permanent device
35  disabling.  This sleep controller does not support configuring devices to
36  disable during system sleep (unless supported by another compatible match),
37  or dynamically.
38
39properties:
40  compatible:
41    oneOf:
42      - items:
43          - const: fsl,mpc8315-pmc
44          - const: fsl,mpc8313-pmc
45          - const: fsl,mpc8349-pmc
46
47      - items:
48          - enum:
49              - fsl,mpc8313-pmc
50              - fsl,mpc8323-pmc
51              - fsl,mpc8360-pmc
52              - fsl,mpc8377-pmc
53              - fsl,mpc8378-pmc
54              - fsl,mpc8379-pmc
55          - const: fsl,mpc8349-pmc
56
57      - items:
58          - const: fsl,p1022-pmc
59          - const: fsl,mpc8536-pmc
60          - const: fsl,mpc8548-pmc
61
62      - items:
63          - enum:
64              - fsl,mpc8536-pmc
65              - fsl,mpc8568-pmc
66              - fsl,mpc8569-pmc
67          - const: fsl,mpc8548-pmc
68
69      - enum:
70          - fsl,mpc8548-pmc
71          - fsl,mpc8641d-pmc
72
73    description: |
74      "fsl,mpc8349-pmc" should be listed for any chip whose PMC is
75      compatible.  "fsl,mpc8313-pmc" should also be listed for any chip
76      whose PMC is compatible, and implies deep-sleep capability.
77
78      "fsl,mpc8548-pmc" should be listed for any chip whose PMC is
79      compatible.  "fsl,mpc8536-pmc" should also be listed for any chip
80      whose PMC is compatible, and implies deep-sleep capability.
81
82      "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
83      compatible; all statements below that apply to "fsl,mpc8548-pmc" also
84      apply to "fsl,mpc8641d-pmc".
85
86      Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these
87      bit assignments are indicated via the sleep specifier in each device's
88      sleep property.
89
90  reg:
91    minItems: 1
92    maxItems: 2
93
94  interrupts:
95    maxItems: 1
96
97  fsl,mpc8313-wakeup-timer:
98    $ref: /schemas/types.yaml#/definitions/phandle
99    description:
100      For "fsl,mpc8313-pmc"-compatible devices, this is a phandle to an
101      "fsl,gtm" node on which timer 4 can be used as a wakeup source from deep
102      sleep.
103
104allOf:
105  - if:
106      properties:
107        compatible:
108          contains:
109            const: fsl,mpc8349-pmc
110    then:
111      properties:
112        reg:
113          items:
114            - description: PMC block
115            - description: Clock Configuration block
116
117  - if:
118      properties:
119        compatible:
120          contains:
121            enum:
122              - fsl,mpc8548-pmc
123              - fsl,mpc8641d-pmc
124    then:
125      properties:
126        reg:
127          items:
128            - description: 32-byte block beginning with DEVDISR
129
130required:
131  - compatible
132  - reg
133
134additionalProperties: false
135
136examples:
137  - |
138    #include <dt-bindings/interrupt-controller/irq.h>
139
140    pmc: power@b00 {
141        compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
142        reg = <0xb00 0x100>, <0xa00 0x100>;
143        interrupts = <80 IRQ_TYPE_LEVEL_LOW>;
144    };
145
146  - |
147    power@e0070 {
148        compatible = "fsl,mpc8548-pmc";
149        reg = <0xe0070 0x20>;
150    };
151
152...
153