1*ba127016SJ. Neuschäfer# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*ba127016SJ. Neuschäfer%YAML 1.2 3*ba127016SJ. Neuschäfer--- 4*ba127016SJ. Neuschäfer$id: http://devicetree.org/schemas/powerpc/fsl/pmc.yaml# 5*ba127016SJ. Neuschäfer$schema: http://devicetree.org/meta-schemas/core.yaml# 6*ba127016SJ. Neuschäfer 7*ba127016SJ. Neuschäfertitle: Power Management Controller 8*ba127016SJ. Neuschäfer 9*ba127016SJ. Neuschäfermaintainers: 10*ba127016SJ. Neuschäfer - J. Neuschäfer <j.ne@posteo.net> 11*ba127016SJ. Neuschäfer 12*ba127016SJ. Neuschäferdescription: | 13*ba127016SJ. Neuschäfer The Power Management Controller in several MPC8xxx SoCs helps save power by 14*ba127016SJ. Neuschäfer controlling chip-wide low-power states as well as peripheral clock gating. 15*ba127016SJ. Neuschäfer 16*ba127016SJ. Neuschäfer Sleep of peripheral devices is configured by the `sleep` property, for 17*ba127016SJ. Neuschäfer example `sleep = <&pmc 0x00000030>`. Any cells after the &pmc phandle are 18*ba127016SJ. Neuschäfer called a sleep specifier. 19*ba127016SJ. Neuschäfer 20*ba127016SJ. Neuschäfer For "fsl,mpc8349-pmc", sleep specifiers consist of one cell. For each bit that 21*ba127016SJ. Neuschäfer is set in the cell, the corresponding bit in SCCR will be saved and cleared 22*ba127016SJ. Neuschäfer on suspend, and restored on resume. This sleep controller supports disabling 23*ba127016SJ. Neuschäfer and resuming devices at any time. 24*ba127016SJ. Neuschäfer 25*ba127016SJ. Neuschäfer For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of 26*ba127016SJ. Neuschäfer which will be ORed into PMCDR upon suspend, and cleared from PMCDR upon 27*ba127016SJ. Neuschäfer resume. The first two cells are as described for fsl,mpc8548-pmc. This 28*ba127016SJ. Neuschäfer sleep controller only supports disabling devices during system sleep, or 29*ba127016SJ. Neuschäfer permanently. 30*ba127016SJ. Neuschäfer 31*ba127016SJ. Neuschäfer For "fsl,mpc8548-pmc" or "fsl,mpc8641d-pmc", Sleep specifiers consist of one 32*ba127016SJ. Neuschäfer or two cells, the first of which will be ORed into DEVDISR (and the second 33*ba127016SJ. Neuschäfer into DEVDISR2, if present -- this cell should be zero or absent if the 34*ba127016SJ. Neuschäfer hardware does not have DEVDISR2) upon a request for permanent device 35*ba127016SJ. Neuschäfer disabling. This sleep controller does not support configuring devices to 36*ba127016SJ. Neuschäfer disable during system sleep (unless supported by another compatible match), 37*ba127016SJ. Neuschäfer or dynamically. 38*ba127016SJ. Neuschäfer 39*ba127016SJ. Neuschäferproperties: 40*ba127016SJ. Neuschäfer compatible: 41*ba127016SJ. Neuschäfer oneOf: 42*ba127016SJ. Neuschäfer - items: 43*ba127016SJ. Neuschäfer - const: fsl,mpc8315-pmc 44*ba127016SJ. Neuschäfer - const: fsl,mpc8313-pmc 45*ba127016SJ. Neuschäfer - const: fsl,mpc8349-pmc 46*ba127016SJ. Neuschäfer 47*ba127016SJ. Neuschäfer - items: 48*ba127016SJ. Neuschäfer - enum: 49*ba127016SJ. Neuschäfer - fsl,mpc8313-pmc 50*ba127016SJ. Neuschäfer - fsl,mpc8323-pmc 51*ba127016SJ. Neuschäfer - fsl,mpc8360-pmc 52*ba127016SJ. Neuschäfer - fsl,mpc8377-pmc 53*ba127016SJ. Neuschäfer - fsl,mpc8378-pmc 54*ba127016SJ. Neuschäfer - fsl,mpc8379-pmc 55*ba127016SJ. Neuschäfer - const: fsl,mpc8349-pmc 56*ba127016SJ. Neuschäfer 57*ba127016SJ. Neuschäfer - items: 58*ba127016SJ. Neuschäfer - const: fsl,p1022-pmc 59*ba127016SJ. Neuschäfer - const: fsl,mpc8536-pmc 60*ba127016SJ. Neuschäfer - const: fsl,mpc8548-pmc 61*ba127016SJ. Neuschäfer 62*ba127016SJ. Neuschäfer - items: 63*ba127016SJ. Neuschäfer - enum: 64*ba127016SJ. Neuschäfer - fsl,mpc8536-pmc 65*ba127016SJ. Neuschäfer - fsl,mpc8568-pmc 66*ba127016SJ. Neuschäfer - fsl,mpc8569-pmc 67*ba127016SJ. Neuschäfer - const: fsl,mpc8548-pmc 68*ba127016SJ. Neuschäfer 69*ba127016SJ. Neuschäfer - enum: 70*ba127016SJ. Neuschäfer - fsl,mpc8548-pmc 71*ba127016SJ. Neuschäfer - fsl,mpc8641d-pmc 72*ba127016SJ. Neuschäfer 73*ba127016SJ. Neuschäfer description: | 74*ba127016SJ. Neuschäfer "fsl,mpc8349-pmc" should be listed for any chip whose PMC is 75*ba127016SJ. Neuschäfer compatible. "fsl,mpc8313-pmc" should also be listed for any chip 76*ba127016SJ. Neuschäfer whose PMC is compatible, and implies deep-sleep capability. 77*ba127016SJ. Neuschäfer 78*ba127016SJ. Neuschäfer "fsl,mpc8548-pmc" should be listed for any chip whose PMC is 79*ba127016SJ. Neuschäfer compatible. "fsl,mpc8536-pmc" should also be listed for any chip 80*ba127016SJ. Neuschäfer whose PMC is compatible, and implies deep-sleep capability. 81*ba127016SJ. Neuschäfer 82*ba127016SJ. Neuschäfer "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is 83*ba127016SJ. Neuschäfer compatible; all statements below that apply to "fsl,mpc8548-pmc" also 84*ba127016SJ. Neuschäfer apply to "fsl,mpc8641d-pmc". 85*ba127016SJ. Neuschäfer 86*ba127016SJ. Neuschäfer Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these 87*ba127016SJ. Neuschäfer bit assignments are indicated via the sleep specifier in each device's 88*ba127016SJ. Neuschäfer sleep property. 89*ba127016SJ. Neuschäfer 90*ba127016SJ. Neuschäfer reg: 91*ba127016SJ. Neuschäfer minItems: 1 92*ba127016SJ. Neuschäfer maxItems: 2 93*ba127016SJ. Neuschäfer 94*ba127016SJ. Neuschäfer interrupts: 95*ba127016SJ. Neuschäfer maxItems: 1 96*ba127016SJ. Neuschäfer 97*ba127016SJ. Neuschäfer fsl,mpc8313-wakeup-timer: 98*ba127016SJ. Neuschäfer $ref: /schemas/types.yaml#/definitions/phandle 99*ba127016SJ. Neuschäfer description: 100*ba127016SJ. Neuschäfer For "fsl,mpc8313-pmc"-compatible devices, this is a phandle to an 101*ba127016SJ. Neuschäfer "fsl,gtm" node on which timer 4 can be used as a wakeup source from deep 102*ba127016SJ. Neuschäfer sleep. 103*ba127016SJ. Neuschäfer 104*ba127016SJ. NeuschäferallOf: 105*ba127016SJ. Neuschäfer - if: 106*ba127016SJ. Neuschäfer properties: 107*ba127016SJ. Neuschäfer compatible: 108*ba127016SJ. Neuschäfer contains: 109*ba127016SJ. Neuschäfer const: fsl,mpc8349-pmc 110*ba127016SJ. Neuschäfer then: 111*ba127016SJ. Neuschäfer properties: 112*ba127016SJ. Neuschäfer reg: 113*ba127016SJ. Neuschäfer items: 114*ba127016SJ. Neuschäfer - description: PMC block 115*ba127016SJ. Neuschäfer - description: Clock Configuration block 116*ba127016SJ. Neuschäfer 117*ba127016SJ. Neuschäfer - if: 118*ba127016SJ. Neuschäfer properties: 119*ba127016SJ. Neuschäfer compatible: 120*ba127016SJ. Neuschäfer contains: 121*ba127016SJ. Neuschäfer enum: 122*ba127016SJ. Neuschäfer - fsl,mpc8548-pmc 123*ba127016SJ. Neuschäfer - fsl,mpc8641d-pmc 124*ba127016SJ. Neuschäfer then: 125*ba127016SJ. Neuschäfer properties: 126*ba127016SJ. Neuschäfer reg: 127*ba127016SJ. Neuschäfer items: 128*ba127016SJ. Neuschäfer - description: 32-byte block beginning with DEVDISR 129*ba127016SJ. Neuschäfer 130*ba127016SJ. Neuschäferrequired: 131*ba127016SJ. Neuschäfer - compatible 132*ba127016SJ. Neuschäfer - reg 133*ba127016SJ. Neuschäfer 134*ba127016SJ. NeuschäferadditionalProperties: false 135*ba127016SJ. Neuschäfer 136*ba127016SJ. Neuschäferexamples: 137*ba127016SJ. Neuschäfer - | 138*ba127016SJ. Neuschäfer #include <dt-bindings/interrupt-controller/irq.h> 139*ba127016SJ. Neuschäfer 140*ba127016SJ. Neuschäfer pmc: power@b00 { 141*ba127016SJ. Neuschäfer compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; 142*ba127016SJ. Neuschäfer reg = <0xb00 0x100>, <0xa00 0x100>; 143*ba127016SJ. Neuschäfer interrupts = <80 IRQ_TYPE_LEVEL_LOW>; 144*ba127016SJ. Neuschäfer }; 145*ba127016SJ. Neuschäfer 146*ba127016SJ. Neuschäfer - | 147*ba127016SJ. Neuschäfer power@e0070 { 148*ba127016SJ. Neuschäfer compatible = "fsl,mpc8548-pmc"; 149*ba127016SJ. Neuschäfer reg = <0xe0070 0x20>; 150*ba127016SJ. Neuschäfer }; 151*ba127016SJ. Neuschäfer 152*ba127016SJ. Neuschäfer... 153