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/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_udma_regs_gen.h9 found at http://www.gnu.org/licenses/gpl-2.0.html
100 /* [0x0] Target-ID control */
102 /* [0x4] TX queue 0/1 Target-ID */
104 /* [0x8] TX queue 2/3 Target-ID */
106 /* [0xc] RX queue 0/1 Target-ID */
108 /* [0x10] RX queue 2/3 Target-ID */
112 /* [0x0] TX queue 0/1 Target-Address */
114 /* [0x4] TX queue 2/3 Target-Address */
116 /* [0x8] RX queue 0/1 Target-Address */
118 /* [0xc] RX queue 2/3 Target-Address */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Drenesas,rzv2h-gbeth.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/renesas,rzv2h-gbeth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
17 - renesas,r9a09g047-gbeth
18 - renesas,r9a09g056-gbeth
19 - renesas,r9a09g057-gbeth
20 - renesas,rzv2h-gbeth
22 - compatible
[all …]
H A Drenesas,r9a09g057-gbeth.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/renesas,r9a09g057-gbeth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
17 - renesas,r9a09g056-gbeth
18 - renesas,r9a09g057-gbeth
19 - renesas,rzv2h-gbeth
21 - compatible
26 - enum:
[all …]
H A Dkeystone-netcp.txt6 switch sub-module to send and receive packets. NetCP also includes a packet
13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP
17 sub-modules exist as a loadable kernel module which plug in to the netcp core.
18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is
19 mandatory to have the ethernet switch sub-module for the ethernet interface to
20 be operational. Any other sub-module like the PA is optional.
24 -----------------------------
26 -----------------------------
28 |-> NetCP Devices -> |
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H A Dintel,ixp4xx-ethernet.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-ethernet.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - $ref: ethernet-controller.yaml#
14 - Linus Walleij <linus.walleij@linaro.org>
18 Processing Engine) and the IXP4xx Queue Manager to process
24 const: intel,ixp4xx-ethernet
30 queue-rx:
31 $ref: /schemas/types.yaml#/definitions/phandle-array
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H A Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
[all …]
/freebsd/sys/dev/vge/
H A Dif_vgereg.h1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
15 * 3. All advertising materials mentioning features or use of this software
18 * 4. Neither the name of the author nor the names of any co-contributors
37 * Definitions for the built-in copper PHY can be found in vgphy.h.
41 * using 32-bit I/O cycles, but some of them are less than 32 bits
54 #define VGE_RXCTL 0x06 /* RX control register */
59 #define VGE_CRS3 0x0B /* Global cmd register 3 (w to set) */
63 #define VGE_CRC3 0x0F /* Global cmd register 3 (w to clr) */
82 #define VGE_RXHOSTERR 0x23 /* RX host error status */
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/freebsd/share/man/man4/
H A Dgve.41 .\" SPDX-License-Identifier: BSD-3-Clause
3 .\" Copyright (c) 2023-2024 Google LLC
15 .\" 3. Neither the name of the copyright holder nor the names of its contributors
39 .Bd -ragged -offset indent
46 .Bd -literal -offset indent
51 It is required to support per-VM Tier-1 networking performance, and for using certain VM shapes on …
57 .Bl -bullet -compact
78 .Bl -bullet -compact
84 Change the TX queue count to 4 for the gve0 interface:
87 Change the RX queue count to 4 for the gve0 interface:
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H A Dena.41 .\" SPDX-License-Identifier: BSD-2-Clause
3 .\" Copyright (c) 2015-2024 Amazon.com, Inc. or its affiliates.
40 .Bd -ragged -offset indent
47 .Bd -literal -offset indent
56 through an Admin Queue.
58 The driver supports a range of ENA devices, is link-speed independent
62 Some ENA devices support SR-IOV.
63 This driver is used for both the SR-IOV Physical Function (PF) and Virtual
67 processing by providing multiple Tx/Rx queue pairs (the maximum number
68 is advertised by the device via the Admin Queue), a dedicated MSI-X
[all …]
/freebsd/sys/contrib/dev/iwlwifi/mld/
H A Drx.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2024-2025 Intel Corporation
11 * enum iwl_mld_internal_rxq_notif_type - RX queue sync notif types
22 * struct iwl_mld_internal_rxq_notif - @iwl_rxq_sync_cmd internal data.
29 * @payload: data to send to RX queues based on the type (may be empty)
33 u8 reserved[3];
39 * struct iwl_mld_rx_queues_sync - RX queues sync data
41 * @waitq: wait queue for RX queues sync completion
43 * @state: bitmask representing the sync state of RX queues
44 * all RX queues bits are set before sending the command, and the
[all …]
/freebsd/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
61 /* *INDENT-OFF* */
65 /* *INDENT-ON* */
84 #define AL_ETH_REV_ID_3 3 /* Alpine V2 advanced */
97 #define AL_ETH_TSO_MSS_MAX_VAL (AL_ETH_MAX_FRAME_LEN - 200)
115 AL_ETH_TUNNEL_WITH_UDP = 3, /* VXLAN */
124 #define AL_ETH_FWD_PBITS_TABLE_NUM (1 << 3)
125 #define AL_ETH_FWD_PRIO_TABLE_NUM (1 << 3)
174 /** Tx to Rx switching decision type */
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/freebsd/sys/dev/bxe/
H A Decore_mfw_req.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved.
75 uint32_t unused[3];
115 uint32_t promiscuous_mode; /* Promiscuous Mode. non-zero true */
116 uint32_t txq_size; /* TX Descriptors Queue Size */
117 uint32_t rxq_size; /* RX Descriptors Queue Size */
118 /* TX Descriptor Queue Avg Depth. % Avg Queue Depth since last poll */
120 /* RX Descriptors Queue Avg Depth. % Avg Queue Depth since last poll */
122 /* IOV_Offload. 0=none; 1=MultiQueue, 2=VEB 3= VEPA*/
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/
H A Dkeystone-k2e-netcp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
9 compatible = "ti,keystone-navigator-qmss";
10 dma-coherent;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 queue-range = <0 0x2000>;
20 #address-cells = <1>;
21 #size-cells = <1>;
24 managed-queues = <0 0x2000>;
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H A Dkeystone-k2l-netcp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
9 compatible = "ti,keystone-navigator-qmss";
10 dma-coherent;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 queue-range = <0 0x2000>;
20 #address-cells = <1>;
21 #size-cells = <1>;
24 managed-queues = <0 0x2000>;
[all …]
H A Dkeystone-k2hk-netcp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
9 compatible = "ti,keystone-navigator-qmss";
10 dma-coherent;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 queue-range = <0 0x4000>;
20 #address-cells = <1>;
21 #size-cells = <1>;
24 managed-queues = <0 0x2000>;
[all …]
/freebsd/sys/dev/e1000/
H A De1000_defines.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
17 3. Neither the name of the Intel Corporation nor the names of its
71 #define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* SW Definable Pin 3 data */
94 #define E1000_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
122 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
132 #define E1000_RXD_ERR_RXE 0x80 /* Rx Data Error */
172 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
173 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
198 #define E1000_RCTL_RDMTS_HALF 0x00000000 /* Rx desc min thresh size */
[all …]
/freebsd/sys/dev/neta/
H A Dif_mvnetareg.h46 /* XXX: Currently multi-queue can be used on the Tx side only */
53 #if MVNETA_TX_QNUM_MAX & (MVNETA_TX_QNUM_MAX - 1) != 0
56 #if MVNETA_RX_QNUM_MAX & (MVNETA_RX_QNUM_MAX - 1) != 0
62 #define MVNETA_TX_QUEUE_ALL ((1<<MVNETA_TX_QNUM_MAX)-1)
63 #define MVNETA_RX_QUEUE_ALL ((1<<MVNETA_RX_QNUM_MAX)-1)
73 #define MVNETA_BASEADDR(n) (0x2200 + ((n) << 3)) /* Base Address */
74 #define MVNETA_S(n) (0x2204 + ((n) << 3)) /* Size */
99 /* Rx DMA Hardware Parser Registers */
117 /* Rx DMA Miscellaneous Registers */
118 #define MVNETA_PMFS 0x247c /* Port Rx Minimal Frame Size */
[all …]
/freebsd/sys/arm/ti/cpsw/
H A Dif_cpsw.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
36 * and in the TMS320C6452 3 Port Switch Ethernet Subsystem TRM.
39 * a 3-port store-and-forward switch connected to two independent
251 { SYS_RES_IRQ, 3, RF_ACTIVE | RF_SHAREABLE },
252 { -1, 0 }
331 if ((_sc)->debug) { \
341 mtx_assert(&(sc)->rx.lock, MA_NOTOWNED); \
342 mtx_lock(&(sc)->tx.lock); \
345 #define CPSW_TX_UNLOCK(sc) mtx_unlock(&(sc)->tx.lock)
[all …]
/freebsd/sys/dev/igc/
H A Digc_defines.h1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
61 #define IGC_CTRL_EXT_SDP3_DATA 0x00000080 /* SW Definable Pin 3 data */
72 #define IGC_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
89 #define IGC_RXD_STAT_PIF 0x80 /* passed in-exact filter */
98 #define IGC_RXD_ERR_RXE 0x80 /* Rx Data Error */
127 #define IGC_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
128 #define IGC_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
153 #define IGC_RCTL_RDMTS_HALF 0x00000000 /* Rx desc min thresh size */
160 #define IGC_RCTL_SZ_2048 0x00000000 /* Rx buffer size 2048 */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/intel/ixp/
H A Dintel-ixp42x-goramo-multilink.dts1 // SPDX-License-Identifier: ISC
5 * - MultiLink Basic (a box)
6 * - MultiLink Max (19" rack mount)
9 * This is one of the few devices supporting the IXP4xx High-Speed Serial
14 /dts-v1/;
16 #include "intel-ixp42x.dtsi"
17 #include <dt-bindings/input/input.h>
21 compatible = "goramo,multilink-router", "intel,ixp42x";
22 #address-cell
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H A Dintel-ixp4xx.dtsi1 // SPDX-License-Identifier: ISC
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/gpio/gpio.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 compatible = "simple-bus";
15 interrupt-parent = <&intcon>;
22 /* compatible and reg filled in by per-soc device tree */
23 native-endian;
24 #address-cells = <2>;
[all …]
/freebsd/sys/dev/msk/
H A Dif_mskreg.h17 * are provided to you under the BSD-type license terms provided
22 * - Redistributions of source code must retain the above copyright
24 * - Redistributions in binary form must reproduce the above
28 * - Neither the name of Marvell nor the names of its contributors
48 /*-
49 * SPDX-License-Identifier: BSD-4-Clause AND BSD-3-Clause
62 * 3. All advertising materials mentioning features or use of this software
65 * 4. Neither the name of the author nor the names of any co-contributors
82 /*-
110 * D-Link PCI vendor ID
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dr9a09g056.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g056-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 /* RZV2N_Px = Offset address of PFC_P_mn - 0x20 */
16 #define RZV2N_P3 3
31 #address-cells = <2>;
32 #size-cells = <2>;
34 audio_extal_clk: audio-clk {
35 compatible = "fixed-clock";
[all …]
/freebsd/sys/dev/ice/
H A Dice_iflib.h1 /* SPDX-License-Identifier: BSD-3-Clause */
15 * 3. Neither the name of the Intel Corporation nor the names of its
37 * implementation, including the Tx and Rx queue structures and the ice_softc
65 * ASSERT_CTX_LOCKED - Assert that the iflib context lock is held
71 #define ASSERT_CTX_LOCKED(sc) sx_assert((sc)->iflib_ctx_lock, SA_XLOCKED)
74 * IFLIB_CTX_LOCK - lock the iflib context lock
79 #define IFLIB_CTX_LOCK(sc) sx_xlock((sc)->iflib_ctx_lock)
82 * IFLIB_CTX_UNLOCK - unlock the iflib context lock
87 #define IFLIB_CTX_UNLOCK(sc) sx_xunlock((sc)->iflib_ctx_lock)
90 * ASSERT_CFG_LOCKED - Assert that a configuration lock is held
[all …]
H A Dice_iflib_recovery_txrx.c1 /* SPDX-License-Identifier: BSD-3-Clause */
15 * 3. Neither the name of the Intel Corporation nor the names of its
34 * @brief iflib Tx/Rx ops for recovery mode
57 * @brief Tx/Rx operations for recovery mode
59 * Similar to ice_txrx, but contains pointers to functions which are no-ops.
74 * ice_recovery_txd_encap - prepar
[all...]

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