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/linux/drivers/gpu/drm/xe/
H A Dxe_gt_sriov_vf.c53 static void vf_post_migration_inject_wait(struct xe_gt *gt, in vf_post_migration_inject_wait() argument
56 while (gt->sriov.vf.migration.debug.resfix_stoppers & wait) { in vf_post_migration_inject_wait()
57 xe_gt_dbg(gt, in vf_post_migration_inject_wait()
60 gt->sriov.vf.migration.debug.resfix_stoppers, wait); in vf_post_migration_inject_wait()
66 #define VF_MIGRATION_INJECT_WAIT(gt, _POS) ({ \ argument
67 struct xe_gt *__gt = (gt); \
90 static int vf_reset_guc_state(struct xe_gt *gt) in vf_reset_guc_state() argument
93 struct xe_guc *guc = &gt->uc.guc; in vf_reset_guc_state()
103 xe_gt_sriov_err(gt, "Failed to reset GuC state (%pe)\n", ERR_PTR(err)); in vf_reset_guc_state()
109 * @gt: the &xe_gt
[all …]
H A Dxe_gt_sriov_pf_migration.c32 static struct xe_gt_sriov_migration_data *pf_pick_gt_migration(struct xe_gt *gt, unsigned int vfid) in pf_pick_gt_migration() argument
34 xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); in pf_pick_gt_migration()
35 xe_gt_assert(gt, vfid != PFID); in pf_pick_gt_migration()
36 xe_gt_assert(gt, vfid <= xe_sriov_pf_get_totalvfs(gt_to_xe(gt))); in pf_pick_gt_migration()
38 return &gt->sriov.pf.vfs[vfid].migration; in pf_pick_gt_migration()
41 static void pf_dump_mig_data(struct xe_gt *gt, unsigned int vfid, in pf_dump_mig_data() argument
46 struct drm_printer p = xe_gt_dbg_printer(gt); in pf_dump_mig_data()
54 static ssize_t pf_migration_ggtt_size(struct xe_gt *gt, unsigned int vfid) in pf_migration_ggtt_size() argument
56 if (!xe_gt_is_main_type(gt)) in pf_migration_ggtt_size()
59 return xe_gt_sriov_pf_config_ggtt_save(gt, vfid, NULL, 0); in pf_migration_ggtt_size()
[all …]
H A Dxe_gt_ccs_mode.c19 static void __xe_gt_apply_ccs_mode(struct xe_gt *gt, u32 num_engines) in __xe_gt_apply_ccs_mode() argument
22 int num_slices = hweight32(CCS_INSTANCES(gt)); in __xe_gt_apply_ccs_mode()
23 struct xe_device *xe = gt_to_xe(gt); in __xe_gt_apply_ccs_mode()
27 xe_assert(xe, xe_gt_ccs_mode_enabled(gt)); in __xe_gt_apply_ccs_mode()
54 for_each_hw_engine(hwe, gt, id) { in __xe_gt_apply_ccs_mode()
64 while ((CCS_INSTANCES(gt) & BIT(cslice)) == 0) in __xe_gt_apply_ccs_mode()
79 xe_mmio_write32(&gt->mmio, CCS_MODE, mode); in __xe_gt_apply_ccs_mode()
81 xe_gt_dbg(gt, "CCS_MODE=%x config:%08x, num_engines:%d, num_slices:%d\n", in __xe_gt_apply_ccs_mode()
85 void xe_gt_apply_ccs_mode(struct xe_gt *gt) in xe_gt_apply_ccs_mode() argument
87 if (!gt->ccs_mode || IS_SRIOV_VF(gt_to_xe(gt))) in xe_gt_apply_ccs_mode()
[all …]
H A Dxe_gt_sriov_vf.h16 int xe_gt_sriov_vf_reset(struct xe_gt *gt);
17 int xe_gt_sriov_vf_bootstrap(struct xe_gt *gt);
18 void xe_gt_sriov_vf_guc_versions(struct xe_gt *gt,
21 int xe_gt_sriov_vf_query_config(struct xe_gt *gt);
22 int xe_gt_sriov_vf_connect(struct xe_gt *gt);
23 int xe_gt_sriov_vf_query_runtime(struct xe_gt *gt);
24 void xe_gt_sriov_vf_migrated_event_handler(struct xe_gt *gt);
26 int xe_gt_sriov_vf_init_early(struct xe_gt *gt);
27 int xe_gt_sriov_vf_init(struct xe_gt *gt);
28 bool xe_gt_sriov_vf_recovery_pending(struct xe_gt *gt);
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H A Dxe_gt_sriov_pf_monitor.c18 * @gt: the &xe_gt
24 void xe_gt_sriov_pf_monitor_flr(struct xe_gt *gt, u32 vfid) in xe_gt_sriov_pf_monitor_flr() argument
28 xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); in xe_gt_sriov_pf_monitor_flr()
29 xe_gt_sriov_pf_assert_vfid(gt, vfid); in xe_gt_sriov_pf_monitor_flr()
32 gt->sriov.pf.vfs[vfid].monitor.guc.events[e] = 0; in xe_gt_sriov_pf_monitor_flr()
35 static void pf_update_event_counter(struct xe_gt *gt, u32 vfid, in pf_update_event_counter() argument
38 xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); in pf_update_event_counter()
39 xe_gt_assert(gt, e < XE_GUC_KLV_NUM_THRESHOLDS); in pf_update_event_counter()
41 gt->sriov.pf.vfs[vfid].monitor.guc.events[e]++; in pf_update_event_counter()
44 static int pf_handle_vf_threshold_event(struct xe_gt *gt, u32 vfid, u32 threshold) in pf_handle_vf_threshold_event() argument
[all …]
H A Dxe_gt_sriov_pf_debugfs.c119 struct xe_gt *gt = extract_gt(data); \
120 struct xe_device *xe = gt_to_xe(gt); \
127 err = xe_gt_sriov_pf_policy_set_##POLICY(gt, val); \
136 struct xe_gt *gt = extract_gt(data); \
138 *val = xe_gt_sriov_pf_policy_get_##POLICY(gt); \
148 static void pf_add_policy_attrs(struct xe_gt *gt, struct dentry *parent) in pf_add_policy_attrs() argument
150 xe_gt_assert(gt, gt == extract_gt(parent)); in pf_add_policy_attrs()
151 xe_gt_assert(gt, PFID == extract_vfid(parent)); in pf_add_policy_attrs()
197 struct xe_gt *gt = extract_gt(m->private); in sched_groups_info() local
199 gt->sriov.pf.policy.guc.sched_groups.current_mode; in sched_groups_info()
[all …]
H A Dxe_gsc.c47 struct xe_gt *gt = gsc_to_gt(gsc); in memcpy_fw() local
48 struct xe_device *xe = gt_to_xe(gt); in memcpy_fw()
72 struct xe_gt *gt = gsc_to_gt(gsc); in emit_gsc_upload() local
79 bb = xe_bb_new(gt, 4, false); in emit_gsc_upload()
130 struct xe_gt *gt = gsc_to_gt(gsc); in query_compatibility_version() local
131 struct xe_tile *tile = gt_to_tile(gt); in query_compatibility_version()
132 struct xe_device *xe = gt_to_xe(gt); in query_compatibility_version()
144 xe_gt_err(gt, "failed to allocate bo for GSC version query\n"); in query_compatibility_version()
158 xe_gt_err(gt, in query_compatibility_version()
168 xe_gt_err(gt, "HuC: invalid GSC reply for version query (err=%d)\n", err); in query_compatibility_version()
[all …]
H A Dxe_gsc_proxy.c32 * is integrated in GT, the graphics driver needs to transfer the messages from
68 struct xe_gt *gt = gsc_to_gt(gsc); in xe_gsc_proxy_init_done() local
69 u32 fwsts1 = xe_mmio_read32(&gt->mmio, HECI_FWSTS1(MTL_GSC_HECI1_BASE)); in xe_gsc_proxy_init_done()
77 struct xe_gt *gt = gsc_to_gt(gsc); in xe_gsc_wait_for_proxy_init_done() local
80 return xe_mmio_wait32(&gt->mmio, HECI_FWSTS1(MTL_GSC_HECI1_BASE), in xe_gsc_wait_for_proxy_init_done()
88 struct xe_gt *gt = gsc_to_gt(gsc); in __gsc_proxy_irq_rmw() local
93 xe_mmio_rmw32(&gt->mmio, HECI_H_CSR(MTL_GSC_HECI2_BASE), clr, set); in __gsc_proxy_irq_rmw()
112 struct xe_gt *gt = gsc_to_gt(gsc); in proxy_send_to_csme() local
118 xe_gt_err(gt, "Failed to send CSME proxy message\n"); in proxy_send_to_csme()
124 xe_gt_err(gt, "Failed to receive CSME proxy message\n"); in proxy_send_to_csme()
[all …]
H A Dxe_pmu.c22 * Expose events/counters like GT-C6 residency, GT frequency and per-class-engine
34 * gt[60:63] Selects gt for the event
39 * For engine specific events (engine-*), gt, engine_class and engine_instance parameters must be
42 * For gt specific events (gt-*) gt parameter must be passed. All other parameters will be 0.
47 * $ perf list | grep gt-c6
49 * To sample a specific event for a GT at regular intervals:
51 * $ perf stat -e <event_name,gt=> -I <interval>
94 u64 gt = config_to_gt_id(event->attr.config); in event_to_gt() local
96 return xe_device_get_gt(xe, gt); in event_to_gt()
137 struct xe_gt *gt; in event_gt_forcewake() local
[all …]
H A Dxe_gt_sysfs.c27 struct xe_gt *gt = arg; in gt_sysfs_fini() local
29 kobject_put(gt->sysfs); in gt_sysfs_fini()
32 int xe_gt_sysfs_init(struct xe_gt *gt) in xe_gt_sysfs_init() argument
34 struct xe_tile *tile = gt_to_tile(gt); in xe_gt_sysfs_init()
35 struct xe_device *xe = gt_to_xe(gt); in xe_gt_sysfs_init()
44 kg->gt = gt; in xe_gt_sysfs_init()
46 err = kobject_add(&kg->base, tile->sysfs, "gt%d", gt->info.id); in xe_gt_sysfs_init()
52 gt->sysfs = &kg->base; in xe_gt_sysfs_init()
54 return devm_add_action_or_reset(xe->drm.dev, gt_sysfs_fini, gt); in xe_gt_sysfs_init()
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt.h17 * Check that the GT is a graphics GT and has an IP version within the
20 #define IS_GFX_GT_IP_RANGE(gt, from, until) ( \ argument
23 ((gt)->type != GT_MEDIA && \
24 GRAPHICS_VER_FULL((gt)->i915) >= (from) && \
25 GRAPHICS_VER_FULL((gt)->i915) <= (until)))
28 * Check that the GT is a media GT and has an IP version within the
34 #define IS_MEDIA_GT_IP_RANGE(gt, from, until) ( \ argument
37 ((gt) && (gt)->type == GT_MEDIA && \
38 MEDIA_VER_FULL((gt)->i915) >= (from) && \
39 MEDIA_VER_FULL((gt)->i915) <= (until)))
[all …]
H A Dintel_gt_pm_irq.c13 static void write_pm_imr(struct intel_gt *gt) in write_pm_imr() argument
15 struct drm_i915_private *i915 = gt->i915; in write_pm_imr()
16 struct intel_uncore *uncore = gt->uncore; in write_pm_imr()
17 u32 mask = gt->pm_imr; in write_pm_imr()
32 static void gen6_gt_pm_update_irq(struct intel_gt *gt, in gen6_gt_pm_update_irq() argument
40 lockdep_assert_held(gt->irq_lock); in gen6_gt_pm_update_irq()
42 new_val = gt->pm_imr; in gen6_gt_pm_update_irq()
46 if (new_val != gt->pm_imr) { in gen6_gt_pm_update_irq()
47 gt->pm_imr = new_val; in gen6_gt_pm_update_irq()
48 write_pm_imr(gt); in gen6_gt_pm_update_irq()
[all …]
H A Dselftest_reset.c18 __igt_reset_stolen(struct intel_gt *gt, in __igt_reset_stolen() argument
22 struct i915_ggtt *ggtt = gt->ggtt; in __igt_reset_stolen()
23 const struct resource *dsm = &gt->i915->dsm.stolen; in __igt_reset_stolen()
51 igt_global_reset_lock(gt); in __igt_reset_stolen()
52 wakeref = intel_runtime_pm_get(gt->uncore->rpm); in __igt_reset_stolen()
54 err = igt_spinner_init(&spin, gt); in __igt_reset_stolen()
58 for_each_engine(engine, gt, id) { in __igt_reset_stolen()
89 i915_gem_get_pat_index(gt->i915, in __igt_reset_stolen()
98 if (!__drm_mm_interval_first(&gt->i915->mm.stolen, in __igt_reset_stolen()
114 intel_gt_reset(gt, mask, NULL); in __igt_reset_stolen()
[all …]
H A Dintel_gt_sysfs.c23 return !strncmp(kobj->name, "gt", 2); in is_object_gt()
31 * has been called, whether it's called from gt/ or from in intel_gt_sysfs_get_drvdata()
35 * If the interface is called from gt/ then private data is in intel_gt_sysfs_get_drvdata()
49 static struct kobject *gt_get_parent_obj(struct intel_gt *gt) in gt_get_parent_obj() argument
51 return &gt->i915->drm.primary->kdev->kobj; in gt_get_parent_obj()
58 struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name); in id_show() local
60 return sysfs_emit(buf, "%u\n", gt->info.id); in id_show()
81 void intel_gt_sysfs_register(struct intel_gt *gt) in intel_gt_sysfs_register() argument
88 * We generate the files only for gt 0 in intel_gt_sysfs_register()
91 if (gt_is_root(gt)) in intel_gt_sysfs_register()
[all …]
H A Dselftest_slpc.c22 struct intel_gt *gt; member
53 static int slpc_set_freq(struct intel_gt *gt, u32 freq) in slpc_set_freq() argument
56 struct intel_guc_slpc *slpc = &gt_to_guc(gt)->slpc; in slpc_set_freq()
113 static u64 measure_power_at_freq(struct intel_gt *gt, int *freq, u64 *power) in measure_power_at_freq() argument
117 err = slpc_set_freq(gt, *freq); in measure_power_at_freq()
120 *freq = intel_rps_read_actual_frequency(&gt->rps); in measure_power_at_freq()
121 *power = slpc_measure_power(&gt->rps, freq); in measure_power_at_freq()
198 static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine) in slpc_power() argument
200 struct intel_guc_slpc *slpc = &gt_to_guc(gt)->slpc; in slpc_power()
212 if (!librapl_supported(gt->i915)) in slpc_power()
[all …]
H A Dselftest_hangcheck.c33 struct intel_gt *gt; member
41 static int hang_init(struct hang *h, struct intel_gt *gt) in hang_init() argument
47 h->gt = gt; in hang_init()
49 h->ctx = kernel_context(gt->i915, NULL); in hang_init()
55 h->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_init()
61 h->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_init()
76 intel_gt_coherent_map_type(gt, h->obj, false)); in hang_init()
106 struct intel_gt *gt = h->gt; in hang_create_request() local
116 obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_create_request()
122 vaddr = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, false)); in hang_create_request()
[all …]
H A Dintel_gt_mcr.h11 void intel_gt_mcr_init(struct intel_gt *gt);
12 void intel_gt_mcr_lock(struct intel_gt *gt, unsigned long *flags);
13 void intel_gt_mcr_unlock(struct intel_gt *gt, unsigned long flags);
14 void intel_gt_mcr_lock_sanitize(struct intel_gt *gt);
16 u32 intel_gt_mcr_read(struct intel_gt *gt,
19 u32 intel_gt_mcr_read_any_fw(struct intel_gt *gt, i915_mcr_reg_t reg);
20 u32 intel_gt_mcr_read_any(struct intel_gt *gt, i915_mcr_reg_t reg);
22 void intel_gt_mcr_unicast_write(struct intel_gt *gt,
25 void intel_gt_mcr_multicast_write(struct intel_gt *gt,
27 void intel_gt_mcr_multicast_write_fw(struct intel_gt *gt,
[all …]
H A Dselftest_gt_pm.c81 struct intel_gt *gt = arg; in live_gt_clocks() local
87 if (!gt->clock_frequency) { /* unknown */ in live_gt_clocks()
92 if (GRAPHICS_VER(gt->i915) < 4) /* Any CS_TIMESTAMP? */ in live_gt_clocks()
95 wakeref = intel_gt_pm_get(gt); in live_gt_clocks()
96 intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL); in live_gt_clocks()
98 for_each_engine(engine, gt, id) { in live_gt_clocks()
109 time = intel_gt_clock_interval_to_ns(engine->gt, cycles); in live_gt_clocks()
110 expected = intel_gt_ns_to_clock_interval(engine->gt, dt); in live_gt_clocks()
114 engine->gt->clock_frequency / 1000); in live_gt_clocks()
131 intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL); in live_gt_clocks()
[all …]
H A Dintel_gt_irq.h23 void gen11_gt_irq_reset(struct intel_gt *gt);
24 void gen11_gt_irq_postinstall(struct intel_gt *gt);
25 void gen11_gt_irq_handler(struct intel_gt *gt, const u32 master_ctl);
27 bool gen11_gt_reset_one_iir(struct intel_gt *gt,
31 void gen5_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
33 void gen5_gt_irq_postinstall(struct intel_gt *gt);
34 void gen5_gt_irq_reset(struct intel_gt *gt);
35 void gen5_gt_disable_irq(struct intel_gt *gt, u32 mask);
36 void gen5_gt_enable_irq(struct intel_gt *gt, u32 mask);
38 void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dpci.c80 { 0x106b, 0x0605, "GeForce GT 130" },
86 { 0x1043, 0x202d, "GeForce GT 220M" },
92 { 0x152d, 0x0850, "GeForce GT 240M LE" },
98 { 0x1043, 0x14a2, "GeForce GT 320M" },
99 { 0x1043, 0x14d2, "GeForce GT 320M" },
105 { 0x106b, 0x0633, "GeForce GT 120" },
111 { 0x106b, 0x0693, "GeForce GT 120" },
232 { 0x1025, 0x0692, "GeForce GT 620M" },
233 { 0x1025, 0x0725, "GeForce GT 620M" },
234 { 0x1025, 0x0728, "GeForce GT 620M" },
[all …]
/linux/drivers/gpu/drm/i915/selftests/
H A Digt_reset.c9 #include "gt/intel_engine.h"
10 #include "gt/intel_gt.h"
14 void igt_global_reset_lock(struct intel_gt *gt) in igt_global_reset_lock() argument
19 pr_debug("%s: current gpu_error=%08lx\n", __func__, gt->reset.flags); in igt_global_reset_lock()
21 while (test_and_set_bit(I915_RESET_BACKOFF, &gt->reset.flags)) in igt_global_reset_lock()
22 wait_event(gt->reset.queue, in igt_global_reset_lock()
23 !test_bit(I915_RESET_BACKOFF, &gt->reset.flags)); in igt_global_reset_lock()
25 for_each_engine(engine, gt, id) { in igt_global_reset_lock()
27 &gt->reset.flags)) in igt_global_reset_lock()
28 wait_on_bit(&gt->reset.flags, I915_RESET_ENGINE + id, in igt_global_reset_lock()
[all …]
H A Digt_live_test.c8 #include "gt/intel_gt.h"
9 #include "gt/intel_gt_print.h"
22 struct intel_gt *gt; in igt_live_test_begin() local
30 for_each_gt(gt, i915, i) { in igt_live_test_begin()
32 err = intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT); in igt_live_test_begin()
34 gt_err(gt, "%s(%s): GT failed to idle before, with err=%d!", in igt_live_test_begin()
39 for_each_engine(engine, gt, id) in igt_live_test_begin()
55 struct intel_gt *gt; in igt_live_test_end() local
68 for_each_gt(gt, i915, i) { in igt_live_test_end()
69 for_each_engine(engine, gt, id) { in igt_live_test_end()
[all …]
/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_gsc_uc.c8 #include "gt/intel_gt.h"
9 #include "gt/intel_gt_print.h"
19 struct intel_gt *gt = gsc_uc_to_gt(gsc); in gsc_work() local
24 wakeref = intel_runtime_pm_get(gt->uncore->rpm); in gsc_work()
26 spin_lock_irq(gt->irq_lock); in gsc_work()
29 spin_unlock_irq(gt->irq_lock); in gsc_work()
53 if (intel_uc_uses_huc(&gt->uc) && in gsc_work()
54 intel_huc_is_authenticated(&gt->uc.huc, INTEL_HUC_AUTH_BY_GUC)) in gsc_work()
55 intel_huc_auth(&gt->uc.huc, INTEL_HUC_AUTH_BY_GSC); in gsc_work()
60 gt_err(gt, "Proxy request received with GSC not loaded!\n"); in gsc_work()
[all …]
H A Dintel_guc_ads.c9 #include "gt/intel_engine_regs.h"
10 #include "gt/intel_gt.h"
11 #include "gt/intel_gt_mcr.h"
12 #include "gt/intel_gt_regs.h"
13 #include "gt/intel_lrc.h"
14 #include "gt/shmem_utils.h"
163 struct intel_gt *gt = guc_to_gt(guc); in guc_policies_init() local
164 struct drm_i915_private *i915 = gt->i915; in guc_policies_init()
206 struct intel_gt *gt = guc_to_gt(guc); in intel_guc_global_policies_update() local
222 with_intel_runtime_pm(&gt->i915->runtime_pm, wakeref) in intel_guc_global_policies_update()
[all …]
/linux/drivers/media/radio/
H A Dradio-gemtek.c114 #define BU2614_FMUN_BITS 1 /* GT, Frequency measurement time & unlock */
150 static void gemtek_bu2614_transmit(struct gemtek *gt) in gemtek_bu2614_transmit() argument
152 struct radio_isa_card *isa = &gt->isa; in gemtek_bu2614_transmit()
155 mute = gt->muted ? GEMTEK_MT : 0x00; in gemtek_bu2614_transmit()
160 for (i = 0, q = gt->bu2614data; i < 32; i++, q >>= 1) { in gemtek_bu2614_transmit()
182 struct gemtek *gt = kzalloc_obj(*gt); in gemtek_alloc() local
184 if (gt) in gemtek_alloc()
185 gt->muted = true; in gemtek_alloc()
186 return gt ? &gt->isa : NULL; in gemtek_alloc()
194 struct gemtek *gt = container_of(isa, struct gemtek, isa); in gemtek_s_frequency() local
[all …]

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