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Searched refs:cpg_mode (Results 1 – 25 of 25) sorted by relevance

/linux/drivers/clk/renesas/
H A Dr8a779f0-cpg-mssr.c201 u32 cpg_mode; in r8a779f0_cpg_mssr_init() local
204 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a779f0_cpg_mssr_init()
208 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a779f0_cpg_mssr_init()
210 dev_err(dev, "Prohibited setting (cpg_mode=0x%x)\n", cpg_mode); in r8a779f0_cpg_mssr_init()
214 return rcar_gen4_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode); in r8a779f0_cpg_mssr_init()
H A Dclk-r8a7740.c56 static u32 cpg_mode __initdata;
69 switch (cpg_mode & (BIT(2) | BIT(1))) { in r8a7740_cpg_register_clock()
87 if (cpg_mode & BIT(1)) in r8a7740_cpg_register_clock()
149 if (of_property_read_u32(np, "renesas,mode", &cpg_mode)) in r8a7740_cpg_clocks_init()
H A Dclk-rz.c55 unsigned int cpg_mode = MD_CLK(rz_cpg_read_mode_pins()); in rz_cpg_register_clock() local
56 const char *parent_name = of_clk_get_parent_name(np, cpg_mode); in rz_cpg_register_clock()
58 mult = cpg_mode ? (32 / 4) : 30; in rz_cpg_register_clock()
H A Dr8a7792-cpg-mssr.c196 u32 cpg_mode; in r8a7792_cpg_mssr_init() local
199 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a7792_cpg_mssr_init()
203 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7792_cpg_mssr_init()
205 return rcar_gen2_cpg_init(cpg_pll_config, 3, cpg_mode); in r8a7792_cpg_mssr_init()
H A Dr8a77470-cpg-mssr.c198 u32 cpg_mode; in r8a77470_cpg_mssr_init() local
201 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a77470_cpg_mssr_init()
205 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a77470_cpg_mssr_init()
207 return rcar_gen2_cpg_init(cpg_pll_config, 2, cpg_mode); in r8a77470_cpg_mssr_init()
H A Dr8a7745-cpg-mssr.c215 u32 cpg_mode; in r8a7745_cpg_mssr_init() local
218 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a7745_cpg_mssr_init()
222 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7745_cpg_mssr_init()
224 return rcar_gen2_cpg_init(cpg_pll_config, 3, cpg_mode); in r8a7745_cpg_mssr_init()
H A Dr8a774a1-cpg-mssr.c311 u32 cpg_mode; in r8a774a1_cpg_mssr_init() local
314 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a774a1_cpg_mssr_init()
318 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a774a1_cpg_mssr_init()
320 dev_err(dev, "Prohibited setting (cpg_mode=0x%x)\n", cpg_mode); in r8a774a1_cpg_mssr_init()
324 return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode); in r8a774a1_cpg_mssr_init()
H A Dr8a774b1-cpg-mssr.c307 u32 cpg_mode; in r8a774b1_cpg_mssr_init() local
310 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a774b1_cpg_mssr_init()
314 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a774b1_cpg_mssr_init()
316 dev_err(dev, "Prohibited setting (cpg_mode=0x%x)\n", cpg_mode); in r8a774b1_cpg_mssr_init()
320 return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode); in r8a774b1_cpg_mssr_init()
H A Dr8a774e1-cpg-mssr.c319 u32 cpg_mode; in r8a774e1_cpg_mssr_init() local
322 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a774e1_cpg_mssr_init()
326 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a774e1_cpg_mssr_init()
328 dev_err(dev, "Prohibited setting (cpg_mode=0x%x)\n", cpg_mode); in r8a774e1_cpg_mssr_init()
332 return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode); in r8a774e1_cpg_mssr_init()
H A Dr8a77965-cpg-mssr.c336 u32 cpg_mode; in r8a77965_cpg_mssr_init() local
339 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a77965_cpg_mssr_init()
343 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a77965_cpg_mssr_init()
345 dev_err(dev, "Prohibited setting (cpg_mode=0x%x)\n", cpg_mode); in r8a77965_cpg_mssr_init()
349 return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode); in r8a77965_cpg_mssr_init()
H A Dr8a7796-cpg-mssr.c342 u32 cpg_mode; in r8a7796_cpg_mssr_init() local
345 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a7796_cpg_mssr_init()
349 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7796_cpg_mssr_init()
351 dev_err(dev, "Prohibited setting (cpg_mode=0x%x)\n", cpg_mode); in r8a7796_cpg_mssr_init()
361 return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode); in r8a7796_cpg_mssr_init()
H A Dr8a77995-cpg-mssr.c227 u32 cpg_mode; in r8a77995_cpg_mssr_init() local
230 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a77995_cpg_mssr_init()
234 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a77995_cpg_mssr_init()
236 return rcar_gen3_cpg_init(cpg_pll_config, 0, cpg_mode); in r8a77995_cpg_mssr_init()
H A Dr8a77980-cpg-mssr.c233 u32 cpg_mode; in r8a77980_cpg_mssr_init() local
236 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a77980_cpg_mssr_init()
240 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a77980_cpg_mssr_init()
242 return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode); in r8a77980_cpg_mssr_init()
H A Dr8a7794-cpg-mssr.c223 u32 cpg_mode; in r8a7794_cpg_mssr_init() local
226 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a7794_cpg_mssr_init()
230 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7794_cpg_mssr_init()
232 return rcar_gen2_cpg_init(cpg_pll_config, 3, cpg_mode); in r8a7794_cpg_mssr_init()
H A Dr8a7742-cpg-mssr.c245 u32 cpg_mode; in r8a7742_cpg_mssr_init() local
248 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a7742_cpg_mssr_init()
252 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7742_cpg_mssr_init()
254 return rcar_gen2_cpg_init(cpg_pll_config, 2, cpg_mode); in r8a7742_cpg_mssr_init()
H A Dr8a7743-cpg-mssr.c241 u32 cpg_mode; in r8a7743_cpg_mssr_init() local
244 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a7743_cpg_mssr_init()
248 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7743_cpg_mssr_init()
258 return rcar_gen2_cpg_init(cpg_pll_config, 2, cpg_mode); in r8a7743_cpg_mssr_init()
H A Dr8a7795-cpg-mssr.c354 u32 cpg_mode; in r8a7795_cpg_mssr_init() local
366 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a7795_cpg_mssr_init()
370 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7795_cpg_mssr_init()
372 dev_err(dev, "Prohibited setting (cpg_mode=0x%x)\n", cpg_mode); in r8a7795_cpg_mssr_init()
376 return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode); in r8a7795_cpg_mssr_init()
H A Dr8a7791-cpg-mssr.c246 u32 cpg_mode; in r8a7791_cpg_mssr_init() local
249 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a7791_cpg_mssr_init()
253 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7791_cpg_mssr_init()
263 return rcar_gen2_cpg_init(cpg_pll_config, 2, cpg_mode); in r8a7791_cpg_mssr_init()
H A Dr8a7790-cpg-mssr.c246 u32 cpg_mode; in r8a7790_cpg_mssr_init() local
249 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a7790_cpg_mssr_init()
253 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7790_cpg_mssr_init()
255 return rcar_gen2_cpg_init(cpg_pll_config, 2, cpg_mode); in r8a7790_cpg_mssr_init()
H A Dr8a774c0-cpg-mssr.c277 u32 cpg_mode; in r8a774c0_cpg_mssr_init() local
280 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a774c0_cpg_mssr_init()
284 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a774c0_cpg_mssr_init()
286 return rcar_gen3_cpg_init(cpg_pll_config, 0, cpg_mode); in r8a774c0_cpg_mssr_init()
H A Dr8a77990-cpg-mssr.c291 u32 cpg_mode; in r8a77990_cpg_mssr_init() local
294 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a77990_cpg_mssr_init()
298 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a77990_cpg_mssr_init()
300 return rcar_gen3_cpg_init(cpg_pll_config, 0, cpg_mode); in r8a77990_cpg_mssr_init()
H A Dr8a779a0-cpg-mssr.c285 u32 cpg_mode; in r8a779a0_cpg_mssr_init() local
288 error = rcar_rst_read_mode_pins(&cpg_mode); in r8a779a0_cpg_mssr_init()
292 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a779a0_cpg_mssr_init()
294 return rcar_gen4_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode); in r8a779a0_cpg_mssr_init()
H A Drcar-gen2-cpg.c262 static u32 cpg_mode __initdata;
329 div = cpg_mode & BIT(18) ? 36 : 24; in rcar_gen2_cpg_clk_register()
357 div = (cpg_mode & (BIT(3) | BIT(2) | BIT(1))) == BIT(2) ? in rcar_gen2_cpg_clk_register()
385 cpg_mode = mode; in rcar_gen2_cpg_init()
H A Drcar-gen3-cpg.c328 static u32 cpg_mode __initdata;
436 if (cpg_mode & BIT(28)) in rcar_gen3_cpg_clk_register()
445 if (cpg_mode & BIT(core->offset)) { in rcar_gen3_cpg_clk_register()
544 cpg_mode = mode; in rcar_gen3_cpg_init()
H A Drcar-gen4-cpg.c29 static u32 cpg_mode __initdata;
497 if (cpg_mode & BIT(core->offset)) { in rcar_gen4_cpg_clk_register()
543 cpg_mode = mode; in rcar_gen4_cpg_init()