Merge branch 'next' into for-linus

Prepare input updates for 6.11 merge window.

Merge tag 'v6.9' into next

Sync up with the mainline to bring in the new cleanup API.

Merge drm/drm-next into drm-intel-gt-next

Work that needs to land in drm-intel-gt-next depends on two patches only
present in drm-intel-next, absence of which is causing a merge conflict:

3b918f4

Merge drm/drm-next into drm-intel-gt-next

Work that needs to land in drm-intel-gt-next depends on two patches only
present in drm-intel-next, absence of which is causing a merge conflict:

3b918f4f0c8b ("drm/i915/pxp: Optimize GET_PARAM:PXP_STATUS")
ac765b7018f6 ("drm/i915/pxp/mtl: intel_pxp_init_hw needs runtime-pm inside pm-complete")

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

show more ...

Merge branch 'linus' into smp/core

Pull in upstream to get the fixes so depending changes can be applied.

Merge drm/drm-next into drm-misc-next

Updating drm-misc-next to the state of Linux v6.6-rc2.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge tag 'v6.6-rc4' into perf/core, to pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>

Merge tag 'v6.6-rc2' into locking/core, to pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>

Merge drm/drm-next into drm-intel-next

Sync to v6.6-rc1.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Merge drm/drm-fixes into drm-misc-fixes

Forwarding to v6.6-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk subsystem updates from Stephen Boyd:
"This pull request is full of clk driver changes. In fact, there a

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk subsystem updates from Stephen Boyd:
"This pull request is full of clk driver changes. In fact, there aren't
any changes to the clk framework this time around. That's probably
because everyone was on vacation (yours truly included). We did lose a
couple clk drivers this time around because nobody was using those
devices. That skews the diffstat a bit, but either way, nothing looks
out of the ordinary here. The usual suspects are chugging along adding
support for more SoCs and fixing bugs.

If I had to choose, I'd say the theme for the past few months has been
"polish". There's quite a few patches that migrate to
devm_platform_ioremap_resource() in here. And there's more than a
handful of patches that move the NR_CLKS define from the DT binding
header to the driver. There's even patches that migrate drivers to use
clk_parent_data and clk_hw to describe clk tree topology. It seems
that the spring (summer?) cleaning bug got some folks, or the
semiconductor shortage finally hit the software side.

New Drivers:
- StarFive JH7110 SoC clock drivers
- Qualcomm IPQ5018 Global Clock Controller driver
- Versa3 clk generator to support 48KHz playback/record with audio
codec on RZ/G2L SMARC EVK

Removed Drivers:
- Remove non-OF mmp clk drivers
- Remove OXNAS clk driver

Updates:
- Add __counted_by to struct clk_hw_onecell_data and struct
spmi_pmic_div_clk_cc
- Move defines for numbers of clks (NR_CLKS) from DT headers to
drivers
- Introduce kstrdup_and_replace() and use it
- Add PLL rates for Rockchip rk3568
- Add the display clock tree for Rockchip rv1126
- Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and
RZ/G2 SoCs
- Convert sun9i-mmc clock to use
devm_platform_get_and_ioremap_resource()
- Fix function name in a comment in ccu_mmc_timing.c
- Parameter name correction for ccu_nkm_round_rate()
- Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e.
consider alternative parent rates when determining clock rates
- Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi
- Support finding closest (as opposed to closest but not higher)
clock rate for NM, NKM, mux and div type clocks, as use it for
Allwinner A64 pll-video0
- Prefer current parent rate if able to generate ideal clock rate for
Allwinner NKM clocks
- Clean up Qualcomm SMD RPM driver, with interconnect bus clocks
moved out to the interconnect drivers
- Fix various PM runtime bugs across many Qualcomm clk drivers
- Migrate Qualcomm MDM9615 is to parent_hw and parent_data
- Add network related resets on Qualcomm IPQ4019
- Add a couple missing USB related clocks to Qualcomm IPQ9574
- Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock
controller
- In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs,
and GPLL1 are added, while PCIe pipe clock, SDCC rcg ops are
corrected
- Add missing GDSCs to and correct GDSCs for the SC8280XP global
clock controller driver
- Support retention for the Qualcomm SC8280XP display clock
controller GDSCs.
- Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE
to fix issues with missing parent clocks across sc7180, sm7150,
sm6350 and sm8250, while sm8450 is corrected to use floor ops
- Correct Qualcomm SM6350 GPU clock controller's clock supplies
- Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver
- Add missing OXILICX GDSC to Qualcomm MSM8226 GCC
- Change the delay in the Qualcomm reset controller to fsleep() for
correctness
- Extend the Qualcomm SM83550 Video clock controller to support
SC8280XP
- Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and
R-Car H3, M3-W, and M3-N SoCs
- Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M
- Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five
- Add the PDM IPC clock for i.MX93
- Add 519.75MHz frequency support for i.MX9 PLL
- Simplify the .determine_rate() implementation for i.MX GPR mux
- Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource()
- Add the audio mux clock to i.MX8
- Fix the SPLL2 MULT range for PLLv4
- Update the SPLL2 type in i.MX8ULP
- Fix the SAI4 clock on i.MX8MP
- Add silicon revision print for i.MX25 on clocks init
- Drop the return value from __mx25_clocks_init()
- Fix the clock pauses on no-op set_rate for i.MX8M composite clock
- Drop restrictions for i.MX PLL14xx and fix its max prediv value
- Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to
allow glitch free switching"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (207 commits)
clk: qcom: Fix SM_GPUCC_8450 dependencies
clk: lmk04832: Support using PLL1_LD as SPI readback pin
clk: lmk04832: Don't disable vco clock on probe fail
clk: lmk04832: Set missing parent_names for output clocks
clk: mvebu: Convert to devm_platform_ioremap_resource()
clk: nuvoton: Convert to devm_platform_ioremap_resource()
clk: socfpga: agilex: Convert to devm_platform_ioremap_resource()
clk: ti: Use devm_platform_get_and_ioremap_resource()
clk: mediatek: Convert to devm_platform_ioremap_resource()
clk: hsdk-pll: Convert to devm_platform_ioremap_resource()
clk: gemini: Convert to devm_platform_ioremap_resource()
clk: fsl-sai: Convert to devm_platform_ioremap_resource()
clk: bm1880: Convert to devm_platform_ioremap_resource()
clk: axm5516: Convert to devm_platform_ioremap_resource()
clk: actions: Convert to devm_platform_ioremap_resource()
clk: cdce925: Remove redundant of_match_ptr()
clk: pxa910: Move number of clocks to driver source
clk: pxa1928: Move number of clocks to driver source
clk: pxa168: Move number of clocks to driver source
clk: mmp2: Move number of clocks to driver source
...

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Merge branch 'next' into for-linus

Prepare input updates for 6.6 merge window.

Merge branches 'clk-bindings', 'clk-starfive', 'clk-rm', 'clk-renesas' and 'clk-cleanup' into clk-next

- Remove OXNAS clk driver

* clk-bindings:
dt-bindings: clock: versal: Convert the xlnx,zynq

Merge branches 'clk-bindings', 'clk-starfive', 'clk-rm', 'clk-renesas' and 'clk-cleanup' into clk-next

- Remove OXNAS clk driver

* clk-bindings:
dt-bindings: clock: versal: Convert the xlnx,zynqmp-clk.txt to yaml
dt-bindings: clock: xlnx,versal-clk: drop select:false
dt-bindings: clock: versal: Add versal-net compatible string
dt-bindings: clock: ast2600: Add I3C and MAC reset definitions
dt-bindings: arm: hisilicon,cpuctrl: Merge "hisilicon,hix5hd2-clock" into parent binding

* clk-starfive:
reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support
clk: starfive: Simplify .determine_rate()
clk: starfive: Add StarFive JH7110 Video-Output clock driver
clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver
clk: starfive: Add StarFive JH7110 System-Top-Group clock driver
clk: starfive: jh7110-sys: Add PLL clocks source from DTS
clk: starfive: Add StarFive JH7110 PLL clock driver
dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator
dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator
dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator
dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs
dt-bindings: soc: starfive: Add StarFive syscon module
dt-bindings: clock: Add StarFive JH7110 PLL clock generator

* clk-rm:
dt-bindings: clk: oxnas: remove obsolete bindings
clk: oxnas: remove obsolete clock driver

* clk-renesas:
clk: renesas: rcar-gen3: Add ADG clocks
clk: renesas: r8a77965: Add 3DGE and ZG support
clk: renesas: r8a7796: Add 3DGE and ZG support
clk: renesas: r8a7795: Add 3DGE and ZG support
clk: renesas: emev2: Remove obsolete clkdev registration
clk: renesas: r9a07g043: Add MTU3a clock and reset entry
clk: renesas: rzg2l: Simplify .determine_rate()
clk: renesas: r9a09g011: Add CSI related clocks
clk: renesas: r8a774b1: Add 3DGE and ZG support
clk: renesas: r8a774e1: Add 3DGE and ZG support
clk: renesas: r8a774a1: Add 3DGE and ZG support
clk: renesas: rcar-gen3: Add support for ZG clock

* clk-cleanup:
clk: mvebu: Convert to devm_platform_ioremap_resource()
clk: nuvoton: Convert to devm_platform_ioremap_resource()
clk: socfpga: agilex: Convert to devm_platform_ioremap_resource()
clk: ti: Use devm_platform_get_and_ioremap_resource()
clk: mediatek: Convert to devm_platform_ioremap_resource()
clk: hsdk-pll: Convert to devm_platform_ioremap_resource()
clk: gemini: Convert to devm_platform_ioremap_resource()
clk: fsl-sai: Convert to devm_platform_ioremap_resource()
clk: bm1880: Convert to devm_platform_ioremap_resource()
clk: axm5516: Convert to devm_platform_ioremap_resource()
clk: actions: Convert to devm_platform_ioremap_resource()
clk: cdce925: Remove redundant of_match_ptr()
drivers: clk: keystone: Fix parameter judgment in _of_pll_clk_init()
clk: Explicitly include correct DT includes

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Merge tag 'renesas-clk-for-v6.6-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull another Renesas clk driver update from Geert Uytterhoeven:

- Add

Merge tag 'renesas-clk-for-v6.6-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull another Renesas clk driver update from Geert Uytterhoeven:

- Add Audio Clock Generator (ADG) clocks on R-Car Gen3 and RZ/G2 SoCs

* tag 'renesas-clk-for-v6.6-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: rcar-gen3: Add ADG clocks

show more ...

clk: renesas: rcar-gen3: Add ADG clocks

R-Car Sound needs to enable "ADG" on RMSTPCR9/SMSTPCR9 bit 22 to use
clk_i which came from the internal S0D4 or ZA2 clock.

Signed-off-by: Kuninori Morimoto <

clk: renesas: rcar-gen3: Add ADG clocks

R-Car Sound needs to enable "ADG" on RMSTPCR9/SMSTPCR9 bit 22 to use
clk_i which came from the internal S0D4 or ZA2 clock.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Vincenzo De Michele <vincenzo.michele@davinci.de> # R-Car M3-N
Tested-by: Patrick Keil <patrick.keil@conti-engineering.com> # R-Car M3-N
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/87pm47prox.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87o7jrpros.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87mszbpron.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87leevproh.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87jzufprod.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87il9zpro8.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87h6pjpro4.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87fs53prny.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87edknprnt.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Merge tag 'v6.4' into next

Sync up with mainline to bring in updates to shared infrastructure.

Merge branch 'for-6.5/apple' into for-linus

- improved support for Keychron K8 keyboard (Lasse Brun)

Merge drm/drm-next into drm-misc-next-fixes

Backmerging to sync drm-misc-next-fixes with drm-misc-next.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge branch 'drm-next' of git://anongit.freedesktop.org/drm/drm into msm-next-lumag-base

Merge the drm-next tree to pick up the DRM DSC helpers (merged via
drm-intel-next tree). MSM DSC v1.2 patche

Merge branch 'drm-next' of git://anongit.freedesktop.org/drm/drm into msm-next-lumag-base

Merge the drm-next tree to pick up the DRM DSC helpers (merged via
drm-intel-next tree). MSM DSC v1.2 patches depend on these helpers.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

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Merge tag 'v6.4-rc4' into wpan-next/staging

Linux 6.4-rc4

Merge drm/drm-next into drm-intel-gt-next

For conflict avoidance we need the following commit:

c9a9f18d3ad8 drm/i915/huc: use const struct bus_type pointers

Signed-off-by: Tvrtko Ursulin <tvrtko

Merge drm/drm-next into drm-intel-gt-next

For conflict avoidance we need the following commit:

c9a9f18d3ad8 drm/i915/huc: use const struct bus_type pointers

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

show more ...

Merge drm/drm-next into drm-intel-next

Backmerge to get some hwmon dependencies.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Merge drm/drm-fixes into drm-misc-fixes

Let's bring 6.4-rc1 in drm-misc-fixes to start the new fix cycle.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Merge drm/drm-next into drm-misc-next

Start the 6.5 release cycle.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Nothing looks out of the ordinary in this batch of clk driver updates.

T

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Nothing looks out of the ordinary in this batch of clk driver updates.

There are a couple patches to the core clk framework, but they're all
basically cleanups or debugging aids. The driver updates and new
additions are dominated in the diffstat by Qualcomm and MediaTek
drivers. Qualcomm gained a handful of new drivers for various SoCs,
and MediaTek gained a bunch of drivers for MT8188. The MediaTek
drivers are being modernized as well, so there are updates all over
that vendor's clk drivers. There's also a couple other new clk drivers
in here, for example the Starfive JH7110 SoC support is added.

Outside of the two major SoC vendors though, we have the usual
collection of non-critical fixes and cleanups to various clk drivers.
It's good to see that we're getting more cleanups and modernization
patches. Maybe one day we'll be able to properly split clk providers
from clk consumers.

Core:
- Print an informational message before disabling unused clks

New Drivers:
- BCM63268 timer clock and reset controller
- Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and
MT8195 SoCs
- Mediatek MT8188 SoC clk drivers
- Clock driver for Sunplus SP7021 SoC
- Clk driver support for Loongson-2 SoCs
- Clock driver for Skyworks Si521xx I2C PCIe clock generators
- Initial Starfive JH7110 clk/reset support
- Global clock controller drivers for Qualcomm SM7150, IPQ9574,
MSM8917 and IPQ5332 SoCs
- GPU clock controller drivers for SM6115, SM6125, SM6375 and SA8775P
SoCs

Updates:
- Shrink size of clk_fractional_divider a little
- Convert various clk drivers to devm_of_clk_add_hw_provider()
- Convert platform clk drivers to remove_new()
- Converted most Mediatek clock drivers to struct platform_driver
- MediaTek clock drivers can be built as modules
- Reimplement Loongson-1 clk driver with DT support
- Migrate socfpga clk driver to of_clk_add_hw_provider()
- Support for i3c clks on Aspeed ast2600 SoCs
- Add clock generic devm_clk_hw_register_gate_parent_data
- Add audiomix block control for i.MX8MP
- Add support for determine_rate to i.MX composite-8m
- Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate
- Provide clock name in error message for clk-gpr-mux on get parent
failure
- Drop duplicate imx_clk_mux_flags macro
- Register the i.MX8MP Media Disp2 Pix clock as bus clock
- Add Media LDB root clock to i.MX8MP
- Make i.MX8MP nand_usdhc_bus clock as non-critical
- Fix the rate table for i.MX fracn-gppll
- Disable HW control for the fracn-gppll in order to be controlled by
register write
- Add support for interger PLL in fracn-gppll
- Add mcore_booted module parameter to i.MX93 provider
- Add NIC, A55 and ARM PLL clocks to i.MX93
- Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents
- Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP
to get more accurate clock rates
- Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical
- Update some of the i.MX critical clocks flags to allow glitchless
on-the-fly rate change.
- Add I2C5 clock on Renesas R-Car V3H
- Exynos850: Add CMU_G3D clock controller for the Mali GPU
- Extract Exynos5433 (ARM64) clock controller power management code
to common driver parts
- Exynos850: make PMU_ALIVE_PCLK clock critical
- Add Audio, thermal, camera (CSI-2), Image Signal Processor/Channel
Selector (ISPCS), and video capture (VIN) clocks on Renesas R-Car
V4H
- Add video capture (VIN) clocks on Renesas R-Car V3H
- Add Cortex-A53 System CPU (Z2) clocks on Renesas R-Car V3M and V3H
- Support for Stromer Plus PLL on Qualcomm IPQ5332
- Add a missing reset to Qualcomm QCM2290
- Migrate Qualcomm IPQ4019 to clk_parent_data
- Make USB GDSCs enter retention state when disabled on Qualcomm
SM6375, MSM8996 and MSM8998 SoCs
- Set floor rounding clk_ops for Qualcomm QCM2290 SDCC2 clk
- Add two EMAC GDSCs on Qualcomm SC8280XP
- Use shared rcg clk ops in Qualcomm SM6115 GCC
- Park Qualcomm SM8350 PCIe PIPE clks when disabled
- Add GDSCs to Qualcomm SC7280 LPASS audio clock controller
- Add missing XO clocks to Qualcomm MSM8226 and MSM8974
- Convert some Qualcomm clk DT bindings to YAML
- Reparenting fix for the clock supplying camera modules on Rockchip
rk3399
- Mark more critical (bus-)clocks on Rockchip rk3588"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (290 commits)
clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers
clk: rockchip: rk3588: make gate linked clocks critical
clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk
clk: qcom: add the GPUCC driver for sa8775p
dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P
clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling
clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc
clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration
dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property
clk: starfive: Avoid casting iomem pointers
clk: microchip: fix potential UAF in auxdev release callback
clk: qcom: rpm: Use managed `of_clk_add_hw_provider()`
clk: mediatek: fhctl: Mark local variables static
clk: sifive: make SiFive clk drivers depend on ARCH_ symbols
clk: uniphier: Use managed `of_clk_add_hw_provider()`
clk: si5351: Use managed `of_clk_add_hw_provider()`
clk: si570: Use managed `of_clk_add_hw_provider()`
clk: si514: Use managed `of_clk_add_hw_provider()`
clk: lmk04832: Use managed `of_clk_add_hw_provider()`
...

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Merge branches 'clk-cleanup', 'clk-aspeed', 'clk-dt', 'clk-renesas' and 'clk-skyworks' into clk-next

- Support for i3c clks on Aspeed ast2600 SoCs
- Clock driver for Skyworks Si521xx I2C PCIe cloc

Merge branches 'clk-cleanup', 'clk-aspeed', 'clk-dt', 'clk-renesas' and 'clk-skyworks' into clk-next

- Support for i3c clks on Aspeed ast2600 SoCs
- Clock driver for Skyworks Si521xx I2C PCIe clock generators

* clk-cleanup:
clk: microchip: fix potential UAF in auxdev release callback
clk: sifive: make SiFive clk drivers depend on ARCH_ symbols
clk: stm32h7: Remove an unused field in struct stm32_fractional_divider
clk: tegra20: fix gcc-7 constant overflow warning
clock: milbeaut: use devm_platform_get_and_ioremap_resource()
clk: Print an info line before disabling unused clocks
clk: ti: Use of_address_to_resource()
clk: remove unnecessary (void*) conversions
clk: at91: clk-sam9x60-pll: fix return value check
clk: visconti: remove unused visconti_pll_provider::regmap

* clk-aspeed:
dt-bindings: clock: ast2600: Expand comment on reset definitions
clk: ast2600: Add comment about combined clock + reset handling
dt-bindings: clock: ast2600: remove IC36 & I3C7 clock definitions
clk: ast2600: Add full configs for I3C clocks
dt-bindings: clock: ast2600: Add top-level I3C clock
clk: ast2600: allow empty entries in aspeed_g6_gates

* clk-dt:
clk: mediatek: clk-pllfh: fix missing of_node_put() in fhctl_parse_dt()
clk: Use of_property_present() for testing DT property presence

* clk-renesas:
clk: renesas: r8a77980: Add I2C5 clock
clk: rs9: Add support for 9FGV0441
clk: rs9: Support device specific dif bit calculation
dt-bindings: clk: rs9: Add 9FGV0441
clk: rs9: Check for vendor/device ID
clk: renesas: Convert to platform remove callback returning void
clk: renesas: r9a06g032: Improve clock tables
clk: renesas: r9a06g032: Document structs
clk: renesas: r9a06g032: Drop unused fields
clk: renesas: r9a06g032: Improve readability
clk: renesas: r8a77980: Add Z2 clock
clk: renesas: r8a77970: Add Z2 clock
clk: renesas: r8a77995: Fix VIN parent clock
clk: renesas: r8a77980: Add VIN clocks
clk: renesas: r8a779g0: Add VIN clocks
clk: renesas: r8a779g0: Add ISPCS clocks
clk: renesas: r8a779g0: Add CSI-2 clocks
clk: renesas: r8a779g0: Add thermal clock
clk: renesas: r8a779g0: Add Audio clocks
clk: renesas: cpg-mssr: Update MSSR register range for R-Car V4H

* clk-skyworks:
clk: si521xx: Clock driver for Skyworks Si521xx I2C PCIe clock generators
dt-bindings: clk: si521xx: Add Skyworks Si521xx I2C PCIe clock generators

show more ...