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Searched refs:PMC (Results 1 – 25 of 43) sorted by relevance

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/linux/drivers/video/fbdev/riva/
H A Dnvreg.h126 #define PMC_Write(reg,value) DEVICE_WRITE(PMC,reg,value)
127 #define PMC_Read(reg) DEVICE_READ(PMC,reg)
128 #define PMC_Print(reg) DEVICE_PRINT(PMC,reg)
129 #define PMC_Def(mask,value) DEVICE_DEF(PMC,mask,value)
130 #define PMC_Val(mask,value) DEVICE_VALUE(PMC,mask,value)
131 #define PMC_Mask(mask) DEVICE_MASK(PMC,mask)
133 #define PMC_Write(reg,value) DEVICE_WRITE(PMC,reg,value)
134 #define PMC_Read(reg) DEVICE_READ(PMC,reg)
135 #define PMC_Print(reg) DEVICE_PRINT(PMC,reg)
136 #define PMC_Def(mask,value) DEVICE_DEF(PMC,mask,value)
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H A Dnv_driver.c167 if (((NV_RD32(chip->PMC, 0x00000000) & 0xF0) == 0x20) in riva_get_memlen()
168 && ((NV_RD32(chip->PMC, 0x00000000)&0x0F)>=0x02)) { in riva_get_memlen()
281 if (((NV_RD32(chip->PMC, 0x00000000) & 0xF0) == 0x20) in riva_get_maxdclk()
282 && ((NV_RD32(chip->PMC,0x00000000)&0x0F) >= 0x02)) { in riva_get_maxdclk()
330 par->riva.PMC = in riva_common_setup()
H A Driva_hw.h452 volatile U032 __iomem *PMC; member
/linux/Documentation/firmware-guide/acpi/
H A Dintel-pmc-mux.rst10 North Mux-Agent is a function of the Intel PMC firmware that is supported on
11 most Intel based platforms that have the PMC microcontroller. It's used for
16 The North Mux-Agent (aka. Intel PMC Mux Control, or just mux-agent) driver
17 communicates with the PMC microcontroller by using the PMC IPC method
31 is a separate child node under the PMC mux-agent device node. Those nodes do not
35 Scope (_SB.PCI0.PMC.MUX)
54 Scope (_SB.PCI0.PMC.MUX)
73 In order to configure the muxes behind a USB Type-C connector, the PMC firmware
80 the PMC::
117 Scope (_SB.PCI0.PMC)
/linux/Documentation/ABI/obsolete/
H A Dsysfs-driver-intel_pmc_bxt1 These files allow sending arbitrary IPC commands to the PMC/SCU which
10 IPC command to the PMC/SCU.
20 Northpeak through the PMC/SCU.
/linux/drivers/platform/x86/intel/pmc/
H A DKconfig7 tristate "Intel PMC Core driver"
17 tasks in the PMC in order to enable transition into the SLPS0 state.
27 - PMC quirks as needed to enable SLPS0/S0ix
/linux/Documentation/driver-api/xilinx/
H A Deemi.rst10 used by any driver to communicate with PMC(Platform Management Controller).
16 device to communicate with a power management controller (PMC) on a
19 Any driver who wants to communicate with PMC using EEMI APIs use the
/linux/Documentation/devicetree/bindings/clock/
H A Dvt8500.txt16 - reg : shall be the control register offset from PMC base for the pll clock.
36 - enable-reg : shall be the register offset from PMC base for the enable
44 - divisor-reg : shall be the register offset from PMC base for the divisor
/linux/drivers/video/fbdev/nvidia/
H A Dnv_hw.c147 pll = NV_RD32(par->PMC, 0x4020); in nvGetClocks()
149 pll = NV_RD32(par->PMC, 0x4024); in nvGetClocks()
162 pll = NV_RD32(par->PMC, 0x4000); in nvGetClocks()
164 pll = NV_RD32(par->PMC, 0x4004); in nvGetClocks()
950 NV_WR32(par->PMC, 0x0140, 0x00000000); in NVLoadStateExt()
951 NV_WR32(par->PMC, 0x0200, 0xFFFF00FF); in NVLoadStateExt()
952 NV_WR32(par->PMC, 0x0200, 0xFFFFFFFF); in NVLoadStateExt()
1266 NV_WR32(par->PMC, 0x1700, in NVLoadStateExt()
1268 NV_WR32(par->PMC, 0x1704, 0); in NVLoadStateExt()
1269 NV_WR32(par->PMC, 0x1708, 0); in NVLoadStateExt()
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H A Dnv_setup.c234 if (!(NV_RD32(par->PMC, 0x0004) & 0x01000001)) { in nv10GetConfig()
235 NV_WR32(par->PMC, 0x0004, 0x01000001); in nv10GetConfig()
303 par->PMC = par->REGS + (0x00000000 / 4); in NVCommonSetup()
H A Dnv_type.h164 volatile u32 __iomem *PMC; member
/linux/drivers/perf/
H A Dfsl_imx9_ddr_perf.c46 #define PMC(n) (0x40 + 0x18 + (0x10 * n)) macro
374 writel(0, pmu->base + PMC(counter) + 0x4); in ddr_perf_clear_counter()
375 writel(0, pmu->base + PMC(counter)); in ddr_perf_clear_counter()
377 writel(0, pmu->base + PMC(counter)); in ddr_perf_clear_counter()
387 val = readl_relaxed(pmu->base + PMC(counter)); in ddr_perf_read_counter()
393 val_upper = readl_relaxed(pmu->base + PMC(counter) + 0x4); in ddr_perf_read_counter()
394 val_lower = readl_relaxed(pmu->base + PMC(counter)); in ddr_perf_read_counter()
395 } while (val_upper != readl_relaxed(pmu->base + PMC(counter) + 0x4)); in ddr_perf_read_counter()
/linux/arch/powerpc/boot/dts/
H A Dxpedite5200_xmon.dts17 form-factor = "PMC/XMC";
108 * 6: PMC monarch indicator
109 * 7: PMC EREADY
445 /* PMC interface */
H A Dmvme5100.dts130 /* IDSEL 16 - PMC Slot 1 */
136 /* IDSEL 17 - PMC Slot 2 */
H A Dxpedite5200.dts104 * 6: PMC monarch indicator
105 * 7: PMC EREADY
442 /* PMC interface */
H A Dxpedite5301.dts6 * XPedite5301 PMC/XMC module based on MPC8572E
15 form-factor = "PMC/XMC";
601 /* PCI Express controller 1, wired to PEX8112 for PMC interface */
/linux/drivers/net/can/esd/
H A DKconfig9 M.2 PCIe, CPCIserial, PMC, XMC (see https://esd.eu/en)
/linux/arch/sparc/include/asm/
H A Dns87303.h20 #define PMC 0x06 macro
/linux/Documentation/ABI/testing/
H A Dsysfs-platform-intel-pmc13 Display global reset setting bits for PMC.
/linux/drivers/platform/mellanox/
H A DKconfig104 Say y here to enable PMC support. The PMC driver provides access
/linux/drivers/pinctrl/renesas/
H A Dpinctrl-rzg2l.c136 #define PMC(off) (0x0200 + (off)) macro
548 reg = readb(pctrl->base + PMC(off)); in rzg2l_pinctrl_set_pfc_mode()
563 reg = readb(pctrl->base + PMC(off)); in rzg2l_pinctrl_set_pfc_mode()
564 writeb(reg & ~BIT(pin), pctrl->base + PMC(off)); in rzg2l_pinctrl_set_pfc_mode()
571 reg = readb(pctrl->base + PMC(off)); in rzg2l_pinctrl_set_pfc_mode()
572 writeb(reg | BIT(pin), pctrl->base + PMC(off)); in rzg2l_pinctrl_set_pfc_mode()
1718 reg8 = readb(pctrl->base + PMC(off)); in rzg2l_gpio_request()
1720 pctrl->data->pmc_writeb(pctrl, reg8, PMC(off)); in rzg2l_gpio_request()
1756 if (!(readb(pctrl->base + PMC(off)) & BIT(bit))) { in rzg2l_gpio_get_direction()
2570 reg8 = readb(pctrl->base + PMC(off)); in rzg2l_gpio_interrupt_input_mode()
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/linux/drivers/scsi/smartpqi/
H A DKconfig7 # Copyright (c) 2016 PMC-Sierra, Inc.
/linux/Documentation/arch/powerpc/
H A Dpmu-ebb.rst83 EBB events must specify the PMC they are to be counted on. This ensures
84 userspace is able to reliably determine which PMC the event is scheduled on.
/linux/drivers/net/can/sja1000/
H A DKconfig80 - esd CAN-PCI/PMC/266
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl-b1x5pv2.dtsi55 regulator-name = "5V PMC";

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