1fa082a7cSKate Hsuan# SPDX-License-Identifier: GPL-2.0 2fa082a7cSKate Hsuan# 3fa082a7cSKate Hsuan# Intel x86 Platform-Specific Drivers 4fa082a7cSKate Hsuan# 5fa082a7cSKate Hsuan 6fa082a7cSKate Hsuanconfig INTEL_PMC_CORE 7fa082a7cSKate Hsuan tristate "Intel PMC Core driver" 8fa082a7cSKate Hsuan depends on PCI 9fa082a7cSKate Hsuan depends on ACPI 10104f7494SDavid E. Box depends on INTEL_PMT_TELEMETRY 11*b5d46539SXi Pardee select INTEL_PMC_SSRAM_TELEMETRY 12fa082a7cSKate Hsuan help 13fa082a7cSKate Hsuan The Intel Platform Controller Hub for Intel Core SoCs provides access 14fa082a7cSKate Hsuan to Power Management Controller registers via various interfaces. This 15fa082a7cSKate Hsuan driver can utilize debugging capabilities and supported features as 16fa082a7cSKate Hsuan exposed by the Power Management Controller. It also may perform some 17fa082a7cSKate Hsuan tasks in the PMC in order to enable transition into the SLPS0 state. 18fa082a7cSKate Hsuan It should be selected on all Intel platforms supported by the driver. 19fa082a7cSKate Hsuan 20fa082a7cSKate Hsuan Supported features: 21fa082a7cSKate Hsuan - SLP_S0_RESIDENCY counter 22fa082a7cSKate Hsuan - PCH IP Power Gating status 23fa082a7cSKate Hsuan - LTR Ignore / LTR Show 24fa082a7cSKate Hsuan - MPHY/PLL gating status (Sunrisepoint PCH only) 25fa082a7cSKate Hsuan - SLPS0 Debug registers (Cannonlake/Icelake PCH) 26fa082a7cSKate Hsuan - Low Power Mode registers (Tigerlake and beyond) 27fa082a7cSKate Hsuan - PMC quirks as needed to enable SLPS0/S0ix 28*b5d46539SXi Pardee 29*b5d46539SXi Pardeeconfig INTEL_PMC_SSRAM_TELEMETRY 30*b5d46539SXi Pardee tristate 31