1# SPDX-License-Identifier: GPL-2.0 2# 3# Intel x86 Platform-Specific Drivers 4# 5 6config INTEL_PMC_CORE 7 tristate "Intel PMC Core driver" 8 depends on PCI 9 depends on ACPI 10 depends on INTEL_PMT_TELEMETRY 11 select INTEL_PMC_SSRAM_TELEMETRY 12 select INTEL_PMC_PWRM_TELEMETRY 13 help 14 The Intel Platform Controller Hub for Intel Core SoCs provides access 15 to Power Management Controller registers via various interfaces. This 16 driver can utilize debugging capabilities and supported features as 17 exposed by the Power Management Controller. It also may perform some 18 tasks in the PMC in order to enable transition into the SLPS0 state. 19 It should be selected on all Intel platforms supported by the driver. 20 21 Supported features: 22 - SLP_S0_RESIDENCY counter 23 - PCH IP Power Gating status 24 - LTR Ignore / LTR Show 25 - MPHY/PLL gating status (Sunrisepoint PCH only) 26 - SLPS0 Debug registers (Cannonlake/Icelake PCH) 27 - Low Power Mode registers (Tigerlake and beyond) 28 - PMC quirks as needed to enable SLPS0/S0ix 29 30config INTEL_PMC_SSRAM_TELEMETRY 31 tristate 32 help 33 This driver discovers PMC SSRAM telemetry regions through the PMC's 34 MMIO interface (PCI) or ACPI _DSD properties and registers them with 35 the Intel VSEC framework as Intel PMT telemetry devices. 36 37 It probes the PMC SSRAM device, extracts DVSEC information from MMIO, 38 reads device IDs and base addresses for multiple PMCs (main, IOE, PCH), 39 and exposes the discovered telemetry through Intel PMT interfaces 40 (including sysfs). 41 42 This option is selected by INTEL_PMC_CORE. 43 44config INTEL_PMC_PWRM_TELEMETRY 45 tristate 46 help 47 This driver discovers PMC PWRM telemetry regions described in ACPI 48 _DSD and registers them with the Intel VSEC framework as Intel PMT 49 telemetry devices. 50 51 It validates the ACPI discovery data and publishes the discovered 52 regions so they can be accessed through the Intel PMT telemetry 53 interfaces (including sysfs). 54 55 This option is selected by INTEL_PMC_CORE. 56