Searched refs:HSP (Results 1 – 5 of 5) sorted by relevance
18 tristate "EIC7700 HSP Clock Driver"26 HSP. The clock controller generates and supplies clocks to high28 Say yes here to support the clock controller on the EIC7700 HSP.
159 if ((pTiming->HSP > 0) && (pTiming->VSP < 0)) { /* +hsync -vsync */ in SetupVTG()161 } else if ((pTiming->HSP < 0) && (pTiming->VSP > 0)) { /* -hsync +vsync */ in SetupVTG()163 } else if ((pTiming->HSP < 0) && (pTiming->VSP < 0)) { /* -hsync -vsync */ in SetupVTG()165 } else if ((pTiming->HSP > 0) && (pTiming->VSP > 0)) { /* +hsync -vsync */ in SetupVTG()
23 s32 HSP; /* Hor Sync Polarity */ member
87 tristate "EIC7700 HSP Reset controller"91 This enables the HSP reset controller driver for ESWIN SoCs. This
233 bool "Tegra HSP (Hardware Synchronization Primitives) Driver"236 The Tegra HSP driver is used for the interprocessor communication