1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 230058677SRob Herringmenuconfig MAILBOX 330058677SRob Herring bool "Mailbox Hardware Support" 430058677SRob Herring help 530058677SRob Herring Mailbox is a framework to control hardware communication between 630058677SRob Herring on-chip processors through queued messages and interrupt driven 730058677SRob Herring signals. Say Y if your platform supports hardware mailboxes. 830058677SRob Herring 930058677SRob Herringif MAILBOX 10ee23d66aSJassi Brar 11ee23d66aSJassi Brarconfig ARM_MHU 12ee23d66aSJassi Brar tristate "ARM MHU Mailbox" 13ee23d66aSJassi Brar depends on ARM_AMBA 14ee23d66aSJassi Brar help 15ee23d66aSJassi Brar Say Y here if you want to build the ARM MHU controller driver. 16ee23d66aSJassi Brar The controller has 3 mailbox channels, the last of which can be 17ee23d66aSJassi Brar used in Secure mode only. 18ee23d66aSJassi Brar 195a6338ccSViresh Kumarconfig ARM_MHU_V2 205a6338ccSViresh Kumar tristate "ARM MHUv2 Mailbox" 215a6338ccSViresh Kumar depends on ARM_AMBA 225a6338ccSViresh Kumar help 235a6338ccSViresh Kumar Say Y here if you want to build the ARM MHUv2 controller driver, 245a6338ccSViresh Kumar which provides unidirectional mailboxes between processing elements. 255a6338ccSViresh Kumar 26ca1a8680SCristian Marussiconfig ARM_MHU_V3 27ca1a8680SCristian Marussi tristate "ARM MHUv3 Mailbox" 280e4ed482SGeert Uytterhoeven depends on ARM64 || COMPILE_TEST 29ca1a8680SCristian Marussi depends on HAS_IOMEM || COMPILE_TEST 30ca1a8680SCristian Marussi depends on OF 31ca1a8680SCristian Marussi help 32ca1a8680SCristian Marussi Say Y here if you want to build the ARM MHUv3 controller driver, 33ca1a8680SCristian Marussi which provides unidirectional mailboxes between processing elements. 34ca1a8680SCristian Marussi 35ca1a8680SCristian Marussi ARM MHUv3 controllers can implement a varying number of extensions 36ca1a8680SCristian Marussi that provides different means of transports: supported extensions 37ca1a8680SCristian Marussi will be discovered and possibly managed at probe-time. 38ca1a8680SCristian Marussi 39*ae524eb7SJammy Huangconfig AST2700_MBOX 40*ae524eb7SJammy Huang tristate "ASPEED AST2700 IPC driver" 41*ae524eb7SJammy Huang depends on ARCH_ASPEED || COMPILE_TEST 42*ae524eb7SJammy Huang help 43*ae524eb7SJammy Huang Mailbox driver implementation for ASPEED AST27XX SoCs. This driver 44*ae524eb7SJammy Huang can be used to send message between different processors in SoC. 45*ae524eb7SJammy Huang The driver provides mailbox support for sending interrupts to the 46*ae524eb7SJammy Huang clients. Say Y here if you want to build this driver. 47*ae524eb7SJammy Huang 48529015a0SYuntao Daiconfig CV1800_MBOX 49529015a0SYuntao Dai tristate "cv1800 mailbox" 50529015a0SYuntao Dai depends on ARCH_SOPHGO || COMPILE_TEST 51529015a0SYuntao Dai help 52529015a0SYuntao Dai Mailbox driver implementation for Sophgo CV18XX SoCs. This driver 53529015a0SYuntao Dai can be used to send message between different processors in SoC. Any 54529015a0SYuntao Dai processer can write data in a channel, and set co-responding register 55529015a0SYuntao Dai to raise interrupt to notice another processor, and it is allowed to 56529015a0SYuntao Dai send data to itself. 57529015a0SYuntao Dai 58fbf7e5ceSTudor Ambarusconfig EXYNOS_MBOX 59fbf7e5ceSTudor Ambarus tristate "Exynos Mailbox" 60fbf7e5ceSTudor Ambarus depends on ARCH_EXYNOS || COMPILE_TEST 61fbf7e5ceSTudor Ambarus help 62fbf7e5ceSTudor Ambarus Say Y here if you want to build the Samsung Exynos Mailbox controller 63fbf7e5ceSTudor Ambarus driver. The controller has 16 flag bits for hardware interrupt 64fbf7e5ceSTudor Ambarus generation and a shared register for passing mailbox messages. 65fbf7e5ceSTudor Ambarus When the controller is used by the ACPM interface the shared register 66fbf7e5ceSTudor Ambarus is ignored and the mailbox controller acts as a doorbell that raises 67fbf7e5ceSTudor Ambarus the interrupt to the ACPM firmware. 68fbf7e5ceSTudor Ambarus 692bb70056SOleksij Rempelconfig IMX_MBOX 702bb70056SOleksij Rempel tristate "i.MX Mailbox" 712bb70056SOleksij Rempel depends on ARCH_MXC || COMPILE_TEST 722bb70056SOleksij Rempel help 732bb70056SOleksij Rempel Mailbox implementation for i.MX Messaging Unit (MU). 742bb70056SOleksij Rempel 75ad3a212cSNeil Armstrongconfig PLATFORM_MHU 76ad3a212cSNeil Armstrong tristate "Platform MHU Mailbox" 77ad3a212cSNeil Armstrong depends on OF 78ad3a212cSNeil Armstrong depends on HAS_IOMEM 79ad3a212cSNeil Armstrong help 80ad3a212cSNeil Armstrong Say Y here if you want to build a platform specific variant MHU 81ad3a212cSNeil Armstrong controller driver. 82ad3a212cSNeil Armstrong The controller has a maximum of 3 mailbox channels, the last of 83ad3a212cSNeil Armstrong which can be used in Secure mode only. 84ad3a212cSNeil Armstrong 8530058677SRob Herringconfig PL320_MBOX 8630058677SRob Herring bool "ARM PL320 Mailbox" 8730058677SRob Herring depends on ARM_AMBA 8830058677SRob Herring help 8930058677SRob Herring An implementation of the ARM PL320 Interprocessor Communication 9030058677SRob Herring Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to 9130058677SRob Herring send short messages between Highbank's A9 cores and the EnergyCore 9230058677SRob Herring Management Engine, primarily for cpufreq. Say Y here if you want 9330058677SRob Herring to use the PL320 IPCM support. 9430058677SRob Herring 958fbbfd96SMarek Behunconfig ARMADA_37XX_RWTM_MBOX 968fbbfd96SMarek Behun tristate "Armada 37xx rWTM BIU Mailbox" 978fbbfd96SMarek Behun depends on ARCH_MVEBU || COMPILE_TEST 988fbbfd96SMarek Behun depends on OF 998fbbfd96SMarek Behun help 1008fbbfd96SMarek Behun Mailbox implementation for communication with the the firmware 1018fbbfd96SMarek Behun running on the Cortex-M3 rWTM secure processor of the Armada 37xx 1028fbbfd96SMarek Behun SOC. Say Y here if you are building for such a device (for example 1038fbbfd96SMarek Behun the Turris Mox router). 1048fbbfd96SMarek Behun 105c869c75cSSuman Annaconfig OMAP2PLUS_MBOX 106c869c75cSSuman Anna tristate "OMAP2+ Mailbox framework support" 10754595f28SArnd Bergmann depends on ARCH_OMAP2PLUS || ARCH_K3 || COMPILE_TEST 108c869c75cSSuman Anna help 109c869c75cSSuman Anna Mailbox implementation for OMAP family chips with hardware for 110c869c75cSSuman Anna interprocessor communication involving DSP, IVA1.0 and IVA2 in 111c869c75cSSuman Anna OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you 112c869c75cSSuman Anna want to use OMAP2+ Mailbox framework support. 113c869c75cSSuman Anna 114f70ed3b5SCaesar Wangconfig ROCKCHIP_MBOX 1159d2e8b93STom Saeger bool "Rockchip Soc Integrated Mailbox Support" 116f70ed3b5SCaesar Wang depends on ARCH_ROCKCHIP || COMPILE_TEST 117f70ed3b5SCaesar Wang help 118f70ed3b5SCaesar Wang This driver provides support for inter-processor communication 119f70ed3b5SCaesar Wang between CPU cores and MCU processor on Some Rockchip SOCs. 120f70ed3b5SCaesar Wang Please check it that the Soc you use have Mailbox hardware. 121f70ed3b5SCaesar Wang Say Y here if you want to use the Rockchip Mailbox support. 122f70ed3b5SCaesar Wang 12386c22f8cSAshwin Chauguleconfig PCC 12486c22f8cSAshwin Chaugule bool "Platform Communication Channel Driver" 12586c22f8cSAshwin Chaugule depends on ACPI 126b6fc6072SAshwin Chaugule default n 12786c22f8cSAshwin Chaugule help 12886c22f8cSAshwin Chaugule ACPI 5.0+ spec defines a generic mode of communication 12986c22f8cSAshwin Chaugule between the OS and a platform such as the BMC. This medium 13086c22f8cSAshwin Chaugule (PCC) is typically used by CPPC (ACPI CPU Performance management), 13186c22f8cSAshwin Chaugule RAS (ACPI reliability protocol) and MPST (ACPI Memory power 13286c22f8cSAshwin Chaugule states). Select this driver if your platform implements the 13386c22f8cSAshwin Chaugule PCC clients mentioned above. 13486c22f8cSAshwin Chaugule 135f62092f6SLey Foon Tanconfig ALTERA_MBOX 136f62092f6SLey Foon Tan tristate "Altera Mailbox" 13759dd3f02SRichard Weinberger depends on HAS_IOMEM 138f62092f6SLey Foon Tan help 139f62092f6SLey Foon Tan An implementation of the Altera Mailbox soft core. It is used 140f62092f6SLey Foon Tan to send message between processors. Say Y here if you want to use the 141f62092f6SLey Foon Tan Altera mailbox support. 1420bae6af6SLubomir Rintel 1430bae6af6SLubomir Rintelconfig BCM2835_MBOX 1440bae6af6SLubomir Rintel tristate "BCM2835 Mailbox" 1450bae6af6SLubomir Rintel depends on ARCH_BCM2835 1460bae6af6SLubomir Rintel help 1470bae6af6SLubomir Rintel An implementation of the BCM2385 Mailbox. It is used to invoke 1480bae6af6SLubomir Rintel the services of the Videocore. Say Y here if you want to use the 1490bae6af6SLubomir Rintel BCM2835 Mailbox. 1500bae6af6SLubomir Rintel 1519ef4546cSLee Jonesconfig STI_MBOX 1529ef4546cSLee Jones tristate "STI Mailbox framework support" 1539ef4546cSLee Jones depends on ARCH_STI && OF 1549ef4546cSLee Jones help 1559ef4546cSLee Jones Mailbox implementation for STMicroelectonics family chips with 1569ef4546cSLee Jones hardware for interprocessor communication. 1579ef4546cSLee Jones 158aace66b1SNishanth Menonconfig TI_MESSAGE_MANAGER 159aace66b1SNishanth Menon tristate "Texas Instruments Message Manager Driver" 160ff391d45SAndrew Davis depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST 16131c8d06eSNicolas Frayer default ARCH_K3 162aace66b1SNishanth Menon help 163aace66b1SNishanth Menon An implementation of Message Manager slave driver for Keystone 164cfc0f7a8SNishanth Menon and K3 architecture SoCs from Texas Instruments. Message Manager 165cfc0f7a8SNishanth Menon is a communication entity found on few of Texas Instrument's keystone 166cfc0f7a8SNishanth Menon and K3 architecture SoCs. These may be used for communication between 167aace66b1SNishanth Menon multiple processors within the SoC. Select this driver if your 168aace66b1SNishanth Menon platform has support for the hardware block. 169aace66b1SNishanth Menon 17041c0e939SKaihua Zhongconfig HI3660_MBOX 171f83d1cfcSDaniel Lezcano tristate "Hi3660 Mailbox" if EXPERT 172f83d1cfcSDaniel Lezcano depends on (ARCH_HISI || COMPILE_TEST) 173f83d1cfcSDaniel Lezcano depends on OF 174f83d1cfcSDaniel Lezcano default ARCH_HISI 17541c0e939SKaihua Zhong help 17641c0e939SKaihua Zhong An implementation of the hi3660 mailbox. It is used to send message 17741c0e939SKaihua Zhong between application processors and other processors/MCU/DSP. Select 17841c0e939SKaihua Zhong Y here if you want to use Hi3660 mailbox controller. 17941c0e939SKaihua Zhong 1809c384189SLeo Yanconfig HI6220_MBOX 181f83d1cfcSDaniel Lezcano tristate "Hi6220 Mailbox" if EXPERT 182f83d1cfcSDaniel Lezcano depends on (ARCH_HISI || COMPILE_TEST) 183f83d1cfcSDaniel Lezcano depends on OF 184f83d1cfcSDaniel Lezcano default ARCH_HISI 1859c384189SLeo Yan help 1869c384189SLeo Yan An implementation of the hi6220 mailbox. It is used to send message 1879c384189SLeo Yan between application processors and MCU. Say Y here if you want to 1889c384189SLeo Yan build Hi6220 mailbox controller driver. 1899c384189SLeo Yan 1908ea4484dSLee Jonesconfig MAILBOX_TEST 1918ea4484dSLee Jones tristate "Mailbox Test Client" 1928ea4484dSLee Jones depends on OF 19365d3b04aSRichard Weinberger depends on HAS_IOMEM 1948ea4484dSLee Jones help 1958ea4484dSLee Jones Test client to help with testing new Controller driver 1968ea4484dSLee Jones implementations. 1978ea4484dSLee Jones 19883d7b156SConor Dooleyconfig POLARFIRE_SOC_MAILBOX 19983d7b156SConor Dooley tristate "PolarFire SoC (MPFS) Mailbox" 20083d7b156SConor Dooley depends on HAS_IOMEM 201a4123ffaSConor Dooley depends on MFD_SYSCON 2025f84a056SConor Dooley depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST 20383d7b156SConor Dooley help 20483d7b156SConor Dooley This driver adds support for the PolarFire SoC (MPFS) mailbox controller. 20583d7b156SConor Dooley 20683d7b156SConor Dooley To compile this driver as a module, choose M here. the 20783d7b156SConor Dooley module will be called mailbox-mpfs. 20883d7b156SConor Dooley 20983d7b156SConor Dooley If unsure, say N. 21083d7b156SConor Dooley 211e4b1d67eSValentina Fernandezconfig MCHP_SBI_IPC_MBOX 212e4b1d67eSValentina Fernandez tristate "Microchip Inter-processor Communication (IPC) SBI driver" 213d635ba42SYue Haibing depends on RISCV_SBI 214d635ba42SYue Haibing depends on ARCH_MICROCHIP || COMPILE_TEST 215e4b1d67eSValentina Fernandez help 216e4b1d67eSValentina Fernandez Mailbox implementation for Microchip devices with an 217e4b1d67eSValentina Fernandez Inter-process communication (IPC) controller. 218e4b1d67eSValentina Fernandez 219e4b1d67eSValentina Fernandez To compile this driver as a module, choose M here. the 220e4b1d67eSValentina Fernandez module will be called mailbox-mchp-ipc-sbi. 221e4b1d67eSValentina Fernandez 222e4b1d67eSValentina Fernandez If unsure, say N. 223e4b1d67eSValentina Fernandez 22425bfee16SBjorn Anderssonconfig QCOM_APCS_IPC 22525bfee16SBjorn Andersson tristate "Qualcomm APCS IPC driver" 22625bfee16SBjorn Andersson depends on ARCH_QCOM || COMPILE_TEST 22725bfee16SBjorn Andersson help 22825bfee16SBjorn Andersson Say y here to enable support for the APCS IPC mailbox driver, 22925bfee16SBjorn Andersson providing an interface for invoking the inter-process communication 23025bfee16SBjorn Andersson signals from the application processor to other masters. 23125bfee16SBjorn Andersson 2320fe88461SThierry Redingconfig TEGRA_HSP_MBOX 2330fe88461SThierry Reding bool "Tegra HSP (Hardware Synchronization Primitives) Driver" 23485bd2de4SArnd Bergmann depends on ARCH_TEGRA 2350fe88461SThierry Reding help 2360fe88461SThierry Reding The Tegra HSP driver is used for the interprocessor communication 2370fe88461SThierry Reding between different remote processors and host processors on Tegra186 2380fe88461SThierry Reding and later SoCs. Say Y here if you want to have this support. 2390fe88461SThierry Reding If unsure say N. 2400fe88461SThierry Reding 241f700e84fSDuc Dangconfig XGENE_SLIMPRO_MBOX 242f700e84fSDuc Dang tristate "APM SoC X-Gene SLIMpro Mailbox Controller" 243f700e84fSDuc Dang depends on ARCH_XGENE 244f700e84fSDuc Dang help 245f700e84fSDuc Dang An implementation of the APM X-Gene Interprocessor Communication 246f700e84fSDuc Dang Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller. 247f700e84fSDuc Dang It is used to send short messages between ARM64-bit cores and 248f700e84fSDuc Dang the SLIMpro Management Engine, primarily for PM. Say Y here if you 249f700e84fSDuc Dang want to use the APM X-Gene SLIMpro IPCM support. 250a24532f8SRob Rice 251a24532f8SRob Riceconfig BCM_PDC_MBOX 252fc2041c5SSteve Lin tristate "Broadcom FlexSparx DMA Mailbox" 253fc2041c5SSteve Lin depends on ARCH_BCM_IPROC || COMPILE_TEST 254a24532f8SRob Rice help 255fc2041c5SSteve Lin Mailbox implementation for the Broadcom FlexSparx DMA ring manager, 256a24532f8SRob Rice which provides access to various offload engines on Broadcom 257fc2041c5SSteve Lin SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2. 258dbc049eeSAnup Patel 259dbc049eeSAnup Patelconfig BCM_FLEXRM_MBOX 260dbc049eeSAnup Patel tristate "Broadcom FlexRM Mailbox" 26173874913SAnup Patel depends on ARM64 2628f82121dSScott Branden depends on ARCH_BCM_IPROC || COMPILE_TEST 26313e7accbSThomas Gleixner select GENERIC_MSI_IRQ 26422d28b0fSAnup Patel default m if ARCH_BCM_IPROC 265dbc049eeSAnup Patel help 266dbc049eeSAnup Patel Mailbox implementation of the Broadcom FlexRM ring manager, 267dbc049eeSAnup Patel which provides access to various offload engines on Broadcom 268dbc049eeSAnup Patel SoCs. Say Y here if you want to use the Broadcom FlexRM. 269ffbded7dSFabien Dessenne 270ffbded7dSFabien Dessenneconfig STM32_IPCC 271ffbded7dSFabien Dessenne tristate "STM32 IPCC Mailbox" 272d68f1729SMartin Kaiser depends on MACH_STM32MP157 || COMPILE_TEST 273ffbded7dSFabien Dessenne help 274ffbded7dSFabien Dessenne Mailbox implementation for STMicroelectonics STM32 family chips 275ffbded7dSFabien Dessenne with hardware for Inter-Processor Communication Controller (IPCC) 276ffbded7dSFabien Dessenne between processors. Say Y here if you want to have this support. 277623a6143SHoulong Wei 278af2dfa96SAllen-KH Chengconfig MTK_ADSP_MBOX 279af2dfa96SAllen-KH Cheng tristate "MediaTek ADSP Mailbox Controller" 280af2dfa96SAllen-KH Cheng depends on ARCH_MEDIATEK || COMPILE_TEST 281af2dfa96SAllen-KH Cheng help 282af2dfa96SAllen-KH Cheng Say yes here to add support for "MediaTek ADSP Mailbox Controller. 283af2dfa96SAllen-KH Cheng This mailbox driver is used to send notification or short message 284af2dfa96SAllen-KH Cheng between processors with ADSP. It will place the message to share 285af2dfa96SAllen-KH Cheng buffer and will access the ipc control. 286af2dfa96SAllen-KH Cheng 287623a6143SHoulong Weiconfig MTK_CMDQ_MBOX 288623a6143SHoulong Wei tristate "MediaTek CMDQ Mailbox Support" 289623a6143SHoulong Wei depends on ARCH_MEDIATEK || COMPILE_TEST 290623a6143SHoulong Wei select MTK_INFRACFG 291623a6143SHoulong Wei help 292623a6143SHoulong Wei Say yes here to add support for the MediaTek Command Queue (CMDQ) 293623a6143SHoulong Wei mailbox driver. The CMDQ is used to help read/write registers with 294623a6143SHoulong Wei critical time limitation, such as updating display configuration 295623a6143SHoulong Wei during the vblank. 2964981b82bSWendy Liang 2974981b82bSWendy Liangconfig ZYNQMP_IPI_MBOX 2984f2fe396SNick Alcock tristate "Xilinx ZynqMP IPI Mailbox" 2994981b82bSWendy Liang depends on ARCH_ZYNQMP && OF 3004981b82bSWendy Liang help 3014981b82bSWendy Liang Say yes here to add support for Xilinx IPI mailbox driver. 3024981b82bSWendy Liang This mailbox driver is used to send notification or short message 3034981b82bSWendy Liang between processors with Xilinx ZynqMP IPI. It will place the 3044981b82bSWendy Liang message to the IPI buffer and will access the IPI control 3054981b82bSWendy Liang registers to kick the other processor or enquire status. 3064981b82bSWendy Liang 30725831c44SSamuel Hollandconfig SUN6I_MSGBOX 30825831c44SSamuel Holland tristate "Allwinner sun6i/sun8i/sun9i/sun50i Message Box" 30925831c44SSamuel Holland depends on ARCH_SUNXI || COMPILE_TEST 31025831c44SSamuel Holland default ARCH_SUNXI 31125831c44SSamuel Holland help 31225831c44SSamuel Holland Mailbox implementation for the hardware message box present in 31325831c44SSamuel Holland various Allwinner SoCs. This mailbox is used for communication 31425831c44SSamuel Holland between the application CPUs and the power management coprocessor. 31525831c44SSamuel Holland 316ca27fc26SBaolin Wangconfig SPRD_MBOX 317ca27fc26SBaolin Wang tristate "Spreadtrum Mailbox" 318ca27fc26SBaolin Wang depends on ARCH_SPRD || COMPILE_TEST 319ca27fc26SBaolin Wang help 320ca27fc26SBaolin Wang Mailbox driver implementation for the Spreadtrum platform. It is used 321ca27fc26SBaolin Wang to send message between application processors and MCU. Say Y here if 322ca27fc26SBaolin Wang you want to build the Spreatrum mailbox controller driver. 323ca27fc26SBaolin Wang 3240e2a9a03SSibi Sankarconfig QCOM_CPUCP_MBOX 3250e2a9a03SSibi Sankar tristate "Qualcomm Technologies, Inc. CPUCP mailbox driver" 326cbf50095SArnd Bergmann depends on (ARCH_QCOM || COMPILE_TEST) && 64BIT 3270e2a9a03SSibi Sankar help 3280e2a9a03SSibi Sankar Qualcomm Technologies, Inc. CPUSS Control Processor (CPUCP) mailbox 3290e2a9a03SSibi Sankar controller driver enables communication between AP and CPUCP. Say 3300e2a9a03SSibi Sankar Y here if you want to build this driver. 3310e2a9a03SSibi Sankar 332fa74a025SManivannan Sadhasivamconfig QCOM_IPCC 3338d7e5908SAmit Pundir tristate "Qualcomm Technologies, Inc. IPCC driver" 334fa74a025SManivannan Sadhasivam depends on ARCH_QCOM || COMPILE_TEST 335fa74a025SManivannan Sadhasivam help 336fa74a025SManivannan Sadhasivam Qualcomm Technologies, Inc. Inter-Processor Communication Controller 337fa74a025SManivannan Sadhasivam (IPCC) driver for MSM devices. The driver provides mailbox support for 338fa74a025SManivannan Sadhasivam sending interrupts to the clients. On the other hand, the driver also 339fa74a025SManivannan Sadhasivam acts as an interrupt controller for receiving interrupts from clients. 340fa74a025SManivannan Sadhasivam Say Y here if you want to build this driver. 341fa74a025SManivannan Sadhasivam 3425d4d263eSMichal Wilczynskiconfig THEAD_TH1520_MBOX 3435d4d263eSMichal Wilczynski tristate "T-head TH1520 Mailbox" 3445d4d263eSMichal Wilczynski depends on ARCH_THEAD || COMPILE_TEST 3455d4d263eSMichal Wilczynski help 3465d4d263eSMichal Wilczynski Mailbox driver implementation for the Thead TH-1520 platform. Enables 3475d4d263eSMichal Wilczynski two cores within the SoC to communicate and coordinate by passing 3485d4d263eSMichal Wilczynski messages. Could be used to communicate between E910 core, on which the 3495d4d263eSMichal Wilczynski kernel is running, and E902 core used for power management among other 3505d4d263eSMichal Wilczynski things. 3515d4d263eSMichal Wilczynski 352fe2aa236SGuomin Chenconfig CIX_MBOX 353fe2aa236SGuomin Chen tristate "CIX Mailbox" 354fe2aa236SGuomin Chen depends on ARCH_CIX || COMPILE_TEST 355fe2aa236SGuomin Chen depends on OF 356fe2aa236SGuomin Chen help 357fe2aa236SGuomin Chen Mailbox implementation for CIX IPC system. The controller supports 358fe2aa236SGuomin Chen 11 mailbox channels with different operating mode and every channel 359fe2aa236SGuomin Chen is unidirectional. Say Y here if you want to use the CIX Mailbox 360fe2aa236SGuomin Chen support. 361fe2aa236SGuomin Chen 36252436007SJustin Chenconfig BCM74110_MAILBOX 36352436007SJustin Chen tristate "Brcmstb BCM74110 Mailbox" 36452436007SJustin Chen depends on ARCH_BRCMSTB || COMPILE_TEST 36552436007SJustin Chen default ARCH_BRCMSTB 36652436007SJustin Chen help 36752436007SJustin Chen Broadcom STB mailbox driver present starting with brcmstb bcm74110 36852436007SJustin Chen SoCs. The mailbox is a communication channel between the host 36952436007SJustin Chen processor and coprocessor that handles various power management task 37052436007SJustin Chen and more. 37152436007SJustin Chen 37230058677SRob Herringendif 373