/linux/drivers/clk/renesas/ |
H A D | r8a7795-cpg-mssr.c | 132 DEF_MOD("3dge", 112, R8A7795_CLK_ZG), 133 DEF_MOD("fdp1-1", 118, R8A7795_CLK_S0D1), 134 DEF_MOD("fdp1-0", 119, R8A7795_CLK_S0D1), 135 DEF_MOD("tmu4", 121, R8A7795_CLK_S0D6), 136 DEF_MOD("tmu3", 122, R8A7795_CLK_S3D2), 137 DEF_MOD("tmu2", 123, R8A7795_CLK_S3D2), 138 DEF_MOD("tmu1", 124, R8A7795_CLK_S3D2), 139 DEF_MOD("tmu0", 125, R8A7795_CLK_CP), 140 DEF_MOD("scif5", 202, R8A7795_CLK_S3D4), 141 DEF_MOD("scif4", 203, R8A7795_CLK_S3D4), [all …]
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H A D | r8a7742-cpg-mssr.c | 83 DEF_MOD("msiof0", 0, R8A7742_CLK_MP), 84 DEF_MOD("vcp1", 100, R8A7742_CLK_ZS), 85 DEF_MOD("vcp0", 101, R8A7742_CLK_ZS), 86 DEF_MOD("vpc1", 102, R8A7742_CLK_ZS), 87 DEF_MOD("vpc0", 103, R8A7742_CLK_ZS), 88 DEF_MOD("tmu1", 111, R8A7742_CLK_P), 89 DEF_MOD("3dg", 112, R8A7742_CLK_ZG), 90 DEF_MOD("2d-dmac", 115, R8A7742_CLK_ZS), 91 DEF_MOD("fdp1-2", 117, R8A7742_CLK_ZS), 92 DEF_MOD("fdp1-1", 118, R8A7742_CLK_ZS), [all …]
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H A D | r8a7796-cpg-mssr.c | 134 DEF_MOD("3dge", 112, R8A7796_CLK_ZG), 135 DEF_MOD("fdp1-0", 119, R8A7796_CLK_S0D1), 136 DEF_MOD("tmu4", 121, R8A7796_CLK_S0D6), 137 DEF_MOD("tmu3", 122, R8A7796_CLK_S3D2), 138 DEF_MOD("tmu2", 123, R8A7796_CLK_S3D2), 139 DEF_MOD("tmu1", 124, R8A7796_CLK_S3D2), 140 DEF_MOD("tmu0", 125, R8A7796_CLK_CP), 141 DEF_MOD("scif5", 202, R8A7796_CLK_S3D4), 142 DEF_MOD("scif4", 203, R8A7796_CLK_S3D4), 143 DEF_MOD("scif3", 204, R8A7796_CLK_S3D4), [all …]
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H A D | r8a77965-cpg-mssr.c | 129 DEF_MOD("3dge", 112, R8A77965_CLK_ZG), 130 DEF_MOD("fdp1-0", 119, R8A77965_CLK_S0D1), 131 DEF_MOD("tmu4", 121, R8A77965_CLK_S0D6), 132 DEF_MOD("tmu3", 122, R8A77965_CLK_S3D2), 133 DEF_MOD("tmu2", 123, R8A77965_CLK_S3D2), 134 DEF_MOD("tmu1", 124, R8A77965_CLK_S3D2), 135 DEF_MOD("tmu0", 125, R8A77965_CLK_CP), 136 DEF_MOD("scif5", 202, R8A77965_CLK_S3D4), 137 DEF_MOD("scif4", 203, R8A77965_CLK_S3D4), 138 DEF_MOD("scif3", 204, R8A77965_CLK_S3D4), [all …]
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H A D | r8a7743-cpg-mssr.c | 81 DEF_MOD("msiof0", 0, R8A7743_CLK_MP), 82 DEF_MOD("vcp0", 101, R8A7743_CLK_ZS), 83 DEF_MOD("vpc0", 103, R8A7743_CLK_ZS), 84 DEF_MOD("tmu1", 111, R8A7743_CLK_P), 85 DEF_MOD("3dg", 112, R8A7743_CLK_ZG), 86 DEF_MOD("2d-dmac", 115, R8A7743_CLK_ZS), 87 DEF_MOD("fdp1-1", 118, R8A7743_CLK_ZS), 88 DEF_MOD("fdp1-0", 119, R8A7743_CLK_ZS), 89 DEF_MOD("tmu3", 121, R8A7743_CLK_P), 90 DEF_MOD("tmu2", 122, R8A7743_CLK_P), [all …]
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H A D | r8a7791-cpg-mssr.c | 89 DEF_MOD("msiof0", 0, R8A7791_CLK_MP), 90 DEF_MOD("vcp0", 101, R8A7791_CLK_ZS), 91 DEF_MOD("vpc0", 103, R8A7791_CLK_ZS), 92 DEF_MOD("jpu", 106, R8A7791_CLK_M2), 93 DEF_MOD("ssp1", 109, R8A7791_CLK_ZS), 94 DEF_MOD("tmu1", 111, R8A7791_CLK_P), 95 DEF_MOD("3dg", 112, R8A7791_CLK_ZG), 96 DEF_MOD("2d-dmac", 115, R8A7791_CLK_ZS), 97 DEF_MOD("fdp1-1", 118, R8A7791_CLK_ZS), 98 DEF_MOD("fdp1-0", 119, R8A7791_CLK_ZS), [all …]
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H A D | r8a7790-cpg-mssr.c | 92 DEF_MOD("msiof0", 0, R8A7790_CLK_MP), 93 DEF_MOD("vcp1", 100, R8A7790_CLK_ZS), 94 DEF_MOD("vcp0", 101, R8A7790_CLK_ZS), 95 DEF_MOD("vpc1", 102, R8A7790_CLK_ZS), 96 DEF_MOD("vpc0", 103, R8A7790_CLK_ZS), 97 DEF_MOD("jpu", 106, R8A7790_CLK_M2), 98 DEF_MOD("ssp1", 109, R8A7790_CLK_ZS), 99 DEF_MOD("tmu1", 111, R8A7790_CLK_P), 100 DEF_MOD("3dg", 112, R8A7790_CLK_ZG), 101 DEF_MOD("2d-dmac", 115, R8A7790_CLK_ZS), [all …]
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H A D | r8a774e1-cpg-mssr.c | 128 DEF_MOD("3dge", 112, R8A774E1_CLK_ZG), 129 DEF_MOD("fdp1-1", 118, R8A774E1_CLK_S0D1), 130 DEF_MOD("fdp1-0", 119, R8A774E1_CLK_S0D1), 131 DEF_MOD("tmu4", 121, R8A774E1_CLK_S0D6), 132 DEF_MOD("tmu3", 122, R8A774E1_CLK_S3D2), 133 DEF_MOD("tmu2", 123, R8A774E1_CLK_S3D2), 134 DEF_MOD("tmu1", 124, R8A774E1_CLK_S3D2), 135 DEF_MOD("tmu0", 125, R8A774E1_CLK_CP), 136 DEF_MOD("vcplf", 130, R8A774E1_CLK_S2D1), 137 DEF_MOD("vdpb", 131, R8A774E1_CLK_S2D1), [all …]
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H A D | r8a774a1-cpg-mssr.c | 127 DEF_MOD("3dge", 112, R8A774A1_CLK_ZG), 128 DEF_MOD("tmu4", 121, R8A774A1_CLK_S0D6), 129 DEF_MOD("tmu3", 122, R8A774A1_CLK_S3D2), 130 DEF_MOD("tmu2", 123, R8A774A1_CLK_S3D2), 131 DEF_MOD("tmu1", 124, R8A774A1_CLK_S3D2), 132 DEF_MOD("tmu0", 125, R8A774A1_CLK_CP), 133 DEF_MOD("fdp1-0", 119, R8A774A1_CLK_S0D1), 134 DEF_MOD("scif5", 202, R8A774A1_CLK_S3D4), 135 DEF_MOD("scif4", 203, R8A774A1_CLK_S3D4), 136 DEF_MOD("scif3", 204, R8A774A1_CLK_S3D4), [all …]
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H A D | r8a7745-cpg-mssr.c | 81 DEF_MOD("msiof0", 0, R8A7745_CLK_MP), 82 DEF_MOD("vcp0", 101, R8A7745_CLK_ZS), 83 DEF_MOD("vpc0", 103, R8A7745_CLK_ZS), 84 DEF_MOD("tmu1", 111, R8A7745_CLK_P), 85 DEF_MOD("3dg", 112, R8A7745_CLK_ZG), 86 DEF_MOD("2d-dmac", 115, R8A7745_CLK_ZS), 87 DEF_MOD("fdp1-0", 119, R8A7745_CLK_ZS), 88 DEF_MOD("tmu3", 121, R8A7745_CLK_P), 89 DEF_MOD("tmu2", 122, R8A7745_CLK_P), 90 DEF_MOD("cmt0", 124, R8A7745_CLK_R), [all …]
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H A D | r8a774b1-cpg-mssr.c | 124 DEF_MOD("3dge", 112, R8A774B1_CLK_ZG), 125 DEF_MOD("tmu4", 121, R8A774B1_CLK_S0D6), 126 DEF_MOD("tmu3", 122, R8A774B1_CLK_S3D2), 127 DEF_MOD("tmu2", 123, R8A774B1_CLK_S3D2), 128 DEF_MOD("tmu1", 124, R8A774B1_CLK_S3D2), 129 DEF_MOD("tmu0", 125, R8A774B1_CLK_CP), 130 DEF_MOD("fdp1-0", 119, R8A774B1_CLK_S0D1), 131 DEF_MOD("scif5", 202, R8A774B1_CLK_S3D4), 132 DEF_MOD("scif4", 203, R8A774B1_CLK_S3D4), 133 DEF_MOD("scif3", 204, R8A774B1_CLK_S3D4), [all …]
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H A D | r8a7794-cpg-mssr.c | 87 DEF_MOD("msiof0", 0, R8A7794_CLK_MP), 88 DEF_MOD("vcp0", 101, R8A7794_CLK_ZS), 89 DEF_MOD("vpc0", 103, R8A7794_CLK_ZS), 90 DEF_MOD("jpu", 106, R8A7794_CLK_M2), 91 DEF_MOD("tmu1", 111, R8A7794_CLK_P), 92 DEF_MOD("3dg", 112, R8A7794_CLK_ZG), 93 DEF_MOD("2d-dmac", 115, R8A7794_CLK_ZS), 94 DEF_MOD("fdp1-0", 119, R8A7794_CLK_ZS), 95 DEF_MOD("tmu3", 121, R8A7794_CLK_P), 96 DEF_MOD("tmu2", 122, R8A7794_CLK_P), [all …]
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H A D | r8a77990-cpg-mssr.c | 136 DEF_MOD("tmu4", 121, R8A77990_CLK_S0D6C), 137 DEF_MOD("tmu3", 122, R8A77990_CLK_S3D2C), 138 DEF_MOD("tmu2", 123, R8A77990_CLK_S3D2C), 139 DEF_MOD("tmu1", 124, R8A77990_CLK_S3D2C), 140 DEF_MOD("tmu0", 125, R8A77990_CLK_CP), 141 DEF_MOD("scif5", 202, R8A77990_CLK_S3D4C), 142 DEF_MOD("scif4", 203, R8A77990_CLK_S3D4C), 143 DEF_MOD("scif3", 204, R8A77990_CLK_S3D4C), 144 DEF_MOD("scif1", 206, R8A77990_CLK_S3D4C), 145 DEF_MOD("scif0", 207, R8A77990_CLK_S3D4C), [all …]
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H A D | r8a77470-cpg-mssr.c | 77 DEF_MOD("msiof0", 0, R8A77470_CLK_MP), 78 DEF_MOD("vcp0", 101, R8A77470_CLK_ZS), 79 DEF_MOD("vpc0", 103, R8A77470_CLK_ZS), 80 DEF_MOD("tmu1", 111, R8A77470_CLK_P), 81 DEF_MOD("3dg", 112, R8A77470_CLK_ZS), 82 DEF_MOD("2d-dmac", 115, R8A77470_CLK_ZS), 83 DEF_MOD("fdp1-0", 119, R8A77470_CLK_ZS), 84 DEF_MOD("tmu3", 121, R8A77470_CLK_P), 85 DEF_MOD("tmu2", 122, R8A77470_CLK_P), 86 DEF_MOD("cmt0", 124, R8A77470_CLK_R), [all …]
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H A D | r8a774c0-cpg-mssr.c | 135 DEF_MOD("tmu4", 121, R8A774C0_CLK_S0D6C), 136 DEF_MOD("tmu3", 122, R8A774C0_CLK_S3D2C), 137 DEF_MOD("tmu2", 123, R8A774C0_CLK_S3D2C), 138 DEF_MOD("tmu1", 124, R8A774C0_CLK_S3D2C), 139 DEF_MOD("tmu0", 125, R8A774C0_CLK_CP), 140 DEF_MOD("scif5", 202, R8A774C0_CLK_S3D4C), 141 DEF_MOD("scif4", 203, R8A774C0_CLK_S3D4C), 142 DEF_MOD("scif3", 204, R8A774C0_CLK_S3D4C), 143 DEF_MOD("scif1", 206, R8A774C0_CLK_S3D4C), 144 DEF_MOD("scif0", 207, R8A774C0_CLK_S3D4C), [all …]
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H A D | r8a779a0-cpg-mssr.c | 141 DEF_MOD("avb0", 211, R8A779A0_CLK_S3D2), 142 DEF_MOD("avb1", 212, R8A779A0_CLK_S3D2), 143 DEF_MOD("avb2", 213, R8A779A0_CLK_S3D2), 144 DEF_MOD("avb3", 214, R8A779A0_CLK_S3D2), 145 DEF_MOD("avb4", 215, R8A779A0_CLK_S3D2), 146 DEF_MOD("avb5", 216, R8A779A0_CLK_S3D2), 147 DEF_MOD("canfd0", 328, R8A779A0_CLK_S3D2), 148 DEF_MOD("csi40", 331, R8A779A0_CLK_CSI0), 149 DEF_MOD("csi41", 400, R8A779A0_CLK_CSI0), 150 DEF_MOD("csi42", 401, R8A779A0_CLK_CSI0), [all …]
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H A D | r8a77980-cpg-mssr.c | 116 DEF_MOD("tmu4", 121, R8A77980_CLK_S0D6), 117 DEF_MOD("tmu3", 122, R8A77980_CLK_S0D6), 118 DEF_MOD("tmu2", 123, R8A77980_CLK_S0D6), 119 DEF_MOD("tmu1", 124, R8A77980_CLK_S0D6), 120 DEF_MOD("tmu0", 125, R8A77980_CLK_CP), 121 DEF_MOD("scif4", 203, R8A77980_CLK_S3D4), 122 DEF_MOD("scif3", 204, R8A77980_CLK_S3D4), 123 DEF_MOD("scif1", 206, R8A77980_CLK_S3D4), 124 DEF_MOD("scif0", 207, R8A77980_CLK_S3D4), 125 DEF_MOD("msiof3", 208, R8A77980_CLK_MSO), [all …]
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H A D | r8a7792-cpg-mssr.c | 80 DEF_MOD("msiof0", 0, R8A7792_CLK_MP), 81 DEF_MOD("jpu", 106, R8A7792_CLK_M2), 82 DEF_MOD("tmu1", 111, R8A7792_CLK_P), 83 DEF_MOD("3dg", 112, R8A7792_CLK_ZG), 84 DEF_MOD("2d-dmac", 115, R8A7792_CLK_ZS), 85 DEF_MOD("tmu3", 121, R8A7792_CLK_P), 86 DEF_MOD("tmu2", 122, R8A7792_CLK_P), 87 DEF_MOD("cmt0", 124, R8A7792_CLK_R), 88 DEF_MOD("tmu0", 125, R8A7792_CLK_CP), 89 DEF_MOD("vsp1du1", 127, R8A7792_CLK_ZS), [all …]
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H A D | r8a77995-cpg-mssr.c | 122 DEF_MOD("tmu4", 121, R8A77995_CLK_S1D4C), 123 DEF_MOD("tmu3", 122, R8A77995_CLK_S3D2C), 124 DEF_MOD("tmu2", 123, R8A77995_CLK_S3D2C), 125 DEF_MOD("tmu1", 124, R8A77995_CLK_S3D2C), 126 DEF_MOD("tmu0", 125, R8A77995_CLK_CP), 127 DEF_MOD("scif5", 202, R8A77995_CLK_S3D4C), 128 DEF_MOD("scif4", 203, R8A77995_CLK_S3D4C), 129 DEF_MOD("scif3", 204, R8A77995_CLK_S3D4C), 130 DEF_MOD("scif1", 206, R8A77995_CLK_S3D4C), 131 DEF_MOD("scif0", 207, R8A77995_CLK_S3D4C), [all …]
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H A D | r8a779g0-cpg-mssr.c | 166 DEF_MOD("avb0", 211, R8A779G0_CLK_S0D4_HSC), 167 DEF_MOD("avb1", 212, R8A779G0_CLK_S0D4_HSC), 168 DEF_MOD("avb2", 213, R8A779G0_CLK_S0D4_HSC), 169 DEF_MOD("canfd0", 328, R8A779G0_CLK_SASYNCPERD2), 170 DEF_MOD("csi40", 331, R8A779G0_CLK_CSI), 171 DEF_MOD("csi41", 400, R8A779G0_CLK_CSI), 172 DEF_MOD("dis0", 411, R8A779G0_CLK_VIOBUSD2), 173 DEF_MOD("dsitxlink0", 415, R8A779G0_CLK_VIOBUSD2), 174 DEF_MOD("dsitxlink1", 416, R8A779G0_CLK_VIOBUSD2), 175 DEF_MOD("fcpvd0", 508, R8A779G0_CLK_VIOBUSD2), [all …]
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H A D | r8a77970-cpg-mssr.c | 110 DEF_MOD("tmu4", 121, R8A77970_CLK_S2D2), 111 DEF_MOD("tmu3", 122, R8A77970_CLK_S2D2), 112 DEF_MOD("tmu2", 123, R8A77970_CLK_S2D2), 113 DEF_MOD("tmu1", 124, R8A77970_CLK_S2D2), 114 DEF_MOD("tmu0", 125, R8A77970_CLK_CP), 115 DEF_MOD("ivcp1e", 127, R8A77970_CLK_S2D1), 116 DEF_MOD("scif4", 203, R8A77970_CLK_S2D4), 117 DEF_MOD("scif3", 204, R8A77970_CLK_S2D4), 118 DEF_MOD("scif1", 206, R8A77970_CLK_S2D4), 119 DEF_MOD("scif0", 207, R8A77970_CLK_S2D4), [all …]
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H A D | r9a09g057-cpg.c | 81 DEF_MOD("gtm_0_pclk", CLK_PLLCM33_DIV16, 4, 3, 2, 3), 82 DEF_MOD("gtm_1_pclk", CLK_PLLCM33_DIV16, 4, 4, 2, 4), 83 DEF_MOD("gtm_2_pclk", CLK_PLLCLN_DIV16, 4, 5, 2, 5), 84 DEF_MOD("gtm_3_pclk", CLK_PLLCLN_DIV16, 4, 6, 2, 6), 85 DEF_MOD("gtm_4_pclk", CLK_PLLCLN_DIV16, 4, 7, 2, 7), 86 DEF_MOD("gtm_5_pclk", CLK_PLLCLN_DIV16, 4, 8, 2, 8), 87 DEF_MOD("gtm_6_pclk", CLK_PLLCLN_DIV16, 4, 9, 2, 9), 88 DEF_MOD("gtm_7_pclk", CLK_PLLCLN_DIV16, 4, 10, 2, 10), 89 DEF_MOD("wdt_0_clkp", CLK_PLLCM33_DIV16, 4, 11, 2, 11), 90 DEF_MOD("wdt_0_clk_loco", CLK_QEXTAL, 4, 12, 2, 12), [all …]
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H A D | r9a09g011-cpg.c | 155 DEF_MOD("pfc", R9A09G011_PFC_PCLK, CLK_MAIN, 0x400, 2), 156 DEF_MOD("gic", R9A09G011_GIC_CLK, CLK_SEL_B_D2, 0x400, 5), 157 DEF_MOD("sdi0_aclk", R9A09G011_SDI0_ACLK, CLK_SEL_D, 0x408, 0), 158 DEF_MOD("sdi0_imclk", R9A09G011_SDI0_IMCLK, CLK_SEL_SDI, 0x408, 1), 159 DEF_MOD("sdi0_imclk2", R9A09G011_SDI0_IMCLK2, CLK_SEL_SDI, 0x408, 2), 160 DEF_MOD("sdi0_clk_hs", R9A09G011_SDI0_CLK_HS, CLK_PLL2_800, 0x408, 3), 161 DEF_MOD("sdi1_aclk", R9A09G011_SDI1_ACLK, CLK_SEL_D, 0x408, 4), 162 DEF_MOD("sdi1_imclk", R9A09G011_SDI1_IMCLK, CLK_SEL_SDI, 0x408, 5), 163 DEF_MOD("sdi1_imclk2", R9A09G011_SDI1_IMCLK2, CLK_SEL_SDI, 0x408, 6), 164 DEF_MOD("sdi1_clk_hs", R9A09G011_SDI1_CLK_HS, CLK_PLL2_800, 0x408, 7), [all …]
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H A D | r8a779h0-cpg-mssr.c | 176 DEF_MOD("avb0:rgmii0", 211, R8A779H0_CLK_S0D8_HSC), 177 DEF_MOD("avb1:rgmii1", 212, R8A779H0_CLK_S0D8_HSC), 178 DEF_MOD("avb2:rgmii2", 213, R8A779H0_CLK_S0D8_HSC), 179 DEF_MOD("canfd0", 328, R8A779H0_CLK_SASYNCPERD2), 180 DEF_MOD("csi40", 331, R8A779H0_CLK_CSI), 181 DEF_MOD("csi41", 400, R8A779H0_CLK_CSI), 182 DEF_MOD("hscif0", 514, R8A779H0_CLK_SASYNCPERD1), 183 DEF_MOD("hscif1", 515, R8A779H0_CLK_SASYNCPERD1), 184 DEF_MOD("hscif2", 516, R8A779H0_CLK_SASYNCPERD1), 185 DEF_MOD("hscif3", 517, R8A779H0_CLK_SASYNCPERD1), [all …]
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H A D | r9a07g043-cpg.c | 159 DEF_MOD("gic", R9A07G043_GIC600_GICCLK, R9A07G043_CLK_P1, 161 DEF_MOD("ia55_pclk", R9A07G043_IA55_PCLK, R9A07G043_CLK_P2, 163 DEF_MOD("ia55_clk", R9A07G043_IA55_CLK, R9A07G043_CLK_P1, 167 DEF_MOD("iax45_pclk", R9A07G043_IAX45_PCLK, R9A07G043_CLK_P2, 169 DEF_MOD("iax45_clk", R9A07G043_IAX45_CLK, R9A07G043_CLK_P1, 172 DEF_MOD("dmac_aclk", R9A07G043_DMAC_ACLK, R9A07G043_CLK_P1, 174 DEF_MOD("dmac_pclk", R9A07G043_DMAC_PCLK, CLK_P1_DIV2, 176 DEF_MOD("ostm0_pclk", R9A07G043_OSTM0_PCLK, R9A07G043_CLK_P0, 178 DEF_MOD("ostm1_pclk", R9A07G043_OSTM1_PCLK, R9A07G043_CLK_P0, 180 DEF_MOD("ostm2_pclk", R9A07G043_OSTM2_PCLK, R9A07G043_CLK_P0, [all …]
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