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/freebsd/sys/dev/iicbus/controller/twsi/
H A Dtwsi.c86 #define debugf(sc, fmt, args...) if ((sc)->debug) \ argument
87 device_printf((sc)->dev, "%s: " fmt, __func__, ##args)
96 TWSI_READ(struct twsi_softc *sc, bus_size_t off) in TWSI_READ() argument
100 val = bus_read_4(sc->res[0], off); in TWSI_READ()
101 if (sc->debug > 1) in TWSI_READ()
102 debugf(sc, "read %x from %lx\n", val, off); in TWSI_READ()
107 TWSI_WRITE(struct twsi_softc *sc, bus_size_t off, uint32_t val) in TWSI_WRITE() argument
110 if (sc->debug > 1) in TWSI_WRITE()
111 debugf(sc, "Writing %x to %lx\n", val, off); in TWSI_WRITE()
112 bus_write_4(sc->res[0], off, val); in TWSI_WRITE()
[all …]
/freebsd/sys/dev/tws/
H A Dtws.c52 extern int tws_cam_attach(struct tws_softc *sc);
53 extern void tws_cam_detach(struct tws_softc *sc);
54 extern int tws_init_ctlr(struct tws_softc *sc);
55 extern boolean tws_ctlr_ready(struct tws_softc *sc);
56 extern void tws_turn_off_interrupts(struct tws_softc *sc);
57 extern void tws_q_insert_tail(struct tws_softc *sc, struct tws_request *req,
59 extern struct tws_request *tws_q_remove_request(struct tws_softc *sc,
61 extern struct tws_request *tws_q_remove_head(struct tws_softc *sc,
63 extern boolean tws_get_response(struct tws_softc *sc, u_int16_t *req_id);
64 extern boolean tws_ctlr_reset(struct tws_softc *sc);
[all …]
/freebsd/sys/dev/qcom_qup/
H A Dqcom_spi_hw.c65 qcom_spi_hw_read_controller_transfer_sizes(struct qcom_spi_softc *sc) in qcom_spi_hw_read_controller_transfer_sizes() argument
69 reg = QCOM_SPI_READ_4(sc, QUP_IO_M_MODES); in qcom_spi_hw_read_controller_transfer_sizes()
71 QCOM_SPI_DPRINTF(sc, QCOM_SPI_DEBUG_HW_TRANSFER_SETUP, in qcom_spi_hw_read_controller_transfer_sizes()
78 sc->config.input_block_size = 4; in qcom_spi_hw_read_controller_transfer_sizes()
80 sc->config.input_block_size = val * 16; in qcom_spi_hw_read_controller_transfer_sizes()
86 sc->config.output_block_size = 4; in qcom_spi_hw_read_controller_transfer_sizes()
88 sc->config.output_block_size = val * 16; in qcom_spi_hw_read_controller_transfer_sizes()
93 sc->config.input_fifo_size = in qcom_spi_hw_read_controller_transfer_sizes()
94 sc->config.input_block_size * (2 << val); in qcom_spi_hw_read_controller_transfer_sizes()
99 sc->config.output_fifo_size = in qcom_spi_hw_read_controller_transfer_sizes()
[all …]
/freebsd/sys/dev/ath/
H A Dif_ath.c183 static void ath_txq_init(struct ath_softc *sc, struct ath_txq *, int);
188 static int ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq,
261 ath_legacy_attach_comp_func(struct ath_softc *sc) in ath_legacy_attach_comp_func() argument
269 switch (sc->sc_txqsetup &~ (1<<sc->sc_cabq->axq_qnum)) { in ath_legacy_attach_comp_func()
271 TASK_INIT(&sc->sc_txtask, 0, ath_tx_proc_q0, sc); in ath_legacy_attach_comp_func()
274 TASK_INIT(&sc->sc_txtask, 0, ath_tx_proc_q0123, sc); in ath_legacy_attach_comp_func()
277 TASK_INIT(&sc->sc_txtask, 0, ath_tx_proc, sc); in ath_legacy_attach_comp_func()
299 _ath_power_setpower(struct ath_softc *sc, int power_state, int selfgen, in _ath_power_setpower() argument
302 ATH_LOCK_ASSERT(sc); in _ath_power_setpower()
304 DPRINTF(sc, ATH_DEBUG_PWRSAVE, "%s: (%s:%d) state=%d, refcnt=%d, target=%d, cur=%d\n", in _ath_power_setpower()
[all …]
H A Dif_ath_rx_edma.c149 static int ath_edma_rxfifo_alloc(struct ath_softc *sc, HAL_RX_QUEUE qtype,
151 static int ath_edma_rxfifo_flush(struct ath_softc *sc, HAL_RX_QUEUE qtype);
152 static void ath_edma_rxbuf_free(struct ath_softc *sc, struct ath_buf *bf);
153 static void ath_edma_recv_proc_queue(struct ath_softc *sc,
155 static int ath_edma_recv_proc_deferred_queue(struct ath_softc *sc,
159 ath_edma_stoprecv(struct ath_softc *sc, int dodelay) in ath_edma_stoprecv() argument
161 struct ath_hal *ah = sc->sc_ah; in ath_edma_stoprecv()
163 DPRINTF(sc, ATH_DEBUG_EDMA_RX, "%s: called, dodelay=%d\n", in ath_edma_stoprecv()
166 ATH_RX_LOCK(sc); in ath_edma_stoprecv()
175 sc->sc_rx_stopped = 1; in ath_edma_stoprecv()
[all …]
/freebsd/sys/dev/uart/
H A Duart_core.c94 uart_pps_print_mode(struct uart_softc *sc) in uart_pps_print_mode() argument
97 device_printf(sc->sc_dev, "PPS capture mode: "); in uart_pps_print_mode()
98 switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) { in uart_pps_print_mode()
112 if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE) in uart_pps_print_mode()
114 if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) in uart_pps_print_mode()
122 struct uart_softc *sc; in uart_pps_mode_sysctl() local
125 sc = arg1; in uart_pps_mode_sysctl()
126 tmp = sc->sc_pps_mode; in uart_pps_mode_sysctl()
132 sc->sc_pps_mode = tmp; in uart_pps_mode_sysctl()
137 uart_pps_process(struct uart_softc *sc, int ser_sig) in uart_pps_process() argument
[all …]
/freebsd/sys/dev/cyapa/
H A Dcyapa.c214 struct cyapa_softc *sc; member
220 static int cyapa_raw_input(struct cyapa_softc *sc, struct cyapa_regs *regs,
222 static void cyapa_set_power_mode(struct cyapa_softc *sc, int mode);
224 static int fifo_empty(struct cyapa_softc *sc, struct cyapa_fifo *fifo);
225 static size_t fifo_ready(struct cyapa_softc *sc, struct cyapa_fifo *fifo);
226 static char *fifo_read(struct cyapa_softc *sc, struct cyapa_fifo *fifo,
228 static char *fifo_write(struct cyapa_softc *sc, struct cyapa_fifo *fifo,
230 static uint8_t fifo_read_char(struct cyapa_softc *sc,
232 static void fifo_write_char(struct cyapa_softc *sc, struct cyapa_fifo *fifo,
234 static size_t fifo_space(struct cyapa_softc *sc, struct cyapa_fifo *fifo);
[all …]
/freebsd/sys/dev/mrsas/
H A Dmrsas.c66 static int mrsas_setup_msix(struct mrsas_softc *sc);
67 static int mrsas_allocate_msix(struct mrsas_softc *sc);
68 static void mrsas_shutdown_ctlr(struct mrsas_softc *sc, u_int32_t opcode);
69 static void mrsas_flush_cache(struct mrsas_softc *sc);
70 static void mrsas_reset_reply_desc(struct mrsas_softc *sc);
72 static int mrsas_get_map_info(struct mrsas_softc *sc);
73 static int mrsas_get_ld_map_info(struct mrsas_softc *sc);
74 static int mrsas_sync_map_info(struct mrsas_softc *sc);
75 static int mrsas_get_pd_list(struct mrsas_softc *sc);
76 static int mrsas_get_ld_list(struct mrsas_softc *sc);
[all …]
/freebsd/sys/dev/cadence/
H A Dif_cgem.c220 #define RD4(sc, off) (bus_read_4((sc)->mem_res, (off))) argument
221 #define WR4(sc, off, val) (bus_write_4((sc)->mem_res, (off), (val))) argument
222 #define BARRIER(sc, off, len, flags) \ argument
223 (bus_barrier((sc)->mem_res, (off), (len), (flags))
225 #define CGEM_LOCK(sc) mtx_lock(&(sc)->sc_mtx) argument
226 #define CGEM_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx) argument
227 #define CGEM_LOCK_INIT(sc) mtx_init(&(sc)->sc_mtx, \ argument
228 device_get_nameunit((sc)->dev), MTX_NETWORK_LOCK, MTX_DEF)
229 #define CGEM_LOCK_DESTROY(sc) mtx_destroy(&(sc)->sc_mtx) argument
230 #define CGEM_ASSERT_LOCKED(sc) mtx_assert(&(sc)->sc_mtx, MA_OWNED) argument
[all …]
/freebsd/sys/dev/rtsx/
H A Drtsx.c88 void (*rtsx_intr_trans_ok)(struct rtsx_softc *sc);
90 void (*rtsx_intr_trans_ko)(struct rtsx_softc *sc);
201 static int rtsx_dma_alloc(struct rtsx_softc *sc);
203 static void rtsx_dma_free(struct rtsx_softc *sc);
205 static void rtsx_handle_card_present(struct rtsx_softc *sc);
207 static bool rtsx_is_card_present(struct rtsx_softc *sc);
208 static int rtsx_init(struct rtsx_softc *sc);
210 static int rtsx_rts5227_fill_driving(struct rtsx_softc *sc);
211 static int rtsx_rts5249_fill_driving(struct rtsx_softc *sc);
212 static int rtsx_rts5260_fill_driving(struct rtsx_softc *sc);
[all …]
/freebsd/sys/dev/cfi/
H A Dcfi_core.c65 cfi_read_raw(struct cfi_softc *sc, u_int ofs) in cfi_read_raw() argument
69 ofs &= ~(sc->sc_width - 1); in cfi_read_raw()
70 switch (sc->sc_width) { in cfi_read_raw()
72 val = bus_space_read_1(sc->sc_tag, sc->sc_handle, ofs); in cfi_read_raw()
75 val = bus_space_read_2(sc->sc_tag, sc->sc_handle, ofs); in cfi_read_raw()
78 val = bus_space_read_4(sc->sc_tag, sc->sc_handle, ofs); in cfi_read_raw()
88 cfi_read(struct cfi_softc *sc, u_int ofs) in cfi_read() argument
93 ofs &= ~(sc->sc_width - 1); in cfi_read()
94 switch (sc->sc_width) { in cfi_read()
96 val = bus_space_read_1(sc->sc_tag, sc->sc_handle, ofs); in cfi_read()
[all …]
/freebsd/sys/arm/broadcom/bcm2835/
H A Dbcm2835_bsc.c113 #define DEVICE_DEBUGF(sc, lvl, fmt, args...) \ argument
114 if ((lvl) <= (sc)->sc_debug) \
115 device_printf((sc)->sc_dev, fmt, ##args)
117 #define DEBUGF(sc, lvl, fmt, args...) \ argument
118 if ((lvl) <= (sc)->sc_debug) \
125 bcm_bsc_modifyreg(struct bcm_bsc_softc *sc, uint32_t off, uint32_t mask, in bcm_bsc_modifyreg() argument
130 mtx_assert(&sc->sc_mtx, MA_OWNED); in bcm_bsc_modifyreg()
131 reg = BCM_BSC_READ(sc, off); in bcm_bsc_modifyreg()
134 BCM_BSC_WRITE(sc, off, reg); in bcm_bsc_modifyreg()
140 struct bcm_bsc_softc *sc; in bcm_bsc_clock_proc() local
[all …]
/freebsd/sys/dev/sbni/
H A Dif_sbni.c134 sbni_inb(struct sbni_softc *sc, enum sbni_reg reg) in sbni_inb() argument
137 rman_get_bustag(sc->io_res), in sbni_inb()
138 rman_get_bushandle(sc->io_res), in sbni_inb()
139 sc->io_off + reg); in sbni_inb()
143 sbni_outb(struct sbni_softc *sc, enum sbni_reg reg, u_char value) in sbni_outb() argument
146 rman_get_bustag(sc->io_res), in sbni_outb()
147 rman_get_bushandle(sc->io_res), in sbni_outb()
148 sc->io_off + reg, value); in sbni_outb()
152 sbni_insb(struct sbni_softc *sc, u_char *to, u_int len) in sbni_insb() argument
155 rman_get_bustag(sc->io_res), in sbni_insb()
[all …]
/freebsd/sys/dev/bxe/
H A Dbxe.c642 static void bxe_cmng_fns_init(struct bxe_softc *sc,
645 static int bxe_get_cmng_fns_mode(struct bxe_softc *sc);
646 static void storm_memset_cmng(struct bxe_softc *sc,
649 static void bxe_set_reset_global(struct bxe_softc *sc);
650 static void bxe_set_reset_in_progress(struct bxe_softc *sc);
651 static uint8_t bxe_reset_is_done(struct bxe_softc *sc,
653 static uint8_t bxe_clear_pf_load(struct bxe_softc *sc);
654 static uint8_t bxe_chk_parity_attn(struct bxe_softc *sc,
657 static void bxe_int_disable(struct bxe_softc *sc);
658 static int bxe_release_leader_lock(struct bxe_softc *sc);
[all …]
/freebsd/sys/dev/ffec/
H A Dif_ffec.c197 #define FFEC_LOCK(sc) mtx_lock(&(sc)->mtx) argument
198 #define FFEC_UNLOCK(sc) mtx_unlock(&(sc)->mtx) argument
199 #define FFEC_LOCK_INIT(sc) mtx_init(&(sc)->mtx, \
200 device_get_nameunit((sc)->dev), MTX_NETWORK_LOCK, MTX_DEF) argument
201 #define FFEC_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx); argument
202 #define FFEC_ASSERT_LOCKED(sc) mtx_asser argument
196 FFEC_LOCK(sc) global() argument
210 RD2(struct ffec_softc * sc,bus_size_t off) RD2() argument
217 WR2(struct ffec_softc * sc,bus_size_t off,uint16_t val) WR2() argument
224 RD4(struct ffec_softc * sc,bus_size_t off) RD4() argument
231 WR4(struct ffec_softc * sc,bus_size_t off,uint32_t val) WR4() argument
238 next_rxidx(struct ffec_softc * sc,uint32_t curidx) next_rxidx() argument
245 next_txidx(struct ffec_softc * sc,uint32_t curidx) next_txidx() argument
261 ffec_miigasket_setup(struct ffec_softc * sc) ffec_miigasket_setup() argument
305 ffec_miibus_iowait(struct ffec_softc * sc) ffec_miibus_iowait() argument
319 struct ffec_softc *sc; ffec_miibus_readreg() local
344 struct ffec_softc *sc; ffec_miibus_writereg() local
367 struct ffec_softc *sc; ffec_miibus_statchg() local
444 struct ffec_softc *sc; ffec_media_status() local
458 ffec_media_change_locked(struct ffec_softc * sc) ffec_media_change_locked() argument
467 struct ffec_softc *sc; ffec_media_change() local
478 ffec_clear_stats(struct ffec_softc * sc) ffec_clear_stats() argument
518 ffec_harvest_stats(struct ffec_softc * sc) ffec_harvest_stats() argument
553 struct ffec_softc *sc; ffec_tick() local
591 ffec_setup_txdesc(struct ffec_softc * sc,int idx,bus_addr_t paddr,uint32_t len) ffec_setup_txdesc() argument
622 ffec_setup_txbuf(struct ffec_softc * sc,int idx,struct mbuf ** mp) ffec_setup_txbuf() argument
648 ffec_txstart_locked(struct ffec_softc * sc) ffec_txstart_locked() argument
694 struct ffec_softc *sc = if_getsoftc(ifp); ffec_txstart() local
702 ffec_txfinish_locked(struct ffec_softc * sc) ffec_txfinish_locked() argument
747 ffec_setup_rxdesc(struct ffec_softc * sc,int idx,bus_addr_t paddr) ffec_setup_rxdesc() argument
765 ffec_setup_rxbuf(struct ffec_softc * sc,int idx,struct mbuf * m) ffec_setup_rxbuf() argument
798 ffec_alloc_mbufcl(struct ffec_softc * sc) ffec_alloc_mbufcl() argument
810 ffec_rxfinish_onebuf(struct ffec_softc * sc,int len) ffec_rxfinish_onebuf() argument
871 ffec_rxfinish_locked(struct ffec_softc * sc) ffec_rxfinish_locked() argument
936 ffec_get_hwaddr(struct ffec_softc * sc,uint8_t * hwaddr) ffec_get_hwaddr() argument
990 ffec_setup_rxfilter(struct ffec_softc * sc) ffec_setup_rxfilter() argument
1037 ffec_stop_locked(struct ffec_softc * sc) ffec_stop_locked() argument
1100 ffec_init_locked(struct ffec_softc * sc) ffec_init_locked() argument
1277 struct ffec_softc *sc = if_softc; ffec_init() local
1287 struct ffec_softc *sc; ffec_intr() local
1329 struct ffec_softc *sc; ffec_ioctl() local
1392 struct ffec_softc *sc; ffec_detach() local
1468 struct ffec_softc *sc; ffec_attach() local
[all...]
/freebsd/sys/dev/smc/
H A Dif_smc.c83 #define SMC_LOCK(sc) mtx_lock(&(sc)->smc_mtx) argument
84 #define SMC_UNLOCK(sc) mtx_unlock(&(sc)->smc_mtx) argument
85 #define SMC_ASSERT_LOCKED(sc) mtx_assert(&(sc)->smc_mtx, MA_OWNED) argument
147 smc_select_bank(struct smc_softc *sc, uint16_t bank) in smc_select_bank() argument
150 bus_barrier(sc->smc_reg, BSR, 2, in smc_select_bank()
152 bus_write_2(sc->smc_reg, BSR, bank & BSR_BANK_MASK); in smc_select_bank()
153 bus_barrier(sc->smc_reg, BSR, 2, in smc_select_bank()
159 smc_mmu_wait(struct smc_softc *sc) in smc_mmu_wait() argument
162 KASSERT((bus_read_2(sc->smc_reg, BSR) & in smc_mmu_wait()
164 device_get_nameunit(sc->smc_dev))); in smc_mmu_wait()
[all …]
/freebsd/sys/dev/hdmi/
H A Ddwc_hdmi.c73 dwc_hdmi_phy_wait_i2c_done(struct dwc_hdmi_softc *sc, int msec) in dwc_hdmi_phy_wait_i2c_done() argument
77 val = RD1(sc, HDMI_IH_I2CMPHY_STAT0) & in dwc_hdmi_phy_wait_i2c_done()
84 val = RD1(sc, HDMI_IH_I2CMPHY_STAT0) & in dwc_hdmi_phy_wait_i2c_done()
90 dwc_hdmi_phy_i2c_write(struct dwc_hdmi_softc *sc, unsigned short data, in dwc_hdmi_phy_i2c_write() argument
95 WR1(sc, HDMI_IH_I2CMPHY_STAT0, in dwc_hdmi_phy_i2c_write()
97 WR1(sc, HDMI_PHY_I2CM_ADDRESS_ADDR, addr); in dwc_hdmi_phy_i2c_write()
98 WR1(sc, HDMI_PHY_I2CM_DATAO_1_ADDR, ((data >> 8) & 0xff)); in dwc_hdmi_phy_i2c_write()
99 WR1(sc, HDMI_PHY_I2CM_DATAO_0_ADDR, ((data >> 0) & 0xff)); in dwc_hdmi_phy_i2c_write()
100 WR1(sc, HDMI_PHY_I2CM_OPERATION_ADDR, HDMI_PHY_I2CM_OPERATION_ADDR_WRITE); in dwc_hdmi_phy_i2c_write()
101 dwc_hdmi_phy_wait_i2c_done(sc, 1000); in dwc_hdmi_phy_i2c_write()
[all …]
/freebsd/sys/dev/mpi3mr/
H A Dmpi3mr.c79 static void mpi3mr_repost_reply_buf(struct mpi3mr_softc *sc,
81 static int mpi3mr_complete_admin_cmd(struct mpi3mr_softc *sc);
82 static void mpi3mr_port_enable_complete(struct mpi3mr_softc *sc,
84 static void mpi3mr_flush_io(struct mpi3mr_softc *sc);
85 static int mpi3mr_issue_reset(struct mpi3mr_softc *sc, U16 reset_type,
87 static void mpi3mr_dev_rmhs_send_tm(struct mpi3mr_softc *sc, U16 handle,
89 static void mpi3mr_dev_rmhs_complete_iou(struct mpi3mr_softc *sc,
91 static void mpi3mr_dev_rmhs_complete_tm(struct mpi3mr_softc *sc,
93 static void mpi3mr_send_evt_ack(struct mpi3mr_softc *sc, U8 event,
95 static void mpi3mr_print_fault_info(struct mpi3mr_softc *sc);
[all …]
/freebsd/sys/dev/bge/
H A Dif_bge.c363 #define BGE_IS_JUMBO_CAPABLE(sc) ((sc)->bge_flags & BGE_FLAG_JUMBO) argument
364 #define BGE_IS_5700_FAMILY(sc) ((sc)->bge_flags & BGE_FLAG_5700_FAMILY) argument
365 #define BGE_IS_5705_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_5705_PLUS) argument
366 #define BGE_IS_5714_FAMILY(sc) ((sc)->bge_flags & BGE_FLAG_5714_FAMILY) argument
367 #define BGE_IS_575X_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_575X_PLUS) argument
368 #define BGE_IS_5755_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_5755_PLUS) argument
369 #define BGE_IS_5717_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_5717_PLUS) argument
370 #define BGE_IS_57765_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_57765_PLUS) argument
393 static int bge_get_eaddr_fw(struct bge_softc *sc, uint8_t ether_addr[]);
546 bge_has_eaddr(struct bge_softc *sc) in bge_has_eaddr() argument
[all …]
/freebsd/sys/dev/oce/
H A Doce_hw.c44 static int oce_POST(POCE_SOFTC sc);
51 oce_POST(POCE_SOFTC sc) in oce_POST() argument
57 post_status.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc)); in oce_POST()
62 OCE_WRITE_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc), post_status.dw0); in oce_POST()
72 post_status.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc)); in oce_POST()
74 device_printf(sc->dev, in oce_POST()
82 device_printf(sc->dev, "POST timed out: %x\n", post_status.dw0); in oce_POST()
92 oce_hw_init(POCE_SOFTC sc) in oce_hw_init() argument
96 rc = oce_POST(sc); in oce_hw_init()
101 rc = oce_dma_alloc(sc, sizeof(struct oce_bmbx), &sc->bsmbx, 0); in oce_hw_init()
[all …]
/freebsd/sys/dev/xdma/
H A Dxdma_fdt_test.c92 struct xdmatest_softc *sc; in xdmatest_intr() local
94 sc = arg; in xdmatest_intr()
96 sc->done = 1; in xdmatest_intr()
98 mtx_lock(&sc->mtx); in xdmatest_intr()
99 wakeup(sc); in xdmatest_intr()
100 mtx_unlock(&sc->mtx); in xdmatest_intr()
118 xdmatest_alloc_test_memory(struct xdmatest_softc *sc) in xdmatest_alloc_test_memory() argument
122 sc->len = (0x1000000 - 8); /* 16mb */ in xdmatest_alloc_test_memory()
123 sc->len = 8; in xdmatest_alloc_test_memory()
128 bus_get_dma_tag(sc->dev), in xdmatest_alloc_test_memory()
[all …]
/freebsd/sys/dev/gem/
H A Dif_gem.c99 static int gem_add_rxbuf(struct gem_softc *sc, int idx);
100 static int gem_bitwait(struct gem_softc *sc, bus_addr_t r, uint32_t clr,
104 static int gem_disable_rx(struct gem_softc *sc);
105 static int gem_disable_tx(struct gem_softc *sc);
106 static void gem_eint(struct gem_softc *sc, u_int status);
108 static void gem_init_locked(struct gem_softc *sc);
109 static void gem_init_regs(struct gem_softc *sc);
111 static int gem_load_txmbuf(struct gem_softc *sc, struct mbuf **m_head);
112 static int gem_meminit(struct gem_softc *sc);
113 static void gem_mifinit(struct gem_softc *sc);
[all …]
/freebsd/sys/dev/dc/
H A Dif_dc.c356 #define DC_SETBIT(sc, reg, x) \ argument
357 CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x))
359 #define DC_CLRBIT(sc, reg, x) \ argument
360 CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(x))
362 #define SIO_SET(x) DC_SETBIT(sc, DC_SIO, (x))
363 #define SIO_CLR(x) DC_CLRBIT(sc, DC_SIO, (x))
366 dc_delay(struct dc_softc *sc) in dc_delay() argument
371 CSR_READ_4(sc, DC_BUSCTL); in dc_delay()
375 dc_eeprom_width(struct dc_softc *sc) in dc_eeprom_width() argument
380 dc_eeprom_idle(sc); in dc_eeprom_width()
[all …]
/freebsd/sys/powerpc/powermac/
H A Dcuda.c76 static void cuda_send_inbound(struct cuda_softc *sc);
77 static void cuda_send_outbound(struct cuda_softc *sc);
117 static uint8_t cuda_read_reg(struct cuda_softc *sc, u_int offset);
118 static void cuda_write_reg(struct cuda_softc *sc, u_int offset, uint8_t value);
143 struct cuda_softc *sc; in cuda_attach() local
149 sc = device_get_softc(dev); in cuda_attach()
150 sc->sc_dev = dev; in cuda_attach()
152 sc->sc_memrid = 0; in cuda_attach()
153 sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, in cuda_attach()
154 &sc->sc_memrid, RF_ACTIVE); in cuda_attach()
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/freebsd/sys/dev/qcom_ess_edma/
H A Dqcom_ess_edma_hw.c82 qcom_ess_edma_hw_reset(struct qcom_ess_edma_softc *sc) in qcom_ess_edma_hw_reset() argument
85 EDMA_LOCK_ASSERT(sc); in qcom_ess_edma_hw_reset()
87 device_printf(sc->sc_dev, "%s: called, TODO!\n", __func__); in qcom_ess_edma_hw_reset()
111 qcom_ess_edma_hw_get_tx_intr_moderation(struct qcom_ess_edma_softc *sc, in qcom_ess_edma_hw_get_tx_intr_moderation() argument
116 EDMA_LOCK_ASSERT(sc); in qcom_ess_edma_hw_get_tx_intr_moderation()
118 EDMA_REG_BARRIER_READ(sc); in qcom_ess_edma_hw_get_tx_intr_moderation()
119 reg = EDMA_REG_READ(sc, EDMA_REG_IRQ_MODRT_TIMER_INIT); in qcom_ess_edma_hw_get_tx_intr_moderation()
135 qcom_ess_edma_hw_set_tx_intr_moderation(struct qcom_ess_edma_softc *sc, in qcom_ess_edma_hw_set_tx_intr_moderation() argument
142 EDMA_LOCK_ASSERT(sc); in qcom_ess_edma_hw_set_tx_intr_moderation()
144 EDMA_REG_BARRIER_READ(sc); in qcom_ess_edma_hw_set_tx_intr_moderation()
[all …]

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