Lines Matching refs:sc
99 static int gem_add_rxbuf(struct gem_softc *sc, int idx);
100 static int gem_bitwait(struct gem_softc *sc, bus_addr_t r, uint32_t clr,
104 static int gem_disable_rx(struct gem_softc *sc);
105 static int gem_disable_tx(struct gem_softc *sc);
106 static void gem_eint(struct gem_softc *sc, u_int status);
108 static void gem_init_locked(struct gem_softc *sc);
109 static void gem_init_regs(struct gem_softc *sc);
111 static int gem_load_txmbuf(struct gem_softc *sc, struct mbuf **m_head);
112 static int gem_meminit(struct gem_softc *sc);
113 static void gem_mifinit(struct gem_softc *sc);
114 static void gem_reset(struct gem_softc *sc);
115 static int gem_reset_rx(struct gem_softc *sc);
116 static void gem_reset_rxdma(struct gem_softc *sc);
117 static int gem_reset_tx(struct gem_softc *sc);
119 static void gem_rint(struct gem_softc *sc);
124 static void gem_rxdrain(struct gem_softc *sc);
125 static void gem_setladrf(struct gem_softc *sc);
130 static void gem_tint(struct gem_softc *sc);
131 static inline void gem_txkick(struct gem_softc *sc);
132 static int gem_watchdog(struct gem_softc *sc);
143 gem_attach(struct gem_softc *sc) in gem_attach() argument
151 device_printf(sc->sc_dev, "flags=0x%x\n", sc->sc_flags); in gem_attach()
154 ifp = sc->sc_ifp = if_alloc(IFT_ETHER); in gem_attach()
155 sc->sc_csum_features = GEM_CSUM_FEATURES; in gem_attach()
156 if_setsoftc(ifp, sc); in gem_attach()
157 if_initname(ifp, device_get_name(sc->sc_dev), in gem_attach()
158 device_get_unit(sc->sc_dev)); in gem_attach()
166 callout_init_mtx(&sc->sc_tick_ch, &sc->sc_mtx, 0); in gem_attach()
168 callout_init_mtx(&sc->sc_rx_ch, &sc->sc_mtx, 0); in gem_attach()
172 gem_reset(sc); in gem_attach()
174 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, in gem_attach()
177 NULL, &sc->sc_pdmatag); in gem_attach()
181 error = bus_dma_tag_create(sc->sc_pdmatag, 1, 0, in gem_attach()
183 1, MCLBYTES, BUS_DMA_ALLOCNOW, NULL, NULL, &sc->sc_rdmatag); in gem_attach()
187 error = bus_dma_tag_create(sc->sc_pdmatag, 1, 0, in gem_attach()
190 BUS_DMA_ALLOCNOW, NULL, NULL, &sc->sc_tdmatag); in gem_attach()
194 error = bus_dma_tag_create(sc->sc_pdmatag, PAGE_SIZE, 0, in gem_attach()
198 NULL, NULL, &sc->sc_cdmatag); in gem_attach()
206 if ((error = bus_dmamem_alloc(sc->sc_cdmatag, in gem_attach()
207 (void **)&sc->sc_control_data, in gem_attach()
209 &sc->sc_cddmamap)) != 0) { in gem_attach()
210 device_printf(sc->sc_dev, in gem_attach()
215 sc->sc_cddma = 0; in gem_attach()
216 if ((error = bus_dmamap_load(sc->sc_cdmatag, sc->sc_cddmamap, in gem_attach()
217 sc->sc_control_data, sizeof(struct gem_control_data), in gem_attach()
218 gem_cddma_callback, sc, 0)) != 0 || sc->sc_cddma == 0) { in gem_attach()
219 device_printf(sc->sc_dev, in gem_attach()
228 STAILQ_INIT(&sc->sc_txfreeq); in gem_attach()
229 STAILQ_INIT(&sc->sc_txdirtyq); in gem_attach()
236 txs = &sc->sc_txsoft[i]; in gem_attach()
239 if ((error = bus_dmamap_create(sc->sc_tdmatag, 0, in gem_attach()
241 device_printf(sc->sc_dev, in gem_attach()
246 STAILQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); in gem_attach()
253 if ((error = bus_dmamap_create(sc->sc_rdmatag, 0, in gem_attach()
254 &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { in gem_attach()
255 device_printf(sc->sc_dev, in gem_attach()
260 sc->sc_rxsoft[i].rxs_mbuf = NULL; in gem_attach()
264 if ((sc->sc_flags & GEM_SERDES) != 0) in gem_attach()
267 GEM_WRITE_4(sc, GEM_MII_DATAPATH_MODE, GEM_MII_DATAPATH_MII); in gem_attach()
268 GEM_BARRIER(sc, GEM_MII_DATAPATH_MODE, 4, in gem_attach()
271 gem_mifinit(sc); in gem_attach()
277 v = GEM_READ_4(sc, GEM_MIF_CONFIG); in gem_attach()
280 GEM_WRITE_4(sc, GEM_MIF_CONFIG, v); in gem_attach()
281 GEM_BARRIER(sc, GEM_MIF_CONFIG, 4, in gem_attach()
283 error = mii_attach(sc->sc_dev, &sc->sc_miibus, ifp, in gem_attach()
294 ((v & GEM_MIF_CONFIG_MDI0) != 0 || GEM_IS_APPLE(sc))) { in gem_attach()
296 GEM_WRITE_4(sc, GEM_MIF_CONFIG, v); in gem_attach()
297 GEM_BARRIER(sc, GEM_MIF_CONFIG, 4, in gem_attach()
299 switch (sc->sc_variant) { in gem_attach()
310 error = mii_attach(sc->sc_dev, &sc->sc_miibus, ifp, in gem_attach()
318 if (error != 0 && sc->sc_variant == GEM_SUN_GEM) { in gem_attach()
320 GEM_WRITE_4(sc, GEM_MII_DATAPATH_MODE, in gem_attach()
322 GEM_BARRIER(sc, GEM_MII_DATAPATH_MODE, 4, in gem_attach()
324 GEM_WRITE_4(sc, GEM_MII_SLINK_CONTROL, in gem_attach()
326 GEM_BARRIER(sc, GEM_MII_SLINK_CONTROL, 4, in gem_attach()
328 GEM_WRITE_4(sc, GEM_MII_CONFIG, GEM_MII_CONFIG_ENABLE); in gem_attach()
329 GEM_BARRIER(sc, GEM_MII_CONFIG, 4, in gem_attach()
331 sc->sc_flags |= GEM_SERDES; in gem_attach()
332 error = mii_attach(sc->sc_dev, &sc->sc_miibus, ifp, in gem_attach()
337 device_printf(sc->sc_dev, "attaching PHYs failed\n"); in gem_attach()
340 sc->sc_mii = device_get_softc(sc->sc_miibus); in gem_attach()
349 sc->sc_rxfifosize = 64 * in gem_attach()
350 GEM_READ_4(sc, GEM_RX_FIFO_SIZE); in gem_attach()
353 v = GEM_READ_4(sc, GEM_TX_FIFO_SIZE); in gem_attach()
354 device_printf(sc->sc_dev, "%ukB RX FIFO, %ukB TX FIFO\n", in gem_attach()
355 sc->sc_rxfifosize / 1024, v / 16); in gem_attach()
358 ether_ifattach(ifp, sc->sc_enaddr); in gem_attach()
365 if_sethwassistbits(ifp, sc->sc_csum_features, 0); in gem_attach()
376 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) in gem_attach()
377 bus_dmamap_destroy(sc->sc_rdmatag, in gem_attach()
378 sc->sc_rxsoft[i].rxs_dmamap); in gem_attach()
381 if (sc->sc_txsoft[i].txs_dmamap != NULL) in gem_attach()
382 bus_dmamap_destroy(sc->sc_tdmatag, in gem_attach()
383 sc->sc_txsoft[i].txs_dmamap); in gem_attach()
384 bus_dmamap_unload(sc->sc_cdmatag, sc->sc_cddmamap); in gem_attach()
386 bus_dmamem_free(sc->sc_cdmatag, sc->sc_control_data, in gem_attach()
387 sc->sc_cddmamap); in gem_attach()
389 bus_dma_tag_destroy(sc->sc_cdmatag); in gem_attach()
391 bus_dma_tag_destroy(sc->sc_tdmatag); in gem_attach()
393 bus_dma_tag_destroy(sc->sc_rdmatag); in gem_attach()
395 bus_dma_tag_destroy(sc->sc_pdmatag); in gem_attach()
402 gem_detach(struct gem_softc *sc) in gem_detach() argument
404 if_t ifp = sc->sc_ifp; in gem_detach()
408 GEM_LOCK(sc); in gem_detach()
410 GEM_UNLOCK(sc); in gem_detach()
411 callout_drain(&sc->sc_tick_ch); in gem_detach()
413 callout_drain(&sc->sc_rx_ch); in gem_detach()
416 bus_generic_detach(sc->sc_dev); in gem_detach()
419 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) in gem_detach()
420 bus_dmamap_destroy(sc->sc_rdmatag, in gem_detach()
421 sc->sc_rxsoft[i].rxs_dmamap); in gem_detach()
423 if (sc->sc_txsoft[i].txs_dmamap != NULL) in gem_detach()
424 bus_dmamap_destroy(sc->sc_tdmatag, in gem_detach()
425 sc->sc_txsoft[i].txs_dmamap); in gem_detach()
426 GEM_CDSYNC(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); in gem_detach()
427 bus_dmamap_unload(sc->sc_cdmatag, sc->sc_cddmamap); in gem_detach()
428 bus_dmamem_free(sc->sc_cdmatag, sc->sc_control_data, in gem_detach()
429 sc->sc_cddmamap); in gem_detach()
430 bus_dma_tag_destroy(sc->sc_cdmatag); in gem_detach()
431 bus_dma_tag_destroy(sc->sc_tdmatag); in gem_detach()
432 bus_dma_tag_destroy(sc->sc_rdmatag); in gem_detach()
433 bus_dma_tag_destroy(sc->sc_pdmatag); in gem_detach()
437 gem_suspend(struct gem_softc *sc) in gem_suspend() argument
439 if_t ifp = sc->sc_ifp; in gem_suspend()
441 GEM_LOCK(sc); in gem_suspend()
443 GEM_UNLOCK(sc); in gem_suspend()
447 gem_resume(struct gem_softc *sc) in gem_resume() argument
449 if_t ifp = sc->sc_ifp; in gem_resume()
451 GEM_LOCK(sc); in gem_resume()
456 sc->sc_flags &= ~GEM_INITED; in gem_resume()
458 gem_init_locked(sc); in gem_resume()
459 GEM_UNLOCK(sc); in gem_resume()
528 struct gem_softc *sc = xsc; in gem_cddma_callback() local
534 sc->sc_cddma = segs[0].ds_addr; in gem_cddma_callback()
540 struct gem_softc *sc = arg; in gem_tick() local
541 if_t ifp = sc->sc_ifp; in gem_tick()
544 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_tick()
550 GEM_READ_4(sc, GEM_MAC_NORM_COLL_CNT) + in gem_tick()
551 GEM_READ_4(sc, GEM_MAC_FIRST_COLL_CNT)); in gem_tick()
552 v = GEM_READ_4(sc, GEM_MAC_EXCESS_COLL_CNT) + in gem_tick()
553 GEM_READ_4(sc, GEM_MAC_LATE_COLL_CNT); in gem_tick()
557 GEM_READ_4(sc, GEM_MAC_RX_LEN_ERR_CNT) + in gem_tick()
558 GEM_READ_4(sc, GEM_MAC_RX_ALIGN_ERR) + in gem_tick()
559 GEM_READ_4(sc, GEM_MAC_RX_CRC_ERR_CNT) + in gem_tick()
560 GEM_READ_4(sc, GEM_MAC_RX_CODE_VIOL)); in gem_tick()
565 GEM_WRITE_4(sc, GEM_MAC_NORM_COLL_CNT, 0); in gem_tick()
566 GEM_WRITE_4(sc, GEM_MAC_FIRST_COLL_CNT, 0); in gem_tick()
567 GEM_WRITE_4(sc, GEM_MAC_EXCESS_COLL_CNT, 0); in gem_tick()
568 GEM_WRITE_4(sc, GEM_MAC_LATE_COLL_CNT, 0); in gem_tick()
569 GEM_WRITE_4(sc, GEM_MAC_RX_LEN_ERR_CNT, 0); in gem_tick()
570 GEM_WRITE_4(sc, GEM_MAC_RX_ALIGN_ERR, 0); in gem_tick()
571 GEM_WRITE_4(sc, GEM_MAC_RX_CRC_ERR_CNT, 0); in gem_tick()
572 GEM_WRITE_4(sc, GEM_MAC_RX_CODE_VIOL, 0); in gem_tick()
574 mii_tick(sc->sc_mii); in gem_tick()
576 if (gem_watchdog(sc) == EJUSTRETURN) in gem_tick()
579 callout_reset(&sc->sc_tick_ch, hz, gem_tick, sc); in gem_tick()
583 gem_bitwait(struct gem_softc *sc, bus_addr_t r, uint32_t clr, uint32_t set) in gem_bitwait() argument
589 reg = GEM_READ_4(sc, r); in gem_bitwait()
597 gem_reset(struct gem_softc *sc) in gem_reset() argument
601 CTR2(KTR_GEM, "%s: %s", device_get_name(sc->sc_dev), __func__); in gem_reset()
603 gem_reset_rx(sc); in gem_reset()
604 gem_reset_tx(sc); in gem_reset()
607 GEM_WRITE_4(sc, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX); in gem_reset()
608 GEM_BARRIER(sc, GEM_RESET, 4, in gem_reset()
610 if (!gem_bitwait(sc, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX, 0)) in gem_reset()
611 device_printf(sc->sc_dev, "cannot reset device\n"); in gem_reset()
615 gem_rxdrain(struct gem_softc *sc) in gem_rxdrain() argument
621 rxs = &sc->sc_rxsoft[i]; in gem_rxdrain()
623 bus_dmamap_sync(sc->sc_rdmatag, rxs->rxs_dmamap, in gem_rxdrain()
625 bus_dmamap_unload(sc->sc_rdmatag, rxs->rxs_dmamap); in gem_rxdrain()
635 struct gem_softc *sc = if_getsoftc(ifp); in gem_stop() local
639 CTR2(KTR_GEM, "%s: %s", device_get_name(sc->sc_dev), __func__); in gem_stop()
642 callout_stop(&sc->sc_tick_ch); in gem_stop()
644 callout_stop(&sc->sc_rx_ch); in gem_stop()
647 gem_reset_tx(sc); in gem_stop()
648 gem_reset_rx(sc); in gem_stop()
653 while ((txs = STAILQ_FIRST(&sc->sc_txdirtyq)) != NULL) { in gem_stop()
654 STAILQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q); in gem_stop()
656 bus_dmamap_sync(sc->sc_tdmatag, txs->txs_dmamap, in gem_stop()
658 bus_dmamap_unload(sc->sc_tdmatag, txs->txs_dmamap); in gem_stop()
664 STAILQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); in gem_stop()
668 gem_rxdrain(sc); in gem_stop()
674 sc->sc_flags &= ~GEM_LINK; in gem_stop()
675 sc->sc_wdog_timer = 0; in gem_stop()
679 gem_reset_rx(struct gem_softc *sc) in gem_reset_rx() argument
686 (void)gem_disable_rx(sc); in gem_reset_rx()
687 GEM_WRITE_4(sc, GEM_RX_CONFIG, 0); in gem_reset_rx()
688 GEM_BARRIER(sc, GEM_RX_CONFIG, 4, in gem_reset_rx()
690 if (!gem_bitwait(sc, GEM_RX_CONFIG, GEM_RX_CONFIG_RXDMA_EN, 0)) in gem_reset_rx()
691 device_printf(sc->sc_dev, "cannot disable RX DMA\n"); in gem_reset_rx()
697 GEM_WRITE_4(sc, GEM_RESET, GEM_RESET_RX); in gem_reset_rx()
698 GEM_BARRIER(sc, GEM_RESET, 4, in gem_reset_rx()
700 if (!gem_bitwait(sc, GEM_RESET, GEM_RESET_RX, 0)) { in gem_reset_rx()
701 device_printf(sc->sc_dev, "cannot reset receiver\n"); in gem_reset_rx()
706 GEM_WRITE_4(sc, GEM_MAC_RXRESET, 1); in gem_reset_rx()
707 GEM_BARRIER(sc, GEM_MAC_RXRESET, 4, in gem_reset_rx()
709 if (!gem_bitwait(sc, GEM_MAC_RXRESET, 1, 0)) { in gem_reset_rx()
710 device_printf(sc->sc_dev, "cannot reset RX MAC\n"); in gem_reset_rx()
725 gem_reset_rxdma(struct gem_softc *sc) in gem_reset_rxdma() argument
729 if (gem_reset_rx(sc) != 0) { in gem_reset_rxdma()
730 if_setdrvflagbits(sc->sc_ifp, 0, IFF_DRV_RUNNING); in gem_reset_rxdma()
731 return (gem_init_locked(sc)); in gem_reset_rxdma()
734 if (sc->sc_rxsoft[i].rxs_mbuf != NULL) in gem_reset_rxdma()
735 GEM_UPDATE_RXDESC(sc, i); in gem_reset_rxdma()
736 sc->sc_rxptr = 0; in gem_reset_rxdma()
737 GEM_CDSYNC(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); in gem_reset_rxdma()
740 GEM_WRITE_4(sc, GEM_RX_RING_PTR_HI, 0); in gem_reset_rxdma()
741 GEM_WRITE_4(sc, GEM_RX_RING_PTR_LO, GEM_CDRXADDR(sc, 0)); in gem_reset_rxdma()
742 GEM_WRITE_4(sc, GEM_RX_KICK, GEM_NRXDESC - 4); in gem_reset_rxdma()
743 GEM_WRITE_4(sc, GEM_RX_CONFIG, in gem_reset_rxdma()
749 GEM_WRITE_4(sc, GEM_RX_BLANKING, in gem_reset_rxdma()
750 ((6 * (sc->sc_flags & GEM_PCI66) != 0 ? 2 : 1) << in gem_reset_rxdma()
752 GEM_WRITE_4(sc, GEM_RX_PAUSE_THRESH, in gem_reset_rxdma()
753 (3 * sc->sc_rxfifosize / 256) | in gem_reset_rxdma()
754 ((sc->sc_rxfifosize / 256) << 12)); in gem_reset_rxdma()
755 GEM_WRITE_4(sc, GEM_RX_CONFIG, in gem_reset_rxdma()
756 GEM_READ_4(sc, GEM_RX_CONFIG) | GEM_RX_CONFIG_RXDMA_EN); in gem_reset_rxdma()
757 GEM_WRITE_4(sc, GEM_MAC_RX_MASK, in gem_reset_rxdma()
763 gem_setladrf(sc); in gem_reset_rxdma()
767 gem_reset_tx(struct gem_softc *sc) in gem_reset_tx() argument
774 (void)gem_disable_tx(sc); in gem_reset_tx()
775 GEM_WRITE_4(sc, GEM_TX_CONFIG, 0); in gem_reset_tx()
776 GEM_BARRIER(sc, GEM_TX_CONFIG, 4, in gem_reset_tx()
778 if (!gem_bitwait(sc, GEM_TX_CONFIG, GEM_TX_CONFIG_TXDMA_EN, 0)) in gem_reset_tx()
779 device_printf(sc->sc_dev, "cannot disable TX DMA\n"); in gem_reset_tx()
785 GEM_WRITE_4(sc, GEM_RESET, GEM_RESET_TX); in gem_reset_tx()
786 GEM_BARRIER(sc, GEM_RESET, 4, in gem_reset_tx()
788 if (!gem_bitwait(sc, GEM_RESET, GEM_RESET_TX, 0)) { in gem_reset_tx()
789 device_printf(sc->sc_dev, "cannot reset transmitter\n"); in gem_reset_tx()
796 gem_disable_rx(struct gem_softc *sc) in gem_disable_rx() argument
799 GEM_WRITE_4(sc, GEM_MAC_RX_CONFIG, in gem_disable_rx()
800 GEM_READ_4(sc, GEM_MAC_RX_CONFIG) & ~GEM_MAC_RX_ENABLE); in gem_disable_rx()
801 GEM_BARRIER(sc, GEM_MAC_RX_CONFIG, 4, in gem_disable_rx()
803 if (gem_bitwait(sc, GEM_MAC_RX_CONFIG, GEM_MAC_RX_ENABLE, 0)) in gem_disable_rx()
805 device_printf(sc->sc_dev, "cannot disable RX MAC\n"); in gem_disable_rx()
810 gem_disable_tx(struct gem_softc *sc) in gem_disable_tx() argument
813 GEM_WRITE_4(sc, GEM_MAC_TX_CONFIG, in gem_disable_tx()
814 GEM_READ_4(sc, GEM_MAC_TX_CONFIG) & ~GEM_MAC_TX_ENABLE); in gem_disable_tx()
815 GEM_BARRIER(sc, GEM_MAC_TX_CONFIG, 4, in gem_disable_tx()
817 if (gem_bitwait(sc, GEM_MAC_TX_CONFIG, GEM_MAC_TX_ENABLE, 0)) in gem_disable_tx()
819 device_printf(sc->sc_dev, "cannot disable TX MAC\n"); in gem_disable_tx()
824 gem_meminit(struct gem_softc *sc) in gem_meminit() argument
829 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_meminit()
835 sc->sc_txdescs[i].gd_flags = 0; in gem_meminit()
836 sc->sc_txdescs[i].gd_addr = 0; in gem_meminit()
838 sc->sc_txfree = GEM_MAXTXFREE; in gem_meminit()
839 sc->sc_txnext = 0; in gem_meminit()
840 sc->sc_txwin = 0; in gem_meminit()
847 rxs = &sc->sc_rxsoft[i]; in gem_meminit()
849 if ((error = gem_add_rxbuf(sc, i)) != 0) { in gem_meminit()
850 device_printf(sc->sc_dev, in gem_meminit()
857 gem_rxdrain(sc); in gem_meminit()
861 GEM_INIT_RXDESC(sc, i); in gem_meminit()
863 sc->sc_rxptr = 0; in gem_meminit()
865 GEM_CDSYNC(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); in gem_meminit()
902 struct gem_softc *sc = xsc; in gem_init() local
904 GEM_LOCK(sc); in gem_init()
905 gem_init_locked(sc); in gem_init()
906 GEM_UNLOCK(sc); in gem_init()
914 gem_init_locked(struct gem_softc *sc) in gem_init_locked() argument
916 if_t ifp = sc->sc_ifp; in gem_init_locked()
919 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_init_locked()
925 CTR2(KTR_GEM, "%s: %s: calling stop", device_get_name(sc->sc_dev), in gem_init_locked()
937 gem_reset(sc); in gem_init_locked()
939 CTR2(KTR_GEM, "%s: %s: restarting", device_get_name(sc->sc_dev), in gem_init_locked()
943 if ((sc->sc_flags & GEM_SERDES) == 0) in gem_init_locked()
945 gem_mifinit(sc); in gem_init_locked()
948 if (gem_meminit(sc) != 0) in gem_init_locked()
952 gem_init_regs(sc); in gem_init_locked()
958 GEM_WRITE_4(sc, GEM_TX_RING_PTR_HI, 0); in gem_init_locked()
959 GEM_WRITE_4(sc, GEM_TX_RING_PTR_LO, GEM_CDTXADDR(sc, 0)); in gem_init_locked()
961 GEM_WRITE_4(sc, GEM_RX_RING_PTR_HI, 0); in gem_init_locked()
962 GEM_WRITE_4(sc, GEM_RX_RING_PTR_LO, GEM_CDRXADDR(sc, 0)); in gem_init_locked()
965 GEM_CDRXADDR(sc, 0), GEM_CDTXADDR(sc, 0), sc->sc_cddma); in gem_init_locked()
977 GEM_WRITE_4(sc, GEM_CONFIG, in gem_init_locked()
979 GEM_CONFIG_BURST_INF | (GEM_IS_APPLE(sc) ? in gem_init_locked()
982 GEM_WRITE_4(sc, GEM_INTMASK, in gem_init_locked()
990 GEM_WRITE_4(sc, GEM_MAC_RX_MASK, in gem_init_locked()
992 GEM_WRITE_4(sc, GEM_MAC_TX_MASK, in gem_init_locked()
996 GEM_WRITE_4(sc, GEM_MAC_CONTROL_MASK, in gem_init_locked()
999 GEM_WRITE_4(sc, GEM_MAC_CONTROL_MASK, in gem_init_locked()
1009 GEM_WRITE_4(sc, GEM_TX_CONFIG, v | GEM_TX_CONFIG_TXDMA_EN); in gem_init_locked()
1019 GEM_WRITE_4(sc, GEM_RX_CONFIG, in gem_init_locked()
1024 GEM_WRITE_4(sc, GEM_RX_BLANKING, in gem_init_locked()
1025 ((6 * (sc->sc_flags & GEM_PCI66) != 0 ? 2 : 1) << in gem_init_locked()
1032 GEM_WRITE_4(sc, GEM_RX_PAUSE_THRESH, in gem_init_locked()
1033 (3 * sc->sc_rxfifosize / 256) | in gem_init_locked()
1034 ((sc->sc_rxfifosize / 256) << 12)); in gem_init_locked()
1039 v = GEM_READ_4(sc, GEM_MAC_RX_CONFIG); in gem_init_locked()
1042 sc->sc_mac_rxcfg = v; in gem_init_locked()
1047 gem_setladrf(sc); in gem_init_locked()
1050 v = GEM_READ_4(sc, GEM_MAC_TX_CONFIG); in gem_init_locked()
1052 (void)gem_disable_tx(sc); in gem_init_locked()
1053 GEM_WRITE_4(sc, GEM_MAC_TX_CONFIG, v); in gem_init_locked()
1058 GEM_WRITE_4(sc, GEM_RX_KICK, GEM_NRXDESC - 4); in gem_init_locked()
1063 mii_mediachg(sc->sc_mii); in gem_init_locked()
1066 sc->sc_wdog_timer = 0; in gem_init_locked()
1067 callout_reset(&sc->sc_tick_ch, hz, gem_tick, sc); in gem_init_locked()
1071 gem_load_txmbuf(struct gem_softc *sc, struct mbuf **m_head) in gem_load_txmbuf() argument
1080 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_load_txmbuf()
1083 if ((txs = STAILQ_FIRST(&sc->sc_txfreeq)) == NULL) { in gem_load_txmbuf()
1089 if (((*m_head)->m_pkthdr.csum_flags & sc->sc_csum_features) != 0) { in gem_load_txmbuf()
1111 error = bus_dmamap_load_mbuf_sg(sc->sc_tdmatag, txs->txs_dmamap, in gem_load_txmbuf()
1121 error = bus_dmamap_load_mbuf_sg(sc->sc_tdmatag, in gem_load_txmbuf()
1146 if (nsegs > sc->sc_txfree - 1) { in gem_load_txmbuf()
1148 bus_dmamap_unload(sc->sc_tdmatag, txs->txs_dmamap); in gem_load_txmbuf()
1153 txs->txs_firstdesc = sc->sc_txnext; in gem_load_txmbuf()
1162 sc->sc_txdescs[nexttx].gd_addr = htole64(txsegs[seg].ds_addr); in gem_load_txmbuf()
1166 sc->sc_txdescs[nexttx].gd_flags = htole64(flags | cflags); in gem_load_txmbuf()
1175 sc->sc_txdescs[txs->txs_lastdesc].gd_flags |= in gem_load_txmbuf()
1183 if (++sc->sc_txwin > GEM_NTXSEGS * 2 / 3) { in gem_load_txmbuf()
1184 sc->sc_txwin = 0; in gem_load_txmbuf()
1185 sc->sc_txdescs[txs->txs_firstdesc].gd_flags |= in gem_load_txmbuf()
1188 sc->sc_txdescs[txs->txs_firstdesc].gd_flags |= in gem_load_txmbuf()
1192 bus_dmamap_sync(sc->sc_tdmatag, txs->txs_dmamap, in gem_load_txmbuf()
1200 STAILQ_REMOVE_HEAD(&sc->sc_txfreeq, txs_q); in gem_load_txmbuf()
1201 STAILQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); in gem_load_txmbuf()
1204 sc->sc_txnext = GEM_NEXTTX(txs->txs_lastdesc); in gem_load_txmbuf()
1205 sc->sc_txfree -= txs->txs_ndescs; in gem_load_txmbuf()
1211 gem_init_regs(struct gem_softc *sc) in gem_init_regs() argument
1213 const u_char *laddr = if_getlladdr(sc->sc_ifp); in gem_init_regs()
1215 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_init_regs()
1218 if ((sc->sc_flags & GEM_INITED) == 0) { in gem_init_regs()
1220 GEM_WRITE_4(sc, GEM_MAC_IPG0, 0); in gem_init_regs()
1221 GEM_WRITE_4(sc, GEM_MAC_IPG1, 8); in gem_init_regs()
1222 GEM_WRITE_4(sc, GEM_MAC_IPG2, 4); in gem_init_regs()
1225 GEM_WRITE_4(sc, GEM_MAC_MAC_MIN_FRAME, ETHER_MIN_LEN); in gem_init_regs()
1227 GEM_WRITE_4(sc, GEM_MAC_MAC_MAX_FRAME, in gem_init_regs()
1231 GEM_WRITE_4(sc, GEM_MAC_PREAMBLE_LEN, 0x7); in gem_init_regs()
1232 GEM_WRITE_4(sc, GEM_MAC_JAM_SIZE, 0x4); in gem_init_regs()
1233 GEM_WRITE_4(sc, GEM_MAC_ATTEMPT_LIMIT, 0x10); in gem_init_regs()
1234 GEM_WRITE_4(sc, GEM_MAC_CONTROL_TYPE, 0x8808); in gem_init_regs()
1237 GEM_WRITE_4(sc, GEM_MAC_RANDOM_SEED, in gem_init_regs()
1241 GEM_WRITE_4(sc, GEM_MAC_ADDR3, 0); in gem_init_regs()
1242 GEM_WRITE_4(sc, GEM_MAC_ADDR4, 0); in gem_init_regs()
1243 GEM_WRITE_4(sc, GEM_MAC_ADDR5, 0); in gem_init_regs()
1246 GEM_WRITE_4(sc, GEM_MAC_ADDR6, 0x0001); in gem_init_regs()
1247 GEM_WRITE_4(sc, GEM_MAC_ADDR7, 0xc200); in gem_init_regs()
1248 GEM_WRITE_4(sc, GEM_MAC_ADDR8, 0x0180); in gem_init_regs()
1251 GEM_WRITE_4(sc, GEM_MAC_ADDR_FILTER0, 0); in gem_init_regs()
1252 GEM_WRITE_4(sc, GEM_MAC_ADDR_FILTER1, 0); in gem_init_regs()
1253 GEM_WRITE_4(sc, GEM_MAC_ADDR_FILTER2, 0); in gem_init_regs()
1254 GEM_WRITE_4(sc, GEM_MAC_ADR_FLT_MASK1_2, 0); in gem_init_regs()
1255 GEM_WRITE_4(sc, GEM_MAC_ADR_FLT_MASK0, 0); in gem_init_regs()
1257 sc->sc_flags |= GEM_INITED; in gem_init_regs()
1261 GEM_WRITE_4(sc, GEM_MAC_NORM_COLL_CNT, 0); in gem_init_regs()
1262 GEM_WRITE_4(sc, GEM_MAC_FIRST_COLL_CNT, 0); in gem_init_regs()
1263 GEM_WRITE_4(sc, GEM_MAC_EXCESS_COLL_CNT, 0); in gem_init_regs()
1264 GEM_WRITE_4(sc, GEM_MAC_LATE_COLL_CNT, 0); in gem_init_regs()
1265 GEM_WRITE_4(sc, GEM_MAC_DEFER_TMR_CNT, 0); in gem_init_regs()
1266 GEM_WRITE_4(sc, GEM_MAC_PEAK_ATTEMPTS, 0); in gem_init_regs()
1267 GEM_WRITE_4(sc, GEM_MAC_RX_FRAME_COUNT, 0); in gem_init_regs()
1268 GEM_WRITE_4(sc, GEM_MAC_RX_LEN_ERR_CNT, 0); in gem_init_regs()
1269 GEM_WRITE_4(sc, GEM_MAC_RX_ALIGN_ERR, 0); in gem_init_regs()
1270 GEM_WRITE_4(sc, GEM_MAC_RX_CRC_ERR_CNT, 0); in gem_init_regs()
1271 GEM_WRITE_4(sc, GEM_MAC_RX_CODE_VIOL, 0); in gem_init_regs()
1274 GEM_WRITE_4(sc, GEM_MAC_SEND_PAUSE_CMD, 0x1BF0); in gem_init_regs()
1277 GEM_WRITE_4(sc, GEM_MAC_ADDR0, (laddr[4] << 8) | laddr[5]); in gem_init_regs()
1278 GEM_WRITE_4(sc, GEM_MAC_ADDR1, (laddr[2] << 8) | laddr[3]); in gem_init_regs()
1279 GEM_WRITE_4(sc, GEM_MAC_ADDR2, (laddr[0] << 8) | laddr[1]); in gem_init_regs()
1282 GEM_WRITE_4(sc, GEM_MAC_XIF_CONFIG, GEM_MAC_XIF_TX_MII_ENA); in gem_init_regs()
1288 struct gem_softc *sc = if_getsoftc(ifp); in gem_start() local
1290 GEM_LOCK(sc); in gem_start()
1292 GEM_UNLOCK(sc); in gem_start()
1296 gem_txkick(struct gem_softc *sc) in gem_txkick() argument
1307 device_get_name(sc->sc_dev), __func__, sc->sc_txnext); in gem_txkick()
1309 GEM_CDSYNC(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); in gem_txkick()
1310 GEM_WRITE_4(sc, GEM_TX_KICK, sc->sc_txnext); in gem_txkick()
1316 struct gem_softc *sc = if_getsoftc(ifp); in gem_start_locked() local
1320 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_start_locked()
1323 IFF_DRV_RUNNING || (sc->sc_flags & GEM_LINK) == 0) in gem_start_locked()
1328 device_get_name(sc->sc_dev), __func__, sc->sc_txfree, in gem_start_locked()
1329 sc->sc_txnext); in gem_start_locked()
1333 for (; !if_sendq_empty(ifp) && sc->sc_txfree > 1;) { in gem_start_locked()
1337 if (gem_load_txmbuf(sc, &m) != 0) { in gem_start_locked()
1344 if ((sc->sc_txnext % 4) == 0) { in gem_start_locked()
1345 gem_txkick(sc); in gem_start_locked()
1355 gem_txkick(sc); in gem_start_locked()
1358 device_get_name(sc->sc_dev), sc->sc_txnext); in gem_start_locked()
1362 sc->sc_wdog_timer = 5; in gem_start_locked()
1365 device_get_name(sc->sc_dev), __func__, in gem_start_locked()
1366 sc->sc_wdog_timer); in gem_start_locked()
1372 gem_tint(struct gem_softc *sc) in gem_tint() argument
1374 if_t ifp = sc->sc_ifp; in gem_tint()
1381 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_tint()
1383 CTR2(KTR_GEM, "%s: %s", device_get_name(sc->sc_dev), __func__); in gem_tint()
1391 GEM_CDSYNC(sc, BUS_DMASYNC_POSTREAD); in gem_tint()
1392 while ((txs = STAILQ_FIRST(&sc->sc_txdirtyq)) != NULL) { in gem_tint()
1400 sc->sc_txdescs[i].gd_flags)); in gem_tint()
1403 sc->sc_txdescs[i].gd_addr)); in gem_tint()
1417 txlast = GEM_READ_4(sc, GEM_TX_COMPLETION); in gem_tint()
1437 STAILQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q); in gem_tint()
1439 sc->sc_txfree += txs->txs_ndescs; in gem_tint()
1441 bus_dmamap_sync(sc->sc_tdmatag, txs->txs_dmamap, in gem_tint()
1443 bus_dmamap_unload(sc->sc_tdmatag, txs->txs_dmamap); in gem_tint()
1449 STAILQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); in gem_tint()
1458 __func__, GEM_READ_4(sc, GEM_TX_STATE_MACHINE), in gem_tint()
1459 ((long long)GEM_READ_4(sc, GEM_TX_DATA_PTR_HI) << 32) | in gem_tint()
1460 GEM_READ_4(sc, GEM_TX_DATA_PTR_LO), in gem_tint()
1461 GEM_READ_4(sc, GEM_TX_COMPLETION)); in gem_tint()
1465 if (sc->sc_txfree == GEM_NTXDESC - 1) in gem_tint()
1466 sc->sc_txwin = 0; in gem_tint()
1473 if (STAILQ_EMPTY(&sc->sc_txdirtyq)) in gem_tint()
1474 sc->sc_wdog_timer = 0; in gem_tint()
1480 device_get_name(sc->sc_dev), __func__, sc->sc_wdog_timer); in gem_tint()
1488 struct gem_softc *sc = arg; in gem_rint_timeout() local
1490 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_rint_timeout()
1492 gem_rint(sc); in gem_rint_timeout()
1497 gem_rint(struct gem_softc *sc) in gem_rint() argument
1499 if_t ifp = sc->sc_ifp; in gem_rint()
1504 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_rint()
1507 callout_stop(&sc->sc_rx_ch); in gem_rint()
1510 CTR2(KTR_GEM, "%s: %s", device_get_name(sc->sc_dev), __func__); in gem_rint()
1517 rxcomp = GEM_READ_4(sc, GEM_RX_COMPLETION); in gem_rint()
1520 __func__, sc->sc_rxptr, rxcomp); in gem_rint()
1522 GEM_CDSYNC(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); in gem_rint()
1523 for (; sc->sc_rxptr != rxcomp;) { in gem_rint()
1524 m = sc->sc_rxsoft[sc->sc_rxptr].rxs_mbuf; in gem_rint()
1525 rxstat = le64toh(sc->sc_rxdescs[sc->sc_rxptr].gd_flags); in gem_rint()
1537 callout_reset(&sc->sc_rx_ch, GEM_RXOWN_TICKS, in gem_rint()
1538 gem_rint_timeout, sc); in gem_rint()
1546 device_printf(sc->sc_dev, "receive error: CRC error\n"); in gem_rint()
1547 GEM_INIT_RXDESC(sc, sc->sc_rxptr); in gem_rint()
1555 &sc->sc_rxsoft[sc->sc_rxptr], sc->sc_rxptr); in gem_rint()
1558 sc->sc_rxdescs[sc->sc_rxptr].gd_flags)); in gem_rint()
1561 sc->sc_rxdescs[sc->sc_rxptr].gd_addr)); in gem_rint()
1570 if (gem_add_rxbuf(sc, sc->sc_rxptr) != 0) { in gem_rint()
1572 GEM_INIT_RXDESC(sc, sc->sc_rxptr); in gem_rint()
1584 sc->sc_rxptr = GEM_NEXTRX(sc->sc_rxptr); in gem_rint()
1585 if ((sc->sc_rxptr % 4) == 0) { in gem_rint()
1586 GEM_CDSYNC(sc, in gem_rint()
1588 GEM_WRITE_4(sc, GEM_RX_KICK, in gem_rint()
1589 (sc->sc_rxptr + GEM_NRXDESC - 4) & in gem_rint()
1608 GEM_UNLOCK(sc); in gem_rint()
1610 GEM_LOCK(sc); in gem_rint()
1615 sc->sc_rxptr, GEM_READ_4(sc, GEM_RX_COMPLETION)); in gem_rint()
1620 gem_add_rxbuf(struct gem_softc *sc, int idx) in gem_add_rxbuf() argument
1622 struct gem_rxsoft *rxs = &sc->sc_rxsoft[idx]; in gem_add_rxbuf()
1627 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_add_rxbuf()
1640 bus_dmamap_sync(sc->sc_rdmatag, rxs->rxs_dmamap, in gem_add_rxbuf()
1642 bus_dmamap_unload(sc->sc_rdmatag, rxs->rxs_dmamap); in gem_add_rxbuf()
1645 error = bus_dmamap_load_mbuf_sg(sc->sc_rdmatag, rxs->rxs_dmamap, in gem_add_rxbuf()
1648 device_printf(sc->sc_dev, in gem_add_rxbuf()
1659 bus_dmamap_sync(sc->sc_rdmatag, rxs->rxs_dmamap, in gem_add_rxbuf()
1662 GEM_INIT_RXDESC(sc, idx); in gem_add_rxbuf()
1668 gem_eint(struct gem_softc *sc, u_int status) in gem_eint() argument
1671 if_inc_counter(sc->sc_ifp, IFCOUNTER_IERRORS, 1); in gem_eint()
1673 gem_reset_rxdma(sc); in gem_eint()
1677 device_printf(sc->sc_dev, "%s: status 0x%x", __func__, status); in gem_eint()
1680 GEM_READ_4(sc, GEM_PCI_ERROR_STATUS)); in gem_eint()
1688 struct gem_softc *sc = v; in gem_intr() local
1691 GEM_LOCK(sc); in gem_intr()
1692 status = GEM_READ_4(sc, GEM_STATUS); in gem_intr()
1696 device_get_name(sc->sc_dev), __func__, in gem_intr()
1704 GEM_READ_4(sc, GEM_MII_INTERRUP_STATUS) | in gem_intr()
1705 GEM_READ_4(sc, GEM_MII_INTERRUP_STATUS); in gem_intr()
1707 device_printf(sc->sc_dev, in gem_intr()
1711 status2 = GEM_READ_4(sc, GEM_MAC_CONTROL_STATUS); in gem_intr()
1713 device_printf(sc->sc_dev, in gem_intr()
1717 device_printf(sc->sc_dev, in gem_intr()
1720 device_printf(sc->sc_dev, in gem_intr()
1724 device_printf(sc->sc_dev, "%s: MIF interrupt\n", __func__); in gem_intr()
1729 gem_eint(sc, status); in gem_intr()
1732 gem_rint(sc); in gem_intr()
1735 gem_tint(sc); in gem_intr()
1738 status2 = GEM_READ_4(sc, GEM_MAC_TX_STATUS); in gem_intr()
1742 device_printf(sc->sc_dev, in gem_intr()
1746 if_inc_counter(sc->sc_ifp, IFCOUNTER_OERRORS, 1); in gem_intr()
1747 if_setdrvflagbits(sc->sc_ifp, 0, IFF_DRV_RUNNING); in gem_intr()
1748 gem_init_locked(sc); in gem_intr()
1752 status2 = GEM_READ_4(sc, GEM_MAC_RX_STATUS); in gem_intr()
1760 if_inc_counter(sc->sc_ifp, IFCOUNTER_IERRORS, 1); in gem_intr()
1761 gem_reset_rxdma(sc); in gem_intr()
1764 device_printf(sc->sc_dev, in gem_intr()
1767 GEM_UNLOCK(sc); in gem_intr()
1771 gem_watchdog(struct gem_softc *sc) in gem_watchdog() argument
1773 if_t ifp = sc->sc_ifp; in gem_watchdog()
1775 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_watchdog()
1780 __func__, GEM_READ_4(sc, GEM_RX_CONFIG), in gem_watchdog()
1781 GEM_READ_4(sc, GEM_MAC_RX_STATUS), in gem_watchdog()
1782 GEM_READ_4(sc, GEM_MAC_RX_CONFIG)); in gem_watchdog()
1785 __func__, GEM_READ_4(sc, GEM_TX_CONFIG), in gem_watchdog()
1786 GEM_READ_4(sc, GEM_MAC_TX_STATUS), in gem_watchdog()
1787 GEM_READ_4(sc, GEM_MAC_TX_CONFIG)); in gem_watchdog()
1790 if (sc->sc_wdog_timer == 0 || --sc->sc_wdog_timer != 0) in gem_watchdog()
1793 if ((sc->sc_flags & GEM_LINK) != 0) in gem_watchdog()
1794 device_printf(sc->sc_dev, "device timeout\n"); in gem_watchdog()
1796 device_printf(sc->sc_dev, "device timeout (no link)\n"); in gem_watchdog()
1801 gem_init_locked(sc); in gem_watchdog()
1807 gem_mifinit(struct gem_softc *sc) in gem_mifinit() argument
1811 GEM_WRITE_4(sc, GEM_MIF_CONFIG, in gem_mifinit()
1812 GEM_READ_4(sc, GEM_MIF_CONFIG) & ~GEM_MIF_CONFIG_BB_ENA); in gem_mifinit()
1813 GEM_BARRIER(sc, GEM_MIF_CONFIG, 4, in gem_mifinit()
1834 struct gem_softc *sc; in gem_mii_readreg() local
1842 sc = device_get_softc(dev); in gem_mii_readreg()
1843 if ((sc->sc_flags & GEM_SERDES) != 0) { in gem_mii_readreg()
1863 device_printf(sc->sc_dev, in gem_mii_readreg()
1867 return (GEM_READ_4(sc, reg)); in gem_mii_readreg()
1875 GEM_WRITE_4(sc, GEM_MIF_FRAME, v); in gem_mii_readreg()
1876 GEM_BARRIER(sc, GEM_MIF_FRAME, 4, in gem_mii_readreg()
1880 v = GEM_READ_4(sc, GEM_MIF_FRAME); in gem_mii_readreg()
1885 device_printf(sc->sc_dev, "%s: timed out\n", __func__); in gem_mii_readreg()
1892 struct gem_softc *sc; in gem_mii_writereg() local
1900 sc = device_get_softc(dev); in gem_mii_writereg()
1901 if ((sc->sc_flags & GEM_SERDES) != 0) { in gem_mii_writereg()
1910 GEM_WRITE_4(sc, GEM_MII_CONTROL, val); in gem_mii_writereg()
1911 GEM_BARRIER(sc, GEM_MII_CONTROL, 4, in gem_mii_writereg()
1913 if (!gem_bitwait(sc, GEM_MII_CONTROL, in gem_mii_writereg()
1915 device_printf(sc->sc_dev, in gem_mii_writereg()
1919 GEM_WRITE_4(sc, GEM_MII_CONFIG, 0); in gem_mii_writereg()
1920 GEM_BARRIER(sc, GEM_MII_CONFIG, 4, in gem_mii_writereg()
1922 GEM_WRITE_4(sc, GEM_MII_ANAR, val); in gem_mii_writereg()
1923 GEM_BARRIER(sc, GEM_MII_ANAR, 4, in gem_mii_writereg()
1925 GEM_WRITE_4(sc, GEM_MII_SLINK_CONTROL, in gem_mii_writereg()
1927 GEM_BARRIER(sc, GEM_MII_SLINK_CONTROL, 4, in gem_mii_writereg()
1929 GEM_WRITE_4(sc, GEM_MII_CONFIG, in gem_mii_writereg()
1931 GEM_BARRIER(sc, GEM_MII_CONFIG, 4, in gem_mii_writereg()
1938 device_printf(sc->sc_dev, in gem_mii_writereg()
1942 GEM_WRITE_4(sc, reg, val); in gem_mii_writereg()
1943 GEM_BARRIER(sc, reg, 4, in gem_mii_writereg()
1954 GEM_WRITE_4(sc, GEM_MIF_FRAME, v); in gem_mii_writereg()
1955 GEM_BARRIER(sc, GEM_MIF_FRAME, 4, in gem_mii_writereg()
1959 v = GEM_READ_4(sc, GEM_MIF_FRAME); in gem_mii_writereg()
1964 device_printf(sc->sc_dev, "%s: timed out\n", __func__); in gem_mii_writereg()
1971 struct gem_softc *sc; in gem_mii_statchg() local
1975 sc = device_get_softc(dev); in gem_mii_statchg()
1977 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_mii_statchg()
1980 if ((sc->sc_if_getflags(ifp) & IFF_DEBUG) != 0) in gem_mii_statchg()
1981 device_printf(sc->sc_dev, "%s: status change\n", __func__); in gem_mii_statchg()
1984 if ((sc->sc_mii->mii_media_status & IFM_ACTIVE) != 0 && in gem_mii_statchg()
1985 IFM_SUBTYPE(sc->sc_mii->mii_media_active) != IFM_NONE) in gem_mii_statchg()
1986 sc->sc_flags |= GEM_LINK; in gem_mii_statchg()
1988 sc->sc_flags &= ~GEM_LINK; in gem_mii_statchg()
1990 switch (IFM_SUBTYPE(sc->sc_mii->mii_media_active)) { in gem_mii_statchg()
2008 rxcfg = sc->sc_mac_rxcfg; in gem_mii_statchg()
2011 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & IFM_FDX) != 0) in gem_mii_statchg()
2017 (void)gem_disable_tx(sc); in gem_mii_statchg()
2018 GEM_WRITE_4(sc, GEM_MAC_TX_CONFIG, txcfg); in gem_mii_statchg()
2019 (void)gem_disable_rx(sc); in gem_mii_statchg()
2020 GEM_WRITE_4(sc, GEM_MAC_RX_CONFIG, rxcfg); in gem_mii_statchg()
2022 v = GEM_READ_4(sc, GEM_MAC_CONTROL_CONFIG) & in gem_mii_statchg()
2024 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & in gem_mii_statchg()
2027 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & in gem_mii_statchg()
2030 GEM_WRITE_4(sc, GEM_MAC_CONTROL_CONFIG, v); in gem_mii_statchg()
2032 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & IFM_FDX) == 0 && in gem_mii_statchg()
2034 GEM_WRITE_4(sc, GEM_MAC_SLOT_TIME, in gem_mii_statchg()
2037 GEM_WRITE_4(sc, GEM_MAC_SLOT_TIME, in gem_mii_statchg()
2043 if ((sc->sc_flags & GEM_SERDES) == 0) { in gem_mii_statchg()
2044 if ((GEM_READ_4(sc, GEM_MIF_CONFIG) & in gem_mii_statchg()
2047 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & in gem_mii_statchg()
2060 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & IFM_FDX) != 0) in gem_mii_statchg()
2062 GEM_WRITE_4(sc, GEM_MAC_XIF_CONFIG, v); in gem_mii_statchg()
2064 sc->sc_mac_rxcfg = rxcfg; in gem_mii_statchg()
2065 if ((if_getdrvflags(sc->sc_ifp) & IFF_DRV_RUNNING) != 0 && in gem_mii_statchg()
2066 (sc->sc_flags & GEM_LINK) != 0) { in gem_mii_statchg()
2067 GEM_WRITE_4(sc, GEM_MAC_TX_CONFIG, in gem_mii_statchg()
2069 GEM_WRITE_4(sc, GEM_MAC_RX_CONFIG, in gem_mii_statchg()
2077 struct gem_softc *sc = if_getsoftc(ifp); in gem_mediachange() local
2082 GEM_LOCK(sc); in gem_mediachange()
2083 error = mii_mediachg(sc->sc_mii); in gem_mediachange()
2084 GEM_UNLOCK(sc); in gem_mediachange()
2091 struct gem_softc *sc = if_getsoftc(ifp); in gem_mediastatus() local
2093 GEM_LOCK(sc); in gem_mediastatus()
2095 GEM_UNLOCK(sc); in gem_mediastatus()
2099 mii_pollstat(sc->sc_mii); in gem_mediastatus()
2100 ifmr->ifm_active = sc->sc_mii->mii_media_active; in gem_mediastatus()
2101 ifmr->ifm_status = sc->sc_mii->mii_media_status; in gem_mediastatus()
2102 GEM_UNLOCK(sc); in gem_mediastatus()
2108 struct gem_softc *sc = if_getsoftc(ifp); in gem_ioctl() local
2115 GEM_LOCK(sc); in gem_ioctl()
2118 ((if_getflags(ifp) ^ sc->sc_ifflags) & in gem_ioctl()
2120 gem_setladrf(sc); in gem_ioctl()
2122 gem_init_locked(sc); in gem_ioctl()
2126 sc->sc_csum_features |= CSUM_UDP; in gem_ioctl()
2128 sc->sc_csum_features &= ~CSUM_UDP; in gem_ioctl()
2130 if_sethwassist(ifp, sc->sc_csum_features); in gem_ioctl()
2131 sc->sc_ifflags = if_getflags(ifp); in gem_ioctl()
2132 GEM_UNLOCK(sc); in gem_ioctl()
2136 GEM_LOCK(sc); in gem_ioctl()
2138 gem_setladrf(sc); in gem_ioctl()
2139 GEM_UNLOCK(sc); in gem_ioctl()
2143 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii->mii_media, cmd); in gem_ioctl()
2146 GEM_LOCK(sc); in gem_ioctl()
2149 if_sethwassist(ifp, sc->sc_csum_features); in gem_ioctl()
2152 GEM_UNLOCK(sc); in gem_ioctl()
2177 gem_setladrf(struct gem_softc *sc) in gem_setladrf() argument
2179 if_t ifp = sc->sc_ifp; in gem_setladrf()
2184 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_setladrf()
2190 v = sc->sc_mac_rxcfg & ~GEM_MAC_RX_HASH_FILTER; in gem_setladrf()
2191 GEM_WRITE_4(sc, GEM_MAC_RX_CONFIG, v); in gem_setladrf()
2192 GEM_BARRIER(sc, GEM_MAC_RX_CONFIG, 4, in gem_setladrf()
2194 if (!gem_bitwait(sc, GEM_MAC_RX_CONFIG, GEM_MAC_RX_HASH_FILTER | in gem_setladrf()
2196 device_printf(sc->sc_dev, in gem_setladrf()
2225 GEM_WRITE_4(sc, in gem_setladrf()
2230 sc->sc_mac_rxcfg = v; in gem_setladrf()
2231 GEM_WRITE_4(sc, GEM_MAC_RX_CONFIG, v | GEM_MAC_RX_ENABLE); in gem_setladrf()