| /linux/drivers/staging/axis-fifo/ |
| H A D | axis-fifo.txt | 1 Xilinx AXI-Stream FIFO v4.1 IP core
3 This IP core has read and write AXI-Stream FIFOs, the contents of which can
4 be accessed from the AXI4 memory-mapped interface. This is useful for
11 Currently supports only store-forward mode with a 32-bit
12 AXI4-Lite interface. DOES NOT support:
13 - cut-through mode
14 - AXI4 (non-lite)
17 - compatible: Should be one of:
18 "xlnx,axi-fifo-mm-s-4.1"
19 "xlnx,axi-fifo-mm-s-4.2"
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| /linux/Documentation/devicetree/bindings/serial/ |
| H A D | st,stm32-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Erwan Le Ray <erwan.leray@foss.st.com>
15 - st,stm32-uart
16 - st,stm32f7-uart
17 - st,stm32h7-uart
34 st,hw-flow-ctrl:
38 rx-tx-swap: true
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| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | snps,dwc3-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 vendor-specific implementation or as a standalone component.
17 - $ref: usb-drd.yaml#
18 - if:
24 - dr_mode
28 $ref: usb-xhci.yaml#
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| /linux/drivers/net/wireless/broadcom/b43/ |
| H A D | phy_n.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 /* N-PHY registers. */
15 #define B43_NPHY_TXERR B43_PHY_N(0x007) /* TX error */
18 #define B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */
19 #define B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */
20 #define B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */
21 #define B43_NPHY_BIST_STAT0 B43_PHY_N(0x00E) /* Built-in self test status 0 */
22 #define B43_NPHY_BIST_STAT1 B43_PHY_N(0x00F) /* Built-in self test status 1 */
58 #define B43_NPHY_C1_INITGAIN_TRTX 0x2000 /* TR TX index */
70 #define B43_NPHY_C1_CLIPWBTHRES B43_PHY_N(0x027) /* Core 1 clip wideband threshold */
[all …]
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| /linux/sound/soc/ti/ |
| H A D | omap-mcbsp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap-mcbsp.c -- OMAP ALSA SoC DAI driver using McBSP port
23 #include "omap-mcbsp-priv.h"
24 #include "omap-mcbs
240 omap_mcbsp_set_tx_threshold(struct omap_mcbsp * mcbsp,u16 threshold) omap_mcbsp_set_tx_threshold() argument
251 omap_mcbsp_set_rx_threshold(struct omap_mcbsp * mcbsp,u16 threshold) omap_mcbsp_set_rx_threshold() argument
277 u16 buffstat, threshold; omap_mcbsp_get_rx_delay() local
416 int tx = (stream == SNDRV_PCM_STREAM_PLAYBACK); omap_mcbsp_start() local
475 int tx = (stream == SNDRV_PCM_STREAM_PLAYBACK); omap_mcbsp_stop() local
819 int tx = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); omap_mcbsp_dai_shutdown() local
842 int tx = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); omap_mcbsp_dai_prepare() local
[all...] |
| H A D | omap-mcpdm.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port
5 * Copyright (C) 2009 - 2011 Texas Instruments
29 #include "omap-mcpdm.h"
30 #include "sdma-pcm.h"
34 u32 threshold; /* FIFO threshold */ member
68 writel_relaxed(val, mcpdm->io_base + reg); in omap_mcpdm_write()
73 return readl_relaxed(mcpdm->io_base + reg); in omap_mcpdm_read()
79 dev_dbg(mcpdm->dev, "***********************\n"); in omap_mcpdm_reg_dump()
80 dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n", in omap_mcpdm_reg_dump()
[all …]
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| /linux/drivers/net/wireless/ralink/rt2x00/ |
| H A D | rt2500pci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
36 * Default offset is required for RSSI <-> dBm conversion.
53 * Number of TX queues.
122 * TXDONE_TXRING: Tx ring transmit done interrupt.
128 * UART1_TX_TRESHOLD: UART1 TX reaches threshold.
129 * UART1_RX_TRESHOLD: UART1 RX reaches threshold.
130 * UART1_IDLE_TRESHOLD: UART1 IDLE over threshold.
131 * UART1_TX_BUFF_ERROR: UART1 TX buffer error.
133 * UART2_TX_TRESHOLD: UART2 TX reaches threshold.
[all …]
|
| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-net-queues | 1 What: /sys/class/net/<iface>/queues/rx-<queue>/rps_cpus
11 What: /sys/class/net/<iface>/queues/rx-<queue>/rps_flow_cnt
19 What: /sys/class/net/<iface>/queues/tx-<queue>/tx_timeout
27 What: /sys/class/net/<iface>/queues/tx-<queue>/tx_maxrate
32 A Mbps max-rate set for the queue, a value of zero means disabled,
35 What: /sys/class/net/<iface>/queues/tx-<queue>/xps_cpus
45 What: /sys/class/net/<iface>/queues/tx-<queue>/xps_rxqs
56 What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/hold_time
65 What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/inflight
73 What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/limit
[all …]
|
| /linux/Documentation/networking/devlink/ |
| H A D | mlx5.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 .. list-table:: Generic parameters implemented
15 * - Name
16 - Mode
17 - Validation
18 - Notes
19 * - ``enable_roce``
20 - driverinit
21 - Boolean
22 - If the device supports RoCE disablement, RoCE enablement state controls
[all …]
|
| /linux/sound/soc/tegra/ |
| H A D | tegra186_asrc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 // SPDX-FileCopyrightText: Copyright (c) 2022-2025 NVIDIA CORPORATION. All rights reserved.
4 // tegra186_asrc.c - Tegra186 ASRC driver
71 regmap_write(asrc->regmap, in tegra186_asrc_lock_stream()
81 regcache_cache_only(asrc->regmap, true); in tegra186_asrc_runtime_suspend()
82 regcache_mark_dirty(asrc->regmap); in tegra186_asrc_runtime_suspend()
92 regcache_cache_only(asrc->regmap, false); in tegra186_asrc_runtime_resume()
99 regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_SCRATCH_ADDR, in tegra186_asrc_runtime_resume()
100 asrc->soc_data->aram_start_addr); in tegra186_asrc_runtime_resume()
101 regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_ENB, in tegra186_asrc_runtime_resume()
[all …]
|
| /linux/drivers/net/wireless/intel/iwlwifi/ |
| H A D | iwl-config.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
4 * Copyright (C) 2016-2017 Intel Deutschland GmbH
5 * Copyright (C) 2018-2026 Intel Corporation
16 #include "iwl-csr.h"
17 #include "iwl-drv.h"
62 * enum iwl_nvm_type - nvm formats
74 * This is the threshold value of plcp error rate per 100mSecs. It is
84 /* TX queue watchdog timeouts in mSecs */
107 MODULE_FIRMWARE(pfx "-" __stringify(api) ".ucode"); \
[all …]
|
| /linux/drivers/net/ethernet/intel/igb/ |
| H A D | e1000_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
7 #define E1000_CTRL 0x00000 /* Device Control - RW */
8 #define E1000_STATUS 0x00008 /* Device Status - RO */
9 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
10 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
11 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
12 #define E1000_MDIC 0x00020 /* MDI Control - RW */
13 #define E1000_MDICNFG 0x00E04 /* MDI Config - RW */
14 #define E1000_SCTL 0x00024 /* SerDes Control - RW */
[all …]
|
| /linux/tools/testing/selftests/vfio/lib/drivers/igb/ |
| H A D | e1000_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
7 #define E1000_CTRL 0x00000 /* Device Control - RW */
8 #define E1000_STATUS 0x00008 /* Device Status - RO */
9 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
10 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
11 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
12 #define E1000_MDIC 0x00020 /* MDI Control - RW */
13 #define E1000_MDICNFG 0x00E04 /* MDI Config - RW */
14 #define E1000_SCTL 0x00024 /* SerDes Control - RW */
[all …]
|
| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | qcom,wcd93xx-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,wcd93xx-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 reset-gpios:
17 vdd-buck-supply:
20 vdd-rxtx-supply:
23 vdd-io-supply:
26 vdd-mic-bias-supply:
[all …]
|
| /linux/drivers/net/wireless/ti/wlcore/ |
| H A D | conf.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
117 * Range: 0 - 0xFFFFFFFF
122 * Packet detection threshold in the PHY.
130 * after a PS-poll has been transmitted.
132 * Range: 0 - 200000
139 * Range: 0 - 200000
147 * Range: 0 - 4096
152 * The RX Clear Channel Assessment threshold in the PHY
153 * (the energy threshold).
161 * Occupied Rx mem-blocks number which requires interrupting the host
[all …]
|
| /linux/drivers/net/ethernet/cortina/ |
| H A D | gemini.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
6 * Copyright (C) 2010 Michał Mirosław <mirq-linux@rere.qmqm.pl>
49 * GMAC 0/1 SW TX Q0-5, and GMAC 0/1 HW TX Q0-5
58 #define __RWPTR_PREV(x, mask) (((unsigned int)(x) - 1) & (mask))
59 #define __RWPTR_DISTANCE(r, w, mask) (((unsigned int)(w) - (r)) & (mask))
60 #define __RWPTR_MASK(order) ((1 << (order)) - 1)
145 /* GMAC Hash/Rx/Tx AHB Weighting register */
274 #define TOE_QH_FULL_INT_BIT(x) BIT(x - 32)
321 /* 7:0 Software Free Queue Empty Threshold */
[all …]
|
| /linux/drivers/net/ethernet/intel/libeth/ |
| H A D | xdp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
22 spin_lock_init(&lock->lock); in __libeth_xdpsq_get()
23 lock->share = true; in __libeth_xdpsq_get()
29 netdev_warn(dev, "XDPSQ sharing enabled, possible XDP Tx slowdown\n"); in __libeth_xdpsq_get()
41 lock->share = false; in __libeth_xdpsq_put()
45 void __acquires(&lock->lock)
48 spin_lock(&lock->lock); in __libeth_xdpsq_lock()
52 void __releases(&lock->lock)
55 spin_unlock(&lock->lock); in __libeth_xdpsq_unlock()
59 /* XDPSQ clean-up timers */
[all …]
|
| /linux/drivers/net/wireless/ath/ath5k/ |
| H A D | reg.h | 2 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
3 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
4 * Copyright (c) 2007-2008 Michael Taylor <mike.taylor@apprion.com>
28 * 5210 - http://nova.stanford.edu/~bbaas/ps/isscc2002_slides.pdf
30 * 5211 - http://www.hotchips.org/archives/hc14/3_Tue/16_mcfarland.pdf
33 * Atheros's ART program (Atheros Radio Test), on ath9k, on legacy-hal
42 * AR5210-Specific TXDP registers
46 #define AR5K_NOQCU_TXDP0 0x0000 /* Queue 0 - data */
47 #define AR5K_NOQCU_TXDP1 0x0004 /* Queue 1 - beacons */
53 #define AR5K_CR_TXE0 0x00000001 /* TX Enable for queue 0 on 5210 */
[all …]
|
| /linux/include/linux/platform_data/ |
| H A D | xilinx-ll-temac.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
10 bool txcsum; /* Enable/disable TX checksum */
20 /* Pre-initialized mutex to use for synchronizing indirect
27 u8 tx_irq_timeout; /* TX Interrupt Delay Time-out */
28 u8 tx_irq_count; /* TX Interrupt Coalescing Threshold Count */
29 u8 rx_irq_timeout; /* RX Interrupt Delay Time-out */
30 u8 rx_irq_count; /* RX Interrupt Coalescing Threshold Count */
|
| /linux/drivers/net/ethernet/oki-semi/pch_gbe/ |
| H A D | pch_gbe.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 1999 - 2010 Intel Corporation.
26 * pch_gbe_regs_mac_adr - Structure holding values of mac address registers
35 * pch_udc_regs - Structure holding values of MAC registers
118 #define PCH_GBE_TX_RST 0x00008000 /* TX MAC, TX FIFO, TX DMA reset */
124 #define PCH_GBE_TX_TCPIPACC_EN 0x00000002 /* TX TCP/IP ACC Enable */
140 /* Receive Almost Empty Threshold */
145 /* Receive Almost Full Threshold */
150 /* RX FIFO Read Trigger Threshold */
202 /* TX Mode */
[all …]
|
| /linux/Documentation/devicetree/bindings/net/ |
| H A D | marvell,armada-370-neta.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/marvell,armada-370-neta.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marcin Wojtas <marcin.s.wojtas@gmail.com>
13 - $ref: /schemas/net/ethernet-controller.yaml#
18 - marvell,armada-370-neta
19 - marvell,armada-xp-neta
20 - marvell,armada-3700-neta
21 - marvell,armada-ac5-neta
[all …]
|
| /linux/include/soc/fsl/qe/ |
| H A D | immap_qe.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
22 /* QE I-RAM */
24 __be32 iadd; /* I-RAM Address Register */
25 __be32 idata; /* I-RAM Data Register */
27 __be32 iready; /* I-RAM Ready Register */
63 __be32 cetscr; /* QE time-stamp timer control register */
64 __be32 cetsr1; /* QE time-stamp register 1 */
65 __be32 cetsr2; /* QE time-stamp register 2 */
167 u8 sitarc1; /* SI1 RAM counter Tx TDMA */
168 u8 sitbrc1; /* SI1 RAM counter Tx TDMB */
[all …]
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| /linux/drivers/net/ethernet/marvell/octeon_ep_vf/ |
| H A D | octep_vf_config.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
11 /* Tx instruction types by length */
15 /* Tx Queue: maximum descriptors per ring */
17 /* Minimum input (Tx) requests to be enqueued to ring doorbell */
19 /* Packet threshold for Tx queue interrupt */
42 /* Tx Queue wake threshold
43 * wakeup a stopped Tx queue if minimum 2 descriptors are available.
44 * Even a skb with fragments consume only one Tx queue descriptor entry.
51 #define OCTEP_VF_MAX_MTU (10000 - (ETH_HLEN + ETH_FCS_LEN))
56 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq)
[all …]
|
| /linux/drivers/net/ethernet/intel/e1000/ |
| H A D | e1000_hw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
422 /* MAC decode size is 128K - This is the size of BAR0 */
443 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
461 * o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)
472 * o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)
486 * E1000_RAR_ENTRIES - 1 multicast addresses.
503 /* Receive Descriptor - Extended */
529 /* Receive Descriptor - Packet Split */
553 __le16 length[3]; /* length of buffers 1-3 */
[all …]
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| /linux/drivers/net/ethernet/chelsio/cxgb4vf/ |
| H A D | adapter.h | 2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
62 * MSI-X interrupt index usage.
64 MSIX_FW = 0, /* MSI-X index for firmware Q */
65 MSIX_IQFLINT = 1, /* MSI-X index base for Ingress Qs */
74 * a Free List and an Ethernet TX list.
90 * Per-"port" information. This is really per-Virtual Interface information
123 * SGE free-list queue state.
[all …]
|