| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 6 #include <dt-bindings/bus/ti-sysc.h> 7 #include <dt-bindings/clock/omap4.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/omap.h> 11 #include <dt-bindings/clock/omap4.h> 15 interrupt-parent = <&wakeupgen>; 16 #address-cells = <1>; [all …]
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| H A D | omap5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/omap.h> 12 #include <dt-bindings/clock/omap5.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 19 interrupt-parent = <&wakeupgen>; [all …]
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| H A D | dra7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/clock/dra7.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/dra.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 20 interrupt-parent = <&crossbar_mpu>; 47 compatible = "arm,armv7-timer"; [all …]
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| H A D | am33xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/pinctrl/am33xx.h> 11 #include <dt-bindings/clock/am3.h> 15 interrupt-parent = <&intc>; 16 #address-cells = <1>; 17 #size-cells = <1>; 30 d-can0 = &dcan0; [all …]
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| H A D | omap5-l4-abe.dtsi | 2 compatible = "ti,omap5-l4-abe", "simple-pm-bus"; 5 reg-names = "la", "ap"; 6 power-domains = <&prm_abe>; 7 /* OMAP5_L4_ABE_CLKCTRL is read-only */ 8 #address-cells = <1>; 9 #size-cells = <1>; 13 compatible = "simple-pm-bus"; 14 #address-cells = <1>; 15 #size-cells = <1>; 89 target-module@22000 { /* 0x40122000, ap 2 02.0 */ [all …]
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| H A D | omap34xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/media/omap3-isp.h> 16 /* OMAP343x/OMAP35xx variants OPP1-6 */ 17 operating-points-v2 = <&cpu0_opp_table>; 19 clock-latency = <300000>; /* From legacy driver */ 20 #cooling-cells = <2>; 24 cpu0_opp_table: opp-table { 25 compatible = "operating-points-v2-ti-cpu"; [all …]
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| H A D | dra74x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 16 compatible = "arm,cortex-a15"; 18 operating-points-v2 = <&cpu0_opp_table>; 21 clock-names = "cpu"; 23 clock-latency = <300000>; /* From omap-cpufreq driver */ 26 #cooling-cells = <2>; /* min followed by max */ 28 vbb-supply = <&abb_mpu>; 40 compatible = "arm,cortex-a15-pmu"; 41 interrupt-parent = <&wakeupgen>; [all …]
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| H A D | dra76x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ 12 target-module@42c01900 { 13 compatible = "ti,sysc-dra7-mcan", "ti,sysc"; 15 #address-cells = <1>; 16 #size-cells = <1>; 20 reg-names = "rev", "sysc", "syss"; 21 ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET | 23 ti,syss-mask = <1>; 25 clock-names = "fck"; [all …]
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| H A D | am3517.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 11 /delete-node/ &aes1_target; 12 /delete-node/ &aes2_target; 24 operating-points-v2 = <&cpu0_opp_table>; 26 clock-latency = <300000>; /* From legacy driver */ 30 cpu0_opp_table: opp-table { 31 compatible = "operating-points-v2-ti-cpu"; 38 opp-50-300000000 { 40 opp-hz = /bits/ 64 <300000000>; [all …]
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| H A D | omap2420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 15 compatible = "ti,omap2-l4", "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 21 compatible = "ti,omap2-prcm"; 25 #address-cells = <1>; 26 #size-cells = <0>; 34 compatible = "ti,omap2-scm", "simple-bus"; 36 #address-cells = <1>; [all …]
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| /linux/Documentation/devicetree/bindings/bus/ |
| H A D | ti-sysc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/ti-sysc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 31 pattern: "^target-module(@[0-9a-f]+)?$" 35 - items: 36 - enum: 37 - ti,sysc-omap2 38 - ti,sysc-omap4 [all …]
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| /linux/drivers/pmdomain/renesas/ |
| H A D | rcar-sysc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * R-Car SYSC Power management support 6 * Copyright (C) 2015-2017 Glider bvba 19 #include <linux/soc/renesas/rcar-sysc.h> 21 #include "rcar-sysc.h" 23 /* SYSC Common */ 24 #define SYSCSR 0x00 /* SYSC Status Register */ 28 #define SYSCIMR 0x10 /* Interrupt Mask Register */ 30 /* SYSC Status Register */ 37 * Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2 [all …]
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| H A D | rcar-gen4-sysc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * R-Car Gen4 SYSC Power management support 22 #include "rcar-gen4-sysc.h" 24 /* SYSC Common */ 25 #define SYSCSR 0x000 /* SYSC Status Register */ 26 #define SYSCPONSR(x) (0x800 + ((x) * 0x4)) /* Power-ON Status Register 0 */ 27 #define SYSCPOFFSR(x) (0x808 + ((x) * 0x4)) /* Power-OFF Status Register */ 30 #define SYSCIMR(x) (0x830 + ((x) * 0x4)) /* Interrupt Mask Register */ 39 #define PWRON_PWROFF BIT(0) /* Power-ON/OFF request */ 45 #define PDRSR_OFF BIT(0) /* Power-OFF state */ [all …]
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| /linux/arch/arm/boot/dts/renesas/ |
| H A D | r8a7790.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car H2 (R8A77900) SoC 6 * Copyright (C) 2013-2014 Renesas Solutions Corp. 10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/power/r8a7790-sysc.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 19 interrupt-parent = <&gic>; [all …]
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| H A D | r8a7742.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/r8a7742-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/power/r8a7742-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; [all …]
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| H A D | r8a7743.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Cogent Embedded Inc. 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a7743-cpg-mssr.h> 11 #include <dt-bindings/power/r8a7743-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 25 compatible = "fixed-clock"; [all …]
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| H A D | r8a7744.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a7744-cpg-mssr.h> 11 #include <dt-bindings/power/r8a7744-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; [all …]
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| H A D | r8a7791.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC 5 * Copyright (C) 2013-2015 Renesas Electronics Corporation 6 * Copyright (C) 2013-2014 Renesas Solutions Corp. 10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/power/r8a7791-sysc.h> 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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| H A D | r8a7794.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car E2 (R8A77940) SoC 9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/power/r8a7794-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 18 interrupt-parent = <&gic>; 40 compatible = "fixed-clock"; [all …]
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| H A D | r8a7745.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Cogent Embedded Inc. 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a7745-cpg-mssr.h> 11 #include <dt-bindings/power/r8a7745-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 42 compatible = "fixed-clock"; [all …]
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| /linux/include/linux/platform_data/ |
| H A D | ti-sysc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 29 * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets 39 * Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a 87 * struct sysc_capabilities - capabilities for an interconnect target module 88 * @type: sysc type identifier for the module 101 * struct sysc_config - configuration for an interconnect target module 102 * @sysc_val: configured value for sysc register 103 * @syss_mask: configured mask value for SYSSTATUS register 126 * struct ti_sysc_module_data - ti-sysc to hwmod translation data for a module 136 * based on device tree data parsed by ti-sysc driver.
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| /linux/drivers/clocksource/ |
| H A D | timer-ti-32k.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * timer-ti-32k.c - OMAP2 32k Timer Support 15 * OMAP Dual-mode timer framework support by Timo Teras 19 * Copyright (C) 2004-2009 Texas Instruments, Inc. 22 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> 24 * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com 38 * higher resolution in free-running counter modes (e.g. 12 MHz xtal), 62 return (u64)readl_relaxed(ti->counter); in ti_32k_read_cycles() 70 .mask = CLOCKSOURCE_MASK(32), 86 clock = of_clk_get_by_name(np->parent, name); in ti_32k_timer_enable_clock() [all …]
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a779f0.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Device Tree Source for the R-Car S4-8 (R8A779F0) SoC 8 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a779f0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 16 interrupt-parent = <&gic>; 18 cluster01_opp: opp-table-0 { 19 compatible = "operating-points-v2"; [all …]
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| H A D | r8a774c0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a774c0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 16 interrupt-parent = <&gic>; 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; [all …]
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | rcar-pci-host.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/pci/rcar-pci-host.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Renesas R-Car PCIe Host 11 - Marek Vasut <marek.vasut+renesas@gmail.com> 12 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 15 - $ref: /schemas/pci/pci-host-bridge.yaml# 20 - const: renesas,pcie-r8a7779 # R-Car H1 21 - items: [all …]
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