1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Device Tree Source for OMAP243x SoC 4 * 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 6 */ 7 8#include "omap2.dtsi" 9 10/ { 11 compatible = "ti,omap2430", "ti,omap2"; 12 13 ocp { 14 l4_wkup: l4_wkup@49000000 { 15 compatible = "ti,omap2-l4-wkup", "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 18 ranges = <0 0x49000000 0x31000>; 19 20 prcm: prcm@6000 { 21 compatible = "ti,omap2-prcm"; 22 reg = <0x6000 0x1000>; 23 24 prcm_clocks: clocks { 25 #address-cells = <1>; 26 #size-cells = <0>; 27 }; 28 29 prcm_clockdomains: clockdomains { 30 }; 31 }; 32 33 scm: scm@2000 { 34 compatible = "ti,omap2-scm", "simple-bus"; 35 reg = <0x2000 0x1000>; 36 #address-cells = <1>; 37 #size-cells = <1>; 38 #pinctrl-cells = <1>; 39 ranges = <0 0x2000 0x1000>; 40 41 omap2430_pmx: pinmux@30 { 42 compatible = "ti,omap2430-padconf", 43 "pinctrl-single"; 44 reg = <0x30 0x0154>; 45 #address-cells = <1>; 46 #size-cells = <0>; 47 #pinctrl-cells = <1>; 48 pinctrl-single,register-width = <8>; 49 pinctrl-single,function-mask = <0x3f>; 50 }; 51 52 scm_conf: scm_conf@270 { 53 compatible = "syscon", 54 "simple-bus"; 55 reg = <0x270 0x240>; 56 #address-cells = <1>; 57 #size-cells = <1>; 58 ranges = <0 0x270 0x240>; 59 60 scm_clocks: clocks { 61 #address-cells = <1>; 62 #size-cells = <0>; 63 }; 64 65 pbias_regulator: pbias_regulator@230 { 66 compatible = "ti,pbias-omap2", "ti,pbias-omap"; 67 reg = <0x230 0x4>; 68 syscon = <&scm_conf>; 69 pbias_mmc_reg: pbias_mmc_omap2430 { 70 regulator-name = "pbias_mmc_omap2430"; 71 regulator-min-microvolt = <1800000>; 72 regulator-max-microvolt = <3000000>; 73 }; 74 }; 75 }; 76 77 scm_clockdomains: clockdomains { 78 }; 79 }; 80 81 target-module@20000 { 82 compatible = "ti,sysc-omap2", "ti,sysc"; 83 reg = <0x20000 0x4>, 84 <0x20004 0x4>; 85 reg-names = "rev", "sysc"; 86 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 87 <SYSC_IDLE_NO>; 88 clocks = <&func_32k_ck>; 89 clock-names = "fck"; 90 #address-cells = <1>; 91 #size-cells = <1>; 92 ranges = <0x0 0x20000 0x1000>; 93 94 counter32k: counter@0 { 95 compatible = "ti,omap-counter32k"; 96 reg = <0 0x20>; 97 }; 98 }; 99 }; 100 101 gpio1: gpio@4900c000 { 102 compatible = "ti,omap2-gpio"; 103 reg = <0x4900c000 0x200>; 104 interrupts = <29>; 105 ti,hwmods = "gpio1"; 106 ti,gpio-always-on; 107 #gpio-cells = <2>; 108 gpio-controller; 109 #interrupt-cells = <2>; 110 interrupt-controller; 111 }; 112 113 gpio2: gpio@4900e000 { 114 compatible = "ti,omap2-gpio"; 115 reg = <0x4900e000 0x200>; 116 interrupts = <30>; 117 ti,hwmods = "gpio2"; 118 ti,gpio-always-on; 119 #gpio-cells = <2>; 120 gpio-controller; 121 #interrupt-cells = <2>; 122 interrupt-controller; 123 }; 124 125 gpio3: gpio@49010000 { 126 compatible = "ti,omap2-gpio"; 127 reg = <0x49010000 0x200>; 128 interrupts = <31>; 129 ti,hwmods = "gpio3"; 130 ti,gpio-always-on; 131 #gpio-cells = <2>; 132 gpio-controller; 133 #interrupt-cells = <2>; 134 interrupt-controller; 135 }; 136 137 gpio4: gpio@49012000 { 138 compatible = "ti,omap2-gpio"; 139 reg = <0x49012000 0x200>; 140 interrupts = <32>; 141 ti,hwmods = "gpio4"; 142 ti,gpio-always-on; 143 #gpio-cells = <2>; 144 gpio-controller; 145 #interrupt-cells = <2>; 146 interrupt-controller; 147 }; 148 149 gpio5: gpio@480b6000 { 150 compatible = "ti,omap2-gpio"; 151 reg = <0x480b6000 0x200>; 152 interrupts = <33>; 153 ti,hwmods = "gpio5"; 154 #gpio-cells = <2>; 155 gpio-controller; 156 #interrupt-cells = <2>; 157 interrupt-controller; 158 }; 159 160 gpmc: gpmc@6e000000 { 161 compatible = "ti,omap2430-gpmc"; 162 reg = <0x6e000000 0x1000>; 163 #address-cells = <2>; 164 #size-cells = <1>; 165 interrupts = <20>; 166 gpmc,num-cs = <8>; 167 gpmc,num-waitpins = <4>; 168 ti,hwmods = "gpmc"; 169 interrupt-controller; 170 #interrupt-cells = <2>; 171 gpio-controller; 172 #gpio-cells = <2>; 173 }; 174 175 mcbsp1: mcbsp@48074000 { 176 compatible = "ti,omap2430-mcbsp"; 177 reg = <0x48074000 0xff>; 178 reg-names = "mpu"; 179 interrupts = <64>, /* OCP compliant interrupt */ 180 <59>, /* TX interrupt */ 181 <60>, /* RX interrupt */ 182 <61>; /* RX overflow interrupt */ 183 interrupt-names = "common", "tx", "rx", "rx_overflow"; 184 ti,buffer-size = <128>; 185 ti,hwmods = "mcbsp1"; 186 dmas = <&sdma 31>, 187 <&sdma 32>; 188 dma-names = "tx", "rx"; 189 status = "disabled"; 190 }; 191 192 mcbsp2: mcbsp@48076000 { 193 compatible = "ti,omap2430-mcbsp"; 194 reg = <0x48076000 0xff>; 195 reg-names = "mpu"; 196 interrupts = <16>, /* OCP compliant interrupt */ 197 <62>, /* TX interrupt */ 198 <63>; /* RX interrupt */ 199 interrupt-names = "common", "tx", "rx"; 200 ti,buffer-size = <128>; 201 ti,hwmods = "mcbsp2"; 202 dmas = <&sdma 33>, 203 <&sdma 34>; 204 dma-names = "tx", "rx"; 205 status = "disabled"; 206 }; 207 208 mcbsp3: mcbsp@4808c000 { 209 compatible = "ti,omap2430-mcbsp"; 210 reg = <0x4808c000 0xff>; 211 reg-names = "mpu"; 212 interrupts = <17>, /* OCP compliant interrupt */ 213 <89>, /* TX interrupt */ 214 <90>; /* RX interrupt */ 215 interrupt-names = "common", "tx", "rx"; 216 ti,buffer-size = <128>; 217 ti,hwmods = "mcbsp3"; 218 dmas = <&sdma 17>, 219 <&sdma 18>; 220 dma-names = "tx", "rx"; 221 status = "disabled"; 222 }; 223 224 mcbsp4: mcbsp@4808e000 { 225 compatible = "ti,omap2430-mcbsp"; 226 reg = <0x4808e000 0xff>; 227 reg-names = "mpu"; 228 interrupts = <18>, /* OCP compliant interrupt */ 229 <54>, /* TX interrupt */ 230 <55>; /* RX interrupt */ 231 interrupt-names = "common", "tx", "rx"; 232 ti,buffer-size = <128>; 233 ti,hwmods = "mcbsp4"; 234 dmas = <&sdma 19>, 235 <&sdma 20>; 236 dma-names = "tx", "rx"; 237 status = "disabled"; 238 }; 239 240 mcbsp5: mcbsp@48096000 { 241 compatible = "ti,omap2430-mcbsp"; 242 reg = <0x48096000 0xff>; 243 reg-names = "mpu"; 244 interrupts = <19>, /* OCP compliant interrupt */ 245 <81>, /* TX interrupt */ 246 <82>; /* RX interrupt */ 247 interrupt-names = "common", "tx", "rx"; 248 ti,buffer-size = <128>; 249 ti,hwmods = "mcbsp5"; 250 dmas = <&sdma 21>, 251 <&sdma 22>; 252 dma-names = "tx", "rx"; 253 status = "disabled"; 254 }; 255 256 mmc1: mmc@4809c000 { 257 compatible = "ti,omap2-hsmmc"; 258 reg = <0x4809c000 0x200>; 259 interrupts = <83>; 260 ti,hwmods = "mmc1"; 261 ti,dual-volt; 262 dmas = <&sdma 61>, <&sdma 62>; 263 dma-names = "tx", "rx"; 264 pbias-supply = <&pbias_mmc_reg>; 265 }; 266 267 mmc2: mmc@480b4000 { 268 compatible = "ti,omap2-hsmmc"; 269 reg = <0x480b4000 0x200>; 270 interrupts = <86>; 271 ti,hwmods = "mmc2"; 272 dmas = <&sdma 47>, <&sdma 48>; 273 dma-names = "tx", "rx"; 274 }; 275 276 mailbox: mailbox@48094000 { 277 compatible = "ti,omap2-mailbox"; 278 reg = <0x48094000 0x200>; 279 interrupts = <26>; 280 ti,hwmods = "mailbox"; 281 #mbox-cells = <1>; 282 ti,mbox-num-users = <4>; 283 ti,mbox-num-fifos = <6>; 284 mbox_dsp: mbox-dsp { 285 ti,mbox-tx = <0 0 0>; 286 ti,mbox-rx = <1 0 0>; 287 }; 288 }; 289 290 timer1_target: target-module@49018000 { 291 compatible = "ti,sysc-omap2-timer", "ti,sysc"; 292 reg = <0x49018000 0x4>, 293 <0x49018010 0x4>, 294 <0x49018014 0x4>; 295 reg-names = "rev", "sysc", "syss"; 296 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 297 SYSC_OMAP2_EMUFREE | 298 SYSC_OMAP2_ENAWAKEUP | 299 SYSC_OMAP2_SOFTRESET | 300 SYSC_OMAP2_AUTOIDLE)>; 301 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 302 <SYSC_IDLE_NO>, 303 <SYSC_IDLE_SMART>; 304 ti,syss-mask = <1>; 305 clocks = <&gpt1_fck>, <&gpt1_ick>; 306 clock-names = "fck", "ick"; 307 #address-cells = <1>; 308 #size-cells = <1>; 309 ranges = <0x0 0x49018000 0x1000>; 310 311 timer1: timer@0 { 312 compatible = "ti,omap2420-timer"; 313 reg = <0 0x400>; 314 interrupts = <37>; 315 ti,timer-alwon; 316 }; 317 }; 318 319 mcspi3: spi@480b8000 { 320 compatible = "ti,omap2-mcspi"; 321 ti,hwmods = "mcspi3"; 322 reg = <0x480b8000 0x100>; 323 interrupts = <91>; 324 dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>; 325 dma-names = "tx0", "rx0", "tx1", "rx1"; 326 }; 327 328 usb_otg_hs: usb_otg_hs@480ac000 { 329 compatible = "ti,omap2-musb"; 330 ti,hwmods = "usb_otg_hs"; 331 reg = <0x480ac000 0x1000>; 332 interrupts = <93>; 333 }; 334 335 wd_timer2: wdt@49016000 { 336 compatible = "ti,omap2-wdt"; 337 ti,hwmods = "wd_timer2"; 338 reg = <0x49016000 0x80>; 339 }; 340 }; 341}; 342 343&sdma { 344 compatible = "ti,omap2430-sdma", "ti,omap-sdma"; 345}; 346 347&i2c1 { 348 compatible = "ti,omap2430-i2c"; 349}; 350 351&i2c2 { 352 compatible = "ti,omap2430-i2c"; 353}; 354 355#include "omap24xx-clocks.dtsi" 356#include "omap2430-clocks.dtsi" 357 358/* Preferred always-on timer for clockevent */ 359&timer1_target { 360 ti,no-reset-on-init; 361 ti,no-idle; 362 timer@0 { 363 assigned-clocks = <&gpt1_fck>; 364 assigned-clock-parents = <&func_32k_ck>; 365 }; 366}; 367