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/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_protocol_ops.h1 /* SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
14 * enum ipc_mem_td_cs - Completion status of a TD
15 * @IPC_MEM_TD_CS_INVALID: Initial status - td not yet used.
16 * @IPC_MEM_TD_CS_PARTIAL_TRANSFER: More data pending -> next TD used for this
33 * enum ipc_mem_msg_cs - Completion status of IPC Message
45 * struct ipc_msg_prep_args_pipe - struct for pipe args for message preparation
53 * struct ipc_msg_prep_args_sleep - struct for sleep args for message
56 * @state: 0=enter sleep, 1=exit sleep
64 * struct ipc_msg_prep_feature_set - struct for feature set argument for
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/linux/arch/arm/boot/dts/st/
H A Dstm32mp157c-emstamp-argon.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include "stm32mp15-pinctrl.dtsi"
10 #include "stm32mp15xxac-pinctrl.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/mfd/st,stpmic1.h>
23 stdout-path = "serial0:115200n8";
31 reserved-memory {
32 #address-cells = <1>;
33 #size-cells = <1>;
37 compatible = "shared-dma-pool";
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H A Dstm32mp157c-phycore-stm32mp15-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/leds/leds-pca9532.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
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H A Dstm32mp15x-mecio1-io.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include "stm32mp15-pinctrl.dtsi"
9 #include "stm32mp15xxaa-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
15 stdout-path = "serial0:1500000n8";
34 reserved-memory {
35 #address-cells = <1>;
36 #size-cells = <1>;
40 compatible = "shared-dma-pool";
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H A Dstm32mp157c-ed1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxaa-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
18 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
25 stdout-path = "serial0:115200n8";
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/linux/arch/powerpc/boot/dts/
H A Dmpc8377_wlan.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2009 Freescale Semiconductor Inc.
9 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
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H A Dmpc8377_rdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
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H A Dmpc8378_rdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
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/linux/drivers/mtd/lpddr/
H A Dlpddr_cmds.c1 // SPDX-License-Identifier: GPL-2.0-or-later
31 static int get_chip(struct map_info *map, struct flchip *chip, int mode);
32 static int chip_ready(struct map_info *map, struct flchip *chip, int mode);
33 static void put_chip(struct map_info *map, struct flchip *chip);
35 struct mtd_info *lpddr_cmdset(struct map_info *map) in lpddr_cmdset() argument
37 struct lpddr_private *lpddr = map->fldrv_priv; in lpddr_cmdset()
47 mtd->priv = map; in lpddr_cmdset()
48 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
51 mtd->_read = lpddr_read; in lpddr_cmdset()
52 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
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/linux/Documentation/devicetree/bindings/powerpc/
H A Dsleep.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/powerpc/sleep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerPC sleep property
10 - Rob Herring <robh@kernel.org>
13 Devices on SOCs often have mechanisms for placing devices into low-power
15 this information is more complicated than a cell-index property can
17 may contain a "sleep" property which describes these connections.
19 The sleep property consists of one or more sleep resources, each of
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/linux/drivers/iio/imu/inv_icm42600/
H A Dinv_icm42600_buffer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
72 *accel = &pack2->accel; in inv_icm42600_fifo_decode_packet()
73 *gyro = &pack2->gyro; in inv_icm42600_fifo_decode_packet()
74 *temp = &pack2->temp; in inv_icm42600_fifo_decode_packet()
75 *timestamp = &pack2->timestamp; in inv_icm42600_fifo_decode_packet()
81 *accel = &pack1->data; in inv_icm42600_fifo_decode_packet()
83 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
91 *gyro = &pack1->data; in inv_icm42600_fifo_decode_packet()
92 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
98 return -EINVAL; in inv_icm42600_fifo_decode_packet()
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/linux/arch/powerpc/boot/dts/fsl/
H A Dmpc8568si-post.dtsi36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus", "simple-bus";
40 sleep = <&pmc 0x08000000>;
45 compatible = "fsl,mpc8540-pci";
48 bus-range = <0 0xff>;
49 #interrupt-cells = <1>;
50 #size-cells = <2>;
51 #address-cells = <3>;
52 sleep = <&pmc 0x80000000>;
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H A Dmpc8569si-post.dtsi36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus";
40 sleep = <&pmc 0x08000000>;
45 compatible = "fsl,mpc8548-pcie";
47 #size-cells = <2>;
48 #address-cells = <3>;
49 bus-range = <0 255>;
50 clock-frequency = <33333333>;
52 sleep = <&pmc 0x20000000>;
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/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8953.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
4 #include <dt-bindings/clock/qcom,gcc-msm8953.h>
5 #include <dt-bindings/clock/qcom,rpmcc.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/soc/qcom,apr.h>
10 #include <dt-bindings/sound/qcom,q6afe.h>
11 #include <dt-bindings/sound/qcom,q6asm.h>
12 #include <dt-bindings/thermal/thermal.h>
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H A Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/gpio/gpio.h>
14 interrupt-parent = <&intc>;
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H A Dsc7180-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
14 #include "sc7180-firmware-tfa.dtsi"
20 compatible = "qcom,sc7180-idp", "qcom,sc7180";
30 stdout-path = "serial0:115200n8";
42 /delete-node/ &hyp_mem;
43 /delete-node/ &xbl_mem;
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/linux/drivers/iio/imu/inv_mpu6050/
H A Dinv_mpu_core.c1 // SPDX-License-Identifier: GPL-2.0-only
317 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep, in inv_mpu6050_pwr_mgmt_1_write() argument
323 clock = st->chip_config.clk; in inv_mpu6050_pwr_mgmt_1_write()
325 temp_dis = !st->chip_config.temp_en; in inv_mpu6050_pwr_mgmt_1_write()
330 if (sleep) in inv_mpu6050_pwr_mgmt_1_write()
335 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val); in inv_mpu6050_pwr_mgmt_1_write()
336 return regmap_write(st->map, st->reg->pwr_mgmt_1, val); in inv_mpu6050_pwr_mgmt_1_write()
344 switch (st->chip_type) { in inv_mpu6050_clock_switch()
349 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, false, clock, -1); in inv_mpu6050_clock_switch()
352 st->chip_config.clk = clock; in inv_mpu6050_clock_switch()
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/linux/drivers/net/dsa/realtek/
H A Drtl83xx.c1 // SPDX-License-Identifier: GPL-2.0+
11 * rtl83xx_lock() - Locks the mutex used by regmaps
19 * Context: Can sleep. Holds priv->map_lock lock.
26 mutex_lock(&priv->map_lock); in rtl83xx_lock()
31 * rtl83xx_unlock() - Unlocks the mutex used by regmaps
36 * Context: Releases priv->map_lock lock.
43 mutex_unlock(&priv->map_lock); in rtl83xx_unlock()
49 struct realtek_priv *priv = bus->priv; in rtl83xx_user_mdio_read()
51 return priv->ops->phy_read(priv, addr, regnum); in rtl83xx_user_mdio_read()
57 struct realtek_priv *priv = bus->priv; in rtl83xx_user_mdio_write()
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/linux/include/drm/ttm/
H A Dttm_bo.h3 * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
28 * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
41 /* Default number of pre-faulted pages in the TTM fault handler */
62 * but they cannot be accessed from user-space. For kernel-only use.
170 * @interruptible: Sleep interruptible if sleeping.
195 /** struct ttm_lru_walk_ops - Operations for a LRU walk. */
198 * process_bo - Process this bo.
202 * Return: Negative error code on error, User-defined positive value
206 * 0 also indicates success, -EBUSY means this bo was skipped.
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/linux/drivers/reset/
H A Dreset-qcom-aoss.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/reset-controller.h>
12 #include <dt-bindings/reset/qcom,sdm845-aoss.h>
54 const struct qcom_aoss_reset_map *map = &data->desc->resets[idx]; in qcom_aoss_control_assert() local
56 writel(1, data->base + map->reg); in qcom_aoss_control_assert()
57 /* Wait 6 32kHz sleep cycles for reset */ in qcom_aoss_control_assert()
66 const struct qcom_aoss_reset_map *map = &data->desc->resets[idx]; in qcom_aoss_control_deassert() local
68 writel(0, data->base + map->reg); in qcom_aoss_control_deassert()
69 /* Wait 6 32kHz sleep cycles for reset */ in qcom_aoss_control_deassert()
91 struct device *dev = &pdev->dev; in qcom_aoss_reset_probe()
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/linux/arch/arm/mach-s3c/
H A Dsleep-s3c64xx.S1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* linux/arch/arm/plat-s3c64xx/sleep.S
9 * S3C64XX CPU sleep code
14 #include "map.h"
19 #include "regs-gpio.h"
25 /* Sleep magic, the word before the resume entry point so that the
H A Dpm-core-s3c64xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * S3C64XX - PM core support for arch/arm/plat-s3c/pm.c
17 #include "regs-gpio.h"
18 #include "regs-clock.h"
19 #include "map.h"
44 #define s3c_irqwake_eintallow ((1 << 28) - 1)
53 /* ensure sleep mode has been cleared from the system */ in s3c_pm_restored_gpios()
60 /* turn on the sleep mode and keep it there, as it seems that during in samsung_pm_saved_gpios()
61 * suspend the xCON registers get re-set and thus you can end up with in samsung_pm_saved_gpios()
62 * problems between going to sleep and resuming. in samsung_pm_saved_gpios()
H A Dpm.c1 // SPDX-License-Identifier: GPL-2.0
4 // Copyright 2004-2008 Simtec Electronics
21 #include "map.h"
22 #include "regs-clock.h"
23 #include "regs-irq.h"
30 #include "pm-core.h"
36 /* The IRQ ext-int code goes here, it is too small to currently bother
44 unsigned long bit = 1L << IRQ_EINT_BIT(data->irq); in s3c_irqext_wake()
47 return -ENOENT; in s3c_irqext_wake()
50 state ? "enabled" : "disabled", data->irq); in s3c_irqext_wake()
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/linux/tools/lib/perf/Documentation/
H A Dlibperf-sampling.txt1 libperf-sampling(7)
5 ----
6 libperf-sampling - sampling interface
10 -----------
20 --
21 $ gcc -o sampling sampling.c -lperf
32 --
39 - creates events
40 - adds them to the event list
41 - opens and enables events through the event list
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/linux/arch/powerpc/platforms/52xx/
H A Dmpc52xx_pm.c1 // SPDX-License-Identifier: GPL-2.0
44 out_8(&gpiow->wkup_gpioe, in_8(&gpiow->wkup_gpioe) | (1 << pin)); in mpc52xx_set_wakeup_gpio()
46 out_8(&gpiow->wkup_ddr, in_8(&gpiow->wkup_ddr) & ~(1 << pin)); in mpc52xx_set_wakeup_gpio()
47 /* enable deep sleep interrupt */ in mpc52xx_set_wakeup_gpio()
48 out_8(&gpiow->wkup_inten, in_8(&gpiow->wkup_inten) | (1 << pin)); in mpc52xx_set_wakeup_gpio()
50 tmp = in_be16(&gpiow->wkup_itype); in mpc52xx_set_wakeup_gpio()
53 out_be16(&gpiow->wkup_itype, tmp); in mpc52xx_set_wakeup_gpio()
55 out_8(&gpiow->wkup_maste, 1); in mpc52xx_set_wakeup_gpio()
64 { .compatible = "fsl,mpc5200-immr", }, in mpc52xx_pm_prepare()
65 { .compatible = "fsl,mpc5200b-immr", }, in mpc52xx_pm_prepare()
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