xref: /linux/arch/arm/mach-s3c/pm-core-s3c64xx.h (revision 9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e) 
1*c6ff132dSArnd Bergmann /* SPDX-License-Identifier: GPL-2.0 */
2*c6ff132dSArnd Bergmann /*
3*c6ff132dSArnd Bergmann  * Copyright 2008 Openmoko, Inc.
4*c6ff132dSArnd Bergmann  * Copyright 2008 Simtec Electronics
5*c6ff132dSArnd Bergmann  *      Ben Dooks <ben@simtec.co.uk>
6*c6ff132dSArnd Bergmann  *      http://armlinux.simtec.co.uk/
7*c6ff132dSArnd Bergmann  *
8*c6ff132dSArnd Bergmann  * S3C64XX - PM core support for arch/arm/plat-s3c/pm.c
9*c6ff132dSArnd Bergmann  */
10*c6ff132dSArnd Bergmann 
11*c6ff132dSArnd Bergmann #ifndef __MACH_S3C64XX_PM_CORE_H
12*c6ff132dSArnd Bergmann #define __MACH_S3C64XX_PM_CORE_H __FILE__
13*c6ff132dSArnd Bergmann 
14*c6ff132dSArnd Bergmann #include <linux/serial_s3c.h>
15*c6ff132dSArnd Bergmann #include <linux/delay.h>
16*c6ff132dSArnd Bergmann 
17*c6ff132dSArnd Bergmann #include "regs-gpio.h"
18*c6ff132dSArnd Bergmann #include "regs-clock.h"
19*c6ff132dSArnd Bergmann #include "map.h"
20*c6ff132dSArnd Bergmann 
s3c_pm_debug_init_uart(void)21*c6ff132dSArnd Bergmann static inline void s3c_pm_debug_init_uart(void)
22*c6ff132dSArnd Bergmann {
23*c6ff132dSArnd Bergmann }
24*c6ff132dSArnd Bergmann 
s3c_pm_arch_prepare_irqs(void)25*c6ff132dSArnd Bergmann static inline void s3c_pm_arch_prepare_irqs(void)
26*c6ff132dSArnd Bergmann {
27*c6ff132dSArnd Bergmann 	/* VIC should have already been taken care of */
28*c6ff132dSArnd Bergmann 
29*c6ff132dSArnd Bergmann 	/* clear any pending EINT0 interrupts */
30*c6ff132dSArnd Bergmann 	__raw_writel(__raw_readl(S3C64XX_EINT0PEND), S3C64XX_EINT0PEND);
31*c6ff132dSArnd Bergmann }
32*c6ff132dSArnd Bergmann 
s3c_pm_arch_stop_clocks(void)33*c6ff132dSArnd Bergmann static inline void s3c_pm_arch_stop_clocks(void)
34*c6ff132dSArnd Bergmann {
35*c6ff132dSArnd Bergmann }
36*c6ff132dSArnd Bergmann 
s3c_pm_arch_show_resume_irqs(void)37*c6ff132dSArnd Bergmann static inline void s3c_pm_arch_show_resume_irqs(void)
38*c6ff132dSArnd Bergmann {
39*c6ff132dSArnd Bergmann }
40*c6ff132dSArnd Bergmann 
41*c6ff132dSArnd Bergmann /* make these defines, we currently do not have any need to change
42*c6ff132dSArnd Bergmann  * the IRQ wake controls depending on the CPU we are running on */
43*c6ff132dSArnd Bergmann #ifdef CONFIG_PM_SLEEP
44*c6ff132dSArnd Bergmann #define s3c_irqwake_eintallow	((1 << 28) - 1)
45*c6ff132dSArnd Bergmann #define s3c_irqwake_intallow	(~0)
46*c6ff132dSArnd Bergmann #else
47*c6ff132dSArnd Bergmann #define s3c_irqwake_eintallow 0
48*c6ff132dSArnd Bergmann #define s3c_irqwake_intallow  0
49*c6ff132dSArnd Bergmann #endif
50*c6ff132dSArnd Bergmann 
s3c_pm_restored_gpios(void)51*c6ff132dSArnd Bergmann static inline void s3c_pm_restored_gpios(void)
52*c6ff132dSArnd Bergmann {
53*c6ff132dSArnd Bergmann 	/* ensure sleep mode has been cleared from the system */
54*c6ff132dSArnd Bergmann 
55*c6ff132dSArnd Bergmann 	__raw_writel(0, S3C64XX_SLPEN);
56*c6ff132dSArnd Bergmann }
57*c6ff132dSArnd Bergmann 
samsung_pm_saved_gpios(void)58*c6ff132dSArnd Bergmann static inline void samsung_pm_saved_gpios(void)
59*c6ff132dSArnd Bergmann {
60*c6ff132dSArnd Bergmann 	/* turn on the sleep mode and keep it there, as it seems that during
61*c6ff132dSArnd Bergmann 	 * suspend the xCON registers get re-set and thus you can end up with
62*c6ff132dSArnd Bergmann 	 * problems between going to sleep and resuming.
63*c6ff132dSArnd Bergmann 	 */
64*c6ff132dSArnd Bergmann 
65*c6ff132dSArnd Bergmann 	__raw_writel(S3C64XX_SLPEN_USE_xSLP, S3C64XX_SLPEN);
66*c6ff132dSArnd Bergmann }
67*c6ff132dSArnd Bergmann #endif /* __MACH_S3C64XX_PM_CORE_H */
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