Lines Matching +full:sleep +full:- +full:map
1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
48 #address-cells = <2>;
49 #size-cells = <1>;
50 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
53 interrupt-parent = <&ipic>;
64 #address-cells = <1>;
65 #size-cells = <1>;
66 compatible = "cfi-flash";
68 bank-width = <2>;
69 device-width = <1>;
73 #address-cells = <1>;
74 #size-cells = <1>;
75 compatible = "fsl,mpc8377-fcm-nand",
76 "fsl,elbc-fcm-nand";
79 u-boot@0 {
81 read-only;
94 #address-cells = <1>;
95 #size-cells = <1>;
97 compatible = "simple-bus";
100 bus-frequency = <0>;
108 gpio1: gpio-controller@c00 {
109 #gpio-cells = <2>;
110 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
113 interrupt-parent = <&ipic>;
114 gpio-controller;
117 gpio2: gpio-controller@d00 {
118 #gpio-cells = <2>;
119 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
122 interrupt-parent = <&ipic>;
123 gpio-controller;
126 sleep-nexus {
127 #address-cells = <1>;
128 #size-cells = <1>;
129 compatible = "simple-bus";
130 sleep = <&pmc 0x0c000000>;
134 #address-cells = <1>;
135 #size-cells = <0>;
136 cell-index = <0>;
137 compatible = "fsl-i2c";
140 interrupt-parent = <&ipic>;
159 #gpio-cells = <2>;
160 compatible = "fsl,mc9s08qg8-mpc8377erdb",
161 "fsl,mcu-mpc8349emitx";
163 gpio-controller;
168 compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
171 interrupt-parent = <&ipic>;
172 sdhci,wp-inverted;
173 /* Filled in by U-Boot */
174 clock-frequency = <111111111>;
179 #address-cells = <1>;
180 #size-cells = <0>;
181 cell-index = <1>;
182 compatible = "fsl-i2c";
185 interrupt-parent = <&ipic>;
190 cell-index = <0>;
194 interrupt-parent = <&ipic>;
199 #address-cells = <1>;
200 #size-cells = <1>;
201 compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
204 interrupt-parent = <&ipic>;
206 cell-index = <0>;
207 dma-channel@0 {
208 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
210 cell-index = <0>;
211 interrupt-parent = <&ipic>;
214 dma-channel@80 {
215 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
217 cell-index = <1>;
218 interrupt-parent = <&ipic>;
221 dma-channel@100 {
222 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
224 cell-index = <2>;
225 interrupt-parent = <&ipic>;
228 dma-channel@180 {
229 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
231 cell-index = <3>;
232 interrupt-parent = <&ipic>;
238 compatible = "fsl-usb2-dr";
240 #address-cells = <1>;
241 #size-cells = <0>;
242 interrupt-parent = <&ipic>;
245 sleep = <&pmc 0x00c00000>;
249 #address-cells = <1>;
250 #size-cells = <1>;
251 cell-index = <0>;
257 local-mac-address = [ 00 00 00 00 00 00 ];
259 phy-connection-type = "mii";
260 interrupt-parent = <&ipic>;
261 tbi-handle = <&tbi0>;
262 phy-handle = <&phy2>;
263 sleep = <&pmc 0xc0000000>;
264 fsl,magic-packet;
267 #address-cells = <1>;
268 #size-cells = <0>;
269 compatible = "fsl,gianfar-mdio";
272 phy2: ethernet-phy@2 {
273 interrupt-parent = <&ipic>;
278 tbi0: tbi-phy@11 {
280 device_type = "tbi-phy";
286 #address-cells = <1>;
287 #size-cells = <1>;
288 cell-index = <1>;
294 local-mac-address = [ 00 00 00 00 00 00 ];
296 phy-connection-type = "mii";
297 interrupt-parent = <&ipic>;
298 fixed-link = <1 1 1000 0 0>;
299 tbi-handle = <&tbi1>;
300 sleep = <&pmc 0x30000000>;
301 fsl,magic-packet;
304 #address-cells = <1>;
305 #size-cells = <0>;
306 compatible = "fsl,gianfar-tbi";
309 tbi1: tbi-phy@11 {
311 device_type = "tbi-phy";
317 cell-index = <0>;
321 clock-frequency = <0>;
323 interrupt-parent = <&ipic>;
327 cell-index = <1>;
331 clock-frequency = <0>;
333 interrupt-parent = <&ipic>;
341 interrupt-parent = <&ipic>;
342 fsl,num-channels = <4>;
343 fsl,channel-fifo-len = <24>;
344 fsl,exec-units-mask = <0x9fe>;
345 fsl,descriptor-types-mask = <0x3ab0ebf>;
346 sleep = <&pmc 0x03000000>;
350 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
353 interrupt-parent = <&ipic>;
354 sleep = <&pmc 0x000000c0>;
358 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
361 interrupt-parent = <&ipic>;
362 sleep = <&pmc 0x00000030>;
369 * sense == 2: Edge, high-to-low change
371 ipic: interrupt-controller@700 {
373 interrupt-controller;
374 #address-cells = <0>;
375 #interrupt-cells = <2>;
380 compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
383 interrupt-parent = <&ipic>;
388 interrupt-map-mask = <0xf800 0 0 7>;
389 interrupt-map = <
404 interrupt-parent = <&ipic>;
406 bus-range = <0 0>;
410 sleep = <&pmc 0x00010000>;
411 clock-frequency = <66666666>;
412 #interrupt-cells = <1>;
413 #size-cells = <2>;
414 #address-cells = <3>;
417 compatible = "fsl,mpc8349-pci";
422 #address-cells = <3>;
423 #size-cells = <2>;
424 #interrupt-cells = <1>;
426 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
430 bus-range = <0 255>;
431 interrupt-map-mask = <0xf800 0 0 7>;
432 interrupt-map = <0 0 0 1 &ipic 1 8
436 sleep = <&pmc 0x00300000>;
437 clock-frequency = <0>;
440 #address-cells = <3>;
441 #size-cells = <2>;
454 #address-cells = <3>;
455 #size-cells = <2>;
456 #interrupt-cells = <1>;
458 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
462 bus-range = <0 255>;
463 interrupt-map-mask = <0xf800 0 0 7>;
464 interrupt-map = <0 0 0 1 &ipic 2 8
468 sleep = <&pmc 0x000c0000>;
469 clock-frequency = <0>;
472 #address-cells = <3>;
473 #size-cells = <2>;
486 compatible = "gpio-leds";
490 default-state = "on";
495 linux,default-trigger = "disk-activity";