1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Invensense, Inc. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/slab.h> 8 #include <linux/i2c.h> 9 #include <linux/err.h> 10 #include <linux/delay.h> 11 #include <linux/sysfs.h> 12 #include <linux/jiffies.h> 13 #include <linux/irq.h> 14 #include <linux/interrupt.h> 15 #include <linux/acpi.h> 16 #include <linux/platform_device.h> 17 #include <linux/regulator/consumer.h> 18 #include <linux/math64.h> 19 #include <linux/minmax.h> 20 #include <linux/pm.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/property.h> 23 24 #include <linux/iio/common/inv_sensors_timestamp.h> 25 #include <linux/iio/iio.h> 26 27 #include "inv_mpu_iio.h" 28 #include "inv_mpu_magn.h" 29 30 /* 31 * this is the gyro scale translated from dynamic range plus/minus 32 * {250, 500, 1000, 2000} to rad/s 33 */ 34 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724}; 35 36 /* 37 * this is the accel scale translated from dynamic range plus/minus 38 * {2, 4, 8, 16} to m/s^2 39 */ 40 static const int accel_scale[] = {598, 1196, 2392, 4785}; 41 42 static const struct inv_mpu6050_reg_map reg_set_icm20602 = { 43 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 44 .lpf = INV_MPU6050_REG_CONFIG, 45 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2, 46 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 47 .fifo_en = INV_MPU6050_REG_FIFO_EN, 48 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 49 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 50 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 51 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 52 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 53 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 54 .temperature = INV_MPU6050_REG_TEMPERATURE, 55 .int_enable = INV_MPU6050_REG_INT_ENABLE, 56 .int_status = INV_MPU6050_REG_INT_STATUS, 57 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 58 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 59 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 60 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 61 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 62 .i2c_if = INV_ICM20602_REG_I2C_IF, 63 }; 64 65 static const struct inv_mpu6050_reg_map reg_set_6500 = { 66 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 67 .lpf = INV_MPU6050_REG_CONFIG, 68 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2, 69 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 70 .fifo_en = INV_MPU6050_REG_FIFO_EN, 71 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 72 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 73 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 74 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 75 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 76 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 77 .temperature = INV_MPU6050_REG_TEMPERATURE, 78 .int_enable = INV_MPU6050_REG_INT_ENABLE, 79 .int_status = INV_MPU6050_REG_INT_STATUS, 80 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 81 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 82 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 83 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 84 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 85 .i2c_if = 0, 86 }; 87 88 static const struct inv_mpu6050_reg_map reg_set_6050 = { 89 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 90 .lpf = INV_MPU6050_REG_CONFIG, 91 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 92 .fifo_en = INV_MPU6050_REG_FIFO_EN, 93 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 94 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 95 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 96 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 97 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 98 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 99 .temperature = INV_MPU6050_REG_TEMPERATURE, 100 .int_enable = INV_MPU6050_REG_INT_ENABLE, 101 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 102 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 103 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 104 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET, 105 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 106 .i2c_if = 0, 107 }; 108 109 static const struct inv_mpu6050_chip_config chip_config_6050 = { 110 .clk = INV_CLK_INTERNAL, 111 .fsr = INV_MPU6050_FSR_2000DPS, 112 .lpf = INV_MPU6050_FILTER_20HZ, 113 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50), 114 .gyro_en = true, 115 .accl_en = true, 116 .temp_en = true, 117 .magn_en = false, 118 .gyro_fifo_enable = false, 119 .accl_fifo_enable = false, 120 .temp_fifo_enable = false, 121 .magn_fifo_enable = false, 122 .accl_fs = INV_MPU6050_FS_02G, 123 .user_ctrl = 0, 124 }; 125 126 static const struct inv_mpu6050_chip_config chip_config_6500 = { 127 .clk = INV_CLK_PLL, 128 .fsr = INV_MPU6050_FSR_2000DPS, 129 .lpf = INV_MPU6050_FILTER_20HZ, 130 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50), 131 .gyro_en = true, 132 .accl_en = true, 133 .temp_en = true, 134 .magn_en = false, 135 .gyro_fifo_enable = false, 136 .accl_fifo_enable = false, 137 .temp_fifo_enable = false, 138 .magn_fifo_enable = false, 139 .accl_fs = INV_MPU6050_FS_02G, 140 .user_ctrl = 0, 141 }; 142 143 /* Indexed by enum inv_devices */ 144 static const struct inv_mpu6050_hw hw_info[] = { 145 { 146 .whoami = INV_MPU6050_WHOAMI_VALUE, 147 .name = "MPU6050", 148 .reg = ®_set_6050, 149 .config = &chip_config_6050, 150 .fifo_size = 1024, 151 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 152 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME}, 153 }, 154 { 155 .whoami = INV_MPU6500_WHOAMI_VALUE, 156 .name = "MPU6500", 157 .reg = ®_set_6500, 158 .config = &chip_config_6500, 159 .fifo_size = 512, 160 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 161 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 162 }, 163 { 164 .whoami = INV_MPU6515_WHOAMI_VALUE, 165 .name = "MPU6515", 166 .reg = ®_set_6500, 167 .config = &chip_config_6500, 168 .fifo_size = 512, 169 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 170 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 171 }, 172 { 173 .whoami = INV_MPU6880_WHOAMI_VALUE, 174 .name = "MPU6880", 175 .reg = ®_set_6500, 176 .config = &chip_config_6500, 177 .fifo_size = 4096, 178 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 179 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 180 }, 181 { 182 .whoami = INV_MPU6000_WHOAMI_VALUE, 183 .name = "MPU6000", 184 .reg = ®_set_6050, 185 .config = &chip_config_6050, 186 .fifo_size = 1024, 187 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 188 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME}, 189 }, 190 { 191 .whoami = INV_MPU9150_WHOAMI_VALUE, 192 .name = "MPU9150", 193 .reg = ®_set_6050, 194 .config = &chip_config_6050, 195 .fifo_size = 1024, 196 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 197 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME}, 198 }, 199 { 200 .whoami = INV_MPU9250_WHOAMI_VALUE, 201 .name = "MPU9250", 202 .reg = ®_set_6500, 203 .config = &chip_config_6500, 204 .fifo_size = 512, 205 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 206 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 207 }, 208 { 209 .whoami = INV_MPU9255_WHOAMI_VALUE, 210 .name = "MPU9255", 211 .reg = ®_set_6500, 212 .config = &chip_config_6500, 213 .fifo_size = 512, 214 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 215 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 216 }, 217 { 218 .whoami = INV_ICM20608_WHOAMI_VALUE, 219 .name = "ICM20608", 220 .reg = ®_set_6500, 221 .config = &chip_config_6500, 222 .fifo_size = 512, 223 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 224 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 225 }, 226 { 227 .whoami = INV_ICM20608D_WHOAMI_VALUE, 228 .name = "ICM20608D", 229 .reg = ®_set_6500, 230 .config = &chip_config_6500, 231 .fifo_size = 512, 232 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 233 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 234 }, 235 { 236 .whoami = INV_ICM20609_WHOAMI_VALUE, 237 .name = "ICM20609", 238 .reg = ®_set_6500, 239 .config = &chip_config_6500, 240 .fifo_size = 4 * 1024, 241 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 242 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 243 }, 244 { 245 .whoami = INV_ICM20689_WHOAMI_VALUE, 246 .name = "ICM20689", 247 .reg = ®_set_6500, 248 .config = &chip_config_6500, 249 .fifo_size = 4 * 1024, 250 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 251 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 252 }, 253 { 254 .whoami = INV_ICM20600_WHOAMI_VALUE, 255 .name = "ICM20600", 256 .reg = ®_set_icm20602, 257 .config = &chip_config_6500, 258 .fifo_size = 1008, 259 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 260 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME}, 261 }, 262 { 263 .whoami = INV_ICM20602_WHOAMI_VALUE, 264 .name = "ICM20602", 265 .reg = ®_set_icm20602, 266 .config = &chip_config_6500, 267 .fifo_size = 1008, 268 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 269 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME}, 270 }, 271 { 272 .whoami = INV_ICM20690_WHOAMI_VALUE, 273 .name = "ICM20690", 274 .reg = ®_set_6500, 275 .config = &chip_config_6500, 276 .fifo_size = 1024, 277 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 278 .startup_time = {INV_ICM20690_GYRO_STARTUP_TIME, INV_ICM20690_ACCEL_STARTUP_TIME}, 279 }, 280 { 281 .whoami = INV_IAM20680_WHOAMI_VALUE, 282 .name = "IAM20680", 283 .reg = ®_set_6500, 284 .config = &chip_config_6500, 285 .fifo_size = 512, 286 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 287 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 288 }, 289 }; 290 291 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep, 292 bool cycle, int clock, int temp_dis) 293 { 294 u8 val; 295 296 if (clock < 0) 297 clock = st->chip_config.clk; 298 if (temp_dis < 0) 299 temp_dis = !st->chip_config.temp_en; 300 301 val = clock & INV_MPU6050_BIT_CLK_MASK; 302 if (temp_dis) 303 val |= INV_MPU6050_BIT_TEMP_DIS; 304 if (sleep) 305 val |= INV_MPU6050_BIT_SLEEP; 306 if (cycle) 307 val |= INV_MPU6050_BIT_CYCLE; 308 309 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val); 310 return regmap_write(st->map, st->reg->pwr_mgmt_1, val); 311 } 312 313 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st, 314 unsigned int clock) 315 { 316 int ret; 317 318 switch (st->chip_type) { 319 case INV_MPU6050: 320 case INV_MPU6000: 321 case INV_MPU9150: 322 /* old chips: switch clock manually */ 323 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, false, clock, -1); 324 if (ret) 325 return ret; 326 st->chip_config.clk = clock; 327 break; 328 default: 329 /* automatic clock switching, nothing to do */ 330 break; 331 } 332 333 return 0; 334 } 335 336 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, 337 unsigned int mask) 338 { 339 unsigned int sleep, val; 340 u8 pwr_mgmt2, user_ctrl; 341 int ret; 342 343 /* delete useless requests */ 344 if (mask & INV_MPU6050_SENSOR_ACCL && en == st->chip_config.accl_en) 345 mask &= ~INV_MPU6050_SENSOR_ACCL; 346 if (mask & INV_MPU6050_SENSOR_GYRO && en == st->chip_config.gyro_en) 347 mask &= ~INV_MPU6050_SENSOR_GYRO; 348 if (mask & INV_MPU6050_SENSOR_TEMP && en == st->chip_config.temp_en) 349 mask &= ~INV_MPU6050_SENSOR_TEMP; 350 if (mask & INV_MPU6050_SENSOR_MAGN && en == st->chip_config.magn_en) 351 mask &= ~INV_MPU6050_SENSOR_MAGN; 352 if (mask & INV_MPU6050_SENSOR_WOM && en == st->chip_config.wom_en) 353 mask &= ~INV_MPU6050_SENSOR_WOM; 354 355 /* force accel on if WoM is on and not going off */ 356 if (!en && (mask & INV_MPU6050_SENSOR_ACCL) && st->chip_config.wom_en && 357 !(mask & INV_MPU6050_SENSOR_WOM)) 358 mask &= ~INV_MPU6050_SENSOR_ACCL; 359 360 if (mask == 0) 361 return 0; 362 363 /* turn on/off temperature sensor */ 364 if (mask & INV_MPU6050_SENSOR_TEMP) { 365 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, false, -1, !en); 366 if (ret) 367 return ret; 368 st->chip_config.temp_en = en; 369 } 370 371 /* update user_crtl for driving magnetometer */ 372 if (mask & INV_MPU6050_SENSOR_MAGN) { 373 user_ctrl = st->chip_config.user_ctrl; 374 if (en) 375 user_ctrl |= INV_MPU6050_BIT_I2C_MST_EN; 376 else 377 user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN; 378 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); 379 if (ret) 380 return ret; 381 st->chip_config.user_ctrl = user_ctrl; 382 st->chip_config.magn_en = en; 383 } 384 385 /* manage accel & gyro engines */ 386 if (mask & (INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO)) { 387 /* compute power management 2 current value */ 388 pwr_mgmt2 = 0; 389 if (!st->chip_config.accl_en) 390 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY; 391 if (!st->chip_config.gyro_en) 392 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY; 393 394 /* update to new requested value */ 395 if (mask & INV_MPU6050_SENSOR_ACCL) { 396 if (en) 397 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_ACCL_STBY; 398 else 399 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY; 400 } 401 if (mask & INV_MPU6050_SENSOR_GYRO) { 402 if (en) 403 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_GYRO_STBY; 404 else 405 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY; 406 } 407 408 /* switch clock to internal when turning gyro off */ 409 if (mask & INV_MPU6050_SENSOR_GYRO && !en) { 410 ret = inv_mpu6050_clock_switch(st, INV_CLK_INTERNAL); 411 if (ret) 412 return ret; 413 } 414 415 /* update sensors engine */ 416 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_2: 0x%x\n", 417 pwr_mgmt2); 418 ret = regmap_write(st->map, st->reg->pwr_mgmt_2, pwr_mgmt2); 419 if (ret) 420 return ret; 421 if (mask & INV_MPU6050_SENSOR_ACCL) 422 st->chip_config.accl_en = en; 423 if (mask & INV_MPU6050_SENSOR_GYRO) 424 st->chip_config.gyro_en = en; 425 426 /* compute required time to have sensors stabilized */ 427 sleep = 0; 428 if (en) { 429 if (mask & INV_MPU6050_SENSOR_ACCL) { 430 if (sleep < st->hw->startup_time.accel) 431 sleep = st->hw->startup_time.accel; 432 } 433 if (mask & INV_MPU6050_SENSOR_GYRO) { 434 if (sleep < st->hw->startup_time.gyro) 435 sleep = st->hw->startup_time.gyro; 436 } 437 } else { 438 if (mask & INV_MPU6050_SENSOR_GYRO) { 439 if (sleep < INV_MPU6050_GYRO_DOWN_TIME) 440 sleep = INV_MPU6050_GYRO_DOWN_TIME; 441 } 442 } 443 if (sleep) 444 msleep(sleep); 445 446 /* switch clock to PLL when turning gyro on */ 447 if (mask & INV_MPU6050_SENSOR_GYRO && en) { 448 ret = inv_mpu6050_clock_switch(st, INV_CLK_PLL); 449 if (ret) 450 return ret; 451 } 452 } 453 454 /* enable/disable accel intelligence control */ 455 if (mask & INV_MPU6050_SENSOR_WOM) { 456 val = en ? INV_MPU6500_BIT_ACCEL_INTEL_EN | 457 INV_MPU6500_BIT_ACCEL_INTEL_MODE : 0; 458 ret = regmap_write(st->map, INV_MPU6500_REG_ACCEL_INTEL_CTRL, val); 459 if (ret) 460 return ret; 461 st->chip_config.wom_en = en; 462 } 463 464 return 0; 465 } 466 467 static int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, 468 bool power_on) 469 { 470 int result; 471 472 result = inv_mpu6050_pwr_mgmt_1_write(st, !power_on, false, -1, -1); 473 if (result) 474 return result; 475 476 if (power_on) 477 usleep_range(INV_MPU6050_REG_UP_TIME_MIN, 478 INV_MPU6050_REG_UP_TIME_MAX); 479 480 return 0; 481 } 482 483 static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st, 484 enum inv_mpu6050_fsr_e val) 485 { 486 unsigned int gyro_shift; 487 u8 data; 488 489 switch (st->chip_type) { 490 case INV_ICM20690: 491 gyro_shift = INV_ICM20690_GYRO_CONFIG_FSR_SHIFT; 492 break; 493 default: 494 gyro_shift = INV_MPU6050_GYRO_CONFIG_FSR_SHIFT; 495 break; 496 } 497 498 data = val << gyro_shift; 499 return regmap_write(st->map, st->reg->gyro_config, data); 500 } 501 502 static int inv_mpu6050_set_accel_lpf_regs(struct inv_mpu6050_state *st, 503 enum inv_mpu6050_filter_e val) 504 { 505 switch (st->chip_type) { 506 case INV_MPU6050: 507 case INV_MPU6000: 508 case INV_MPU9150: 509 /* old chips, nothing to do */ 510 return 0; 511 case INV_ICM20689: 512 case INV_ICM20690: 513 /* set FIFO size to maximum value */ 514 val |= INV_ICM20689_BITS_FIFO_SIZE_MAX; 515 break; 516 default: 517 break; 518 } 519 520 return regmap_write(st->map, st->reg->accel_lpf, val); 521 } 522 523 /* 524 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent 525 * 526 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope 527 * MPU6500 and above have a dedicated register for accelerometer 528 */ 529 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st, 530 enum inv_mpu6050_filter_e val) 531 { 532 int result; 533 534 result = regmap_write(st->map, st->reg->lpf, val); 535 if (result) 536 return result; 537 538 /* set accel lpf */ 539 return inv_mpu6050_set_accel_lpf_regs(st, val); 540 } 541 542 /* 543 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO. 544 * 545 * Initial configuration: 546 * FSR: ± 2000DPS 547 * DLPF: 20Hz 548 * FIFO rate: 50Hz 549 * Clock source: Gyro PLL 550 */ 551 static int inv_mpu6050_init_config(struct iio_dev *indio_dev) 552 { 553 int result; 554 u8 d; 555 struct inv_mpu6050_state *st = iio_priv(indio_dev); 556 struct inv_sensors_timestamp_chip timestamp; 557 558 result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr); 559 if (result) 560 return result; 561 562 result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf); 563 if (result) 564 return result; 565 566 d = st->chip_config.divider; 567 result = regmap_write(st->map, st->reg->sample_rate_div, d); 568 if (result) 569 return result; 570 571 d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 572 result = regmap_write(st->map, st->reg->accl_config, d); 573 if (result) 574 return result; 575 576 result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask); 577 if (result) 578 return result; 579 580 /* clock jitter is +/- 2% */ 581 timestamp.clock_period = NSEC_PER_SEC / INV_MPU6050_INTERNAL_FREQ_HZ; 582 timestamp.jitter = 20; 583 timestamp.init_period = 584 NSEC_PER_SEC / INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 585 inv_sensors_timestamp_init(&st->timestamp, ×tamp); 586 587 /* magn chip init, noop if not present in the chip */ 588 result = inv_mpu_magn_probe(st); 589 if (result) 590 return result; 591 592 return 0; 593 } 594 595 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg, 596 int axis, int val) 597 { 598 int ind; 599 __be16 d = cpu_to_be16(val); 600 601 ind = (axis - IIO_MOD_X) * 2; 602 603 return regmap_bulk_write(st->map, reg + ind, &d, sizeof(d)); 604 } 605 606 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg, 607 int axis, int *val) 608 { 609 int ind, result; 610 __be16 d; 611 612 ind = (axis - IIO_MOD_X) * 2; 613 result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d)); 614 if (result) 615 return result; 616 *val = (short)be16_to_cpup(&d); 617 618 return IIO_VAL_INT; 619 } 620 621 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev, 622 struct iio_chan_spec const *chan, 623 int *val) 624 { 625 struct inv_mpu6050_state *st = iio_priv(indio_dev); 626 struct device *pdev = regmap_get_device(st->map); 627 unsigned int freq_hz, period_us, min_sleep_us, max_sleep_us; 628 int result; 629 int ret; 630 631 /* compute sample period */ 632 freq_hz = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 633 period_us = 1000000 / freq_hz; 634 635 result = pm_runtime_resume_and_get(pdev); 636 if (result) 637 return result; 638 639 switch (chan->type) { 640 case IIO_ANGL_VEL: 641 if (!st->chip_config.gyro_en) { 642 result = inv_mpu6050_switch_engine(st, true, 643 INV_MPU6050_SENSOR_GYRO); 644 if (result) 645 goto error_power_off; 646 /* need to wait 2 periods to have first valid sample */ 647 min_sleep_us = 2 * period_us; 648 max_sleep_us = 2 * (period_us + period_us / 2); 649 usleep_range(min_sleep_us, max_sleep_us); 650 } 651 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro, 652 chan->channel2, val); 653 break; 654 case IIO_ACCEL: 655 if (!st->chip_config.accl_en) { 656 result = inv_mpu6050_switch_engine(st, true, 657 INV_MPU6050_SENSOR_ACCL); 658 if (result) 659 goto error_power_off; 660 /* wait 1 period for first sample availability */ 661 min_sleep_us = period_us; 662 max_sleep_us = period_us + period_us / 2; 663 usleep_range(min_sleep_us, max_sleep_us); 664 } 665 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl, 666 chan->channel2, val); 667 break; 668 case IIO_TEMP: 669 /* temperature sensor work only with accel and/or gyro */ 670 if (!st->chip_config.accl_en && !st->chip_config.gyro_en) { 671 result = -EBUSY; 672 goto error_power_off; 673 } 674 if (!st->chip_config.temp_en) { 675 result = inv_mpu6050_switch_engine(st, true, 676 INV_MPU6050_SENSOR_TEMP); 677 if (result) 678 goto error_power_off; 679 /* wait 1 period for first sample availability */ 680 min_sleep_us = period_us; 681 max_sleep_us = period_us + period_us / 2; 682 usleep_range(min_sleep_us, max_sleep_us); 683 } 684 ret = inv_mpu6050_sensor_show(st, st->reg->temperature, 685 IIO_MOD_X, val); 686 break; 687 case IIO_MAGN: 688 if (!st->chip_config.magn_en) { 689 result = inv_mpu6050_switch_engine(st, true, 690 INV_MPU6050_SENSOR_MAGN); 691 if (result) 692 goto error_power_off; 693 /* frequency is limited for magnetometer */ 694 if (freq_hz > INV_MPU_MAGN_FREQ_HZ_MAX) { 695 freq_hz = INV_MPU_MAGN_FREQ_HZ_MAX; 696 period_us = 1000000 / freq_hz; 697 } 698 /* need to wait 2 periods to have first valid sample */ 699 min_sleep_us = 2 * period_us; 700 max_sleep_us = 2 * (period_us + period_us / 2); 701 usleep_range(min_sleep_us, max_sleep_us); 702 } 703 ret = inv_mpu_magn_read(st, chan->channel2, val); 704 break; 705 default: 706 ret = -EINVAL; 707 break; 708 } 709 710 pm_runtime_mark_last_busy(pdev); 711 pm_runtime_put_autosuspend(pdev); 712 713 return ret; 714 715 error_power_off: 716 pm_runtime_put_autosuspend(pdev); 717 return result; 718 } 719 720 static int 721 inv_mpu6050_read_raw(struct iio_dev *indio_dev, 722 struct iio_chan_spec const *chan, 723 int *val, int *val2, long mask) 724 { 725 struct inv_mpu6050_state *st = iio_priv(indio_dev); 726 int ret = 0; 727 728 switch (mask) { 729 case IIO_CHAN_INFO_RAW: 730 ret = iio_device_claim_direct_mode(indio_dev); 731 if (ret) 732 return ret; 733 mutex_lock(&st->lock); 734 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val); 735 mutex_unlock(&st->lock); 736 iio_device_release_direct_mode(indio_dev); 737 return ret; 738 case IIO_CHAN_INFO_SCALE: 739 switch (chan->type) { 740 case IIO_ANGL_VEL: 741 mutex_lock(&st->lock); 742 *val = 0; 743 *val2 = gyro_scale_6050[st->chip_config.fsr]; 744 mutex_unlock(&st->lock); 745 746 return IIO_VAL_INT_PLUS_NANO; 747 case IIO_ACCEL: 748 mutex_lock(&st->lock); 749 *val = 0; 750 *val2 = accel_scale[st->chip_config.accl_fs]; 751 mutex_unlock(&st->lock); 752 753 return IIO_VAL_INT_PLUS_MICRO; 754 case IIO_TEMP: 755 *val = st->hw->temp.scale / 1000000; 756 *val2 = st->hw->temp.scale % 1000000; 757 return IIO_VAL_INT_PLUS_MICRO; 758 case IIO_MAGN: 759 return inv_mpu_magn_get_scale(st, chan, val, val2); 760 default: 761 return -EINVAL; 762 } 763 case IIO_CHAN_INFO_OFFSET: 764 switch (chan->type) { 765 case IIO_TEMP: 766 *val = st->hw->temp.offset; 767 return IIO_VAL_INT; 768 default: 769 return -EINVAL; 770 } 771 case IIO_CHAN_INFO_CALIBBIAS: 772 switch (chan->type) { 773 case IIO_ANGL_VEL: 774 mutex_lock(&st->lock); 775 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset, 776 chan->channel2, val); 777 mutex_unlock(&st->lock); 778 return ret; 779 case IIO_ACCEL: 780 mutex_lock(&st->lock); 781 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset, 782 chan->channel2, val); 783 mutex_unlock(&st->lock); 784 return ret; 785 786 default: 787 return -EINVAL; 788 } 789 default: 790 return -EINVAL; 791 } 792 } 793 794 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val, 795 int val2) 796 { 797 int result, i; 798 799 if (val != 0) 800 return -EINVAL; 801 802 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) { 803 if (gyro_scale_6050[i] == val2) { 804 result = inv_mpu6050_set_gyro_fsr(st, i); 805 if (result) 806 return result; 807 808 st->chip_config.fsr = i; 809 return 0; 810 } 811 } 812 813 return -EINVAL; 814 } 815 816 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev, 817 struct iio_chan_spec const *chan, long mask) 818 { 819 switch (mask) { 820 case IIO_CHAN_INFO_SCALE: 821 switch (chan->type) { 822 case IIO_ANGL_VEL: 823 return IIO_VAL_INT_PLUS_NANO; 824 default: 825 return IIO_VAL_INT_PLUS_MICRO; 826 } 827 default: 828 return IIO_VAL_INT_PLUS_MICRO; 829 } 830 831 return -EINVAL; 832 } 833 834 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val, 835 int val2) 836 { 837 int result, i; 838 u8 d; 839 840 if (val != 0) 841 return -EINVAL; 842 843 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) { 844 if (accel_scale[i] == val2) { 845 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 846 result = regmap_write(st->map, st->reg->accl_config, d); 847 if (result) 848 return result; 849 850 st->chip_config.accl_fs = i; 851 return 0; 852 } 853 } 854 855 return -EINVAL; 856 } 857 858 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, 859 struct iio_chan_spec const *chan, 860 int val, int val2, long mask) 861 { 862 struct inv_mpu6050_state *st = iio_priv(indio_dev); 863 struct device *pdev = regmap_get_device(st->map); 864 int result; 865 866 /* 867 * we should only update scale when the chip is disabled, i.e. 868 * not running 869 */ 870 result = iio_device_claim_direct_mode(indio_dev); 871 if (result) 872 return result; 873 874 mutex_lock(&st->lock); 875 result = pm_runtime_resume_and_get(pdev); 876 if (result) 877 goto error_write_raw_unlock; 878 879 switch (mask) { 880 case IIO_CHAN_INFO_SCALE: 881 switch (chan->type) { 882 case IIO_ANGL_VEL: 883 result = inv_mpu6050_write_gyro_scale(st, val, val2); 884 break; 885 case IIO_ACCEL: 886 result = inv_mpu6050_write_accel_scale(st, val, val2); 887 break; 888 default: 889 result = -EINVAL; 890 break; 891 } 892 break; 893 case IIO_CHAN_INFO_CALIBBIAS: 894 switch (chan->type) { 895 case IIO_ANGL_VEL: 896 result = inv_mpu6050_sensor_set(st, 897 st->reg->gyro_offset, 898 chan->channel2, val); 899 break; 900 case IIO_ACCEL: 901 result = inv_mpu6050_sensor_set(st, 902 st->reg->accl_offset, 903 chan->channel2, val); 904 break; 905 default: 906 result = -EINVAL; 907 break; 908 } 909 break; 910 default: 911 result = -EINVAL; 912 break; 913 } 914 915 pm_runtime_mark_last_busy(pdev); 916 pm_runtime_put_autosuspend(pdev); 917 error_write_raw_unlock: 918 mutex_unlock(&st->lock); 919 iio_device_release_direct_mode(indio_dev); 920 921 return result; 922 } 923 924 static u64 inv_mpu6050_convert_wom_to_roc(unsigned int threshold, unsigned int freq_div) 925 { 926 /* 4mg per LSB converted in m/s² in micro (1000000) */ 927 const unsigned int convert = 4U * 9807U; 928 u64 value; 929 930 value = threshold * convert; 931 932 /* compute the differential by multiplying by the frequency */ 933 return div_u64(value * INV_MPU6050_INTERNAL_FREQ_HZ, freq_div); 934 } 935 936 static unsigned int inv_mpu6050_convert_roc_to_wom(u64 roc, unsigned int freq_div) 937 { 938 /* 4mg per LSB converted in m/s² in micro (1000000) */ 939 const unsigned int convert = 4U * 9807U; 940 u64 value; 941 942 /* return 0 only if roc is 0 */ 943 if (roc == 0) 944 return 0; 945 946 value = div_u64(roc * freq_div, convert * INV_MPU6050_INTERNAL_FREQ_HZ); 947 948 /* limit value to 8 bits and prevent 0 */ 949 return min(255, max(1, value)); 950 } 951 952 static int inv_mpu6050_set_wom_int(struct inv_mpu6050_state *st, bool on) 953 { 954 unsigned int reg_val, val; 955 956 switch (st->chip_type) { 957 case INV_MPU6050: 958 case INV_MPU6500: 959 case INV_MPU6515: 960 case INV_MPU6880: 961 case INV_MPU6000: 962 case INV_MPU9150: 963 case INV_MPU9250: 964 case INV_MPU9255: 965 reg_val = INV_MPU6500_BIT_WOM_INT_EN; 966 break; 967 default: 968 reg_val = INV_ICM20608_BIT_WOM_INT_EN; 969 break; 970 } 971 972 val = on ? reg_val : 0; 973 974 return regmap_update_bits(st->map, st->reg->int_enable, reg_val, val); 975 } 976 977 static int inv_mpu6050_set_wom_threshold(struct inv_mpu6050_state *st, u64 value, 978 unsigned int freq_div) 979 { 980 unsigned int threshold; 981 int result; 982 983 /* convert roc to wom threshold and convert back to handle clipping */ 984 threshold = inv_mpu6050_convert_roc_to_wom(value, freq_div); 985 value = inv_mpu6050_convert_wom_to_roc(threshold, freq_div); 986 987 dev_dbg(regmap_get_device(st->map), "wom_threshold: 0x%x\n", threshold); 988 989 switch (st->chip_type) { 990 case INV_ICM20609: 991 case INV_ICM20689: 992 case INV_ICM20600: 993 case INV_ICM20602: 994 case INV_ICM20690: 995 st->data[0] = threshold; 996 st->data[1] = threshold; 997 st->data[2] = threshold; 998 result = regmap_bulk_write(st->map, INV_ICM20609_REG_ACCEL_WOM_X_THR, 999 st->data, 3); 1000 break; 1001 default: 1002 result = regmap_write(st->map, INV_MPU6500_REG_WOM_THRESHOLD, threshold); 1003 break; 1004 } 1005 if (result) 1006 return result; 1007 1008 st->chip_config.roc_threshold = value; 1009 1010 return 0; 1011 } 1012 1013 static int inv_mpu6050_set_lp_odr(struct inv_mpu6050_state *st, unsigned int freq_div, 1014 unsigned int *lp_div) 1015 { 1016 static const unsigned int freq_dividers[] = {2, 4, 8, 16, 32, 64, 128, 256}; 1017 static const unsigned int reg_values[] = { 1018 INV_MPU6050_LPOSC_500HZ, INV_MPU6050_LPOSC_250HZ, 1019 INV_MPU6050_LPOSC_125HZ, INV_MPU6050_LPOSC_62HZ, 1020 INV_MPU6050_LPOSC_31HZ, INV_MPU6050_LPOSC_16HZ, 1021 INV_MPU6050_LPOSC_8HZ, INV_MPU6050_LPOSC_4HZ, 1022 }; 1023 unsigned int val, i; 1024 1025 switch (st->chip_type) { 1026 case INV_ICM20609: 1027 case INV_ICM20689: 1028 case INV_ICM20600: 1029 case INV_ICM20602: 1030 case INV_ICM20690: 1031 /* nothing to do */ 1032 *lp_div = INV_MPU6050_FREQ_DIVIDER(st); 1033 return 0; 1034 default: 1035 break; 1036 } 1037 1038 /* found the nearest superior frequency divider */ 1039 i = ARRAY_SIZE(reg_values) - 1; 1040 val = reg_values[i]; 1041 *lp_div = freq_dividers[i]; 1042 for (i = 0; i < ARRAY_SIZE(freq_dividers); ++i) { 1043 if (freq_div <= freq_dividers[i]) { 1044 val = reg_values[i]; 1045 *lp_div = freq_dividers[i]; 1046 break; 1047 } 1048 } 1049 1050 dev_dbg(regmap_get_device(st->map), "lp_odr: 0x%x\n", val); 1051 return regmap_write(st->map, INV_MPU6500_REG_LP_ODR, val); 1052 } 1053 1054 static int inv_mpu6050_set_wom_lp(struct inv_mpu6050_state *st, bool on) 1055 { 1056 unsigned int lp_div; 1057 int result; 1058 1059 if (on) { 1060 /* set low power ODR */ 1061 result = inv_mpu6050_set_lp_odr(st, INV_MPU6050_FREQ_DIVIDER(st), &lp_div); 1062 if (result) 1063 return result; 1064 /* disable accel low pass filter */ 1065 result = inv_mpu6050_set_accel_lpf_regs(st, INV_MPU6050_FILTER_NOLPF); 1066 if (result) 1067 return result; 1068 /* update wom threshold with new low-power frequency divider */ 1069 result = inv_mpu6050_set_wom_threshold(st, st->chip_config.roc_threshold, lp_div); 1070 if (result) 1071 return result; 1072 /* set cycle mode */ 1073 result = inv_mpu6050_pwr_mgmt_1_write(st, false, true, -1, -1); 1074 } else { 1075 /* disable cycle mode */ 1076 result = inv_mpu6050_pwr_mgmt_1_write(st, false, false, -1, -1); 1077 if (result) 1078 return result; 1079 /* restore wom threshold */ 1080 result = inv_mpu6050_set_wom_threshold(st, st->chip_config.roc_threshold, 1081 INV_MPU6050_FREQ_DIVIDER(st)); 1082 if (result) 1083 return result; 1084 /* restore accel low pass filter */ 1085 result = inv_mpu6050_set_accel_lpf_regs(st, st->chip_config.lpf); 1086 } 1087 1088 return result; 1089 } 1090 1091 static int inv_mpu6050_enable_wom(struct inv_mpu6050_state *st, bool en) 1092 { 1093 struct device *pdev = regmap_get_device(st->map); 1094 unsigned int mask; 1095 int result; 1096 1097 if (en) { 1098 result = pm_runtime_resume_and_get(pdev); 1099 if (result) 1100 return result; 1101 1102 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_WOM; 1103 result = inv_mpu6050_switch_engine(st, true, mask); 1104 if (result) 1105 goto error_suspend; 1106 1107 result = inv_mpu6050_set_wom_int(st, true); 1108 if (result) 1109 goto error_suspend; 1110 } else { 1111 result = inv_mpu6050_set_wom_int(st, false); 1112 if (result) 1113 dev_err(pdev, "error %d disabling WoM interrupt bit", result); 1114 1115 /* disable only WoM and let accel be disabled by autosuspend */ 1116 result = inv_mpu6050_switch_engine(st, false, INV_MPU6050_SENSOR_WOM); 1117 if (result) { 1118 dev_err(pdev, "error %d disabling WoM force off", result); 1119 /* force WoM off */ 1120 st->chip_config.wom_en = false; 1121 } 1122 1123 pm_runtime_mark_last_busy(pdev); 1124 pm_runtime_put_autosuspend(pdev); 1125 } 1126 1127 return result; 1128 1129 error_suspend: 1130 pm_runtime_mark_last_busy(pdev); 1131 pm_runtime_put_autosuspend(pdev); 1132 return result; 1133 } 1134 1135 static int inv_mpu6050_read_event_config(struct iio_dev *indio_dev, 1136 const struct iio_chan_spec *chan, 1137 enum iio_event_type type, 1138 enum iio_event_direction dir) 1139 { 1140 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1141 1142 /* support only WoM (accel roc rising) event */ 1143 if (chan->type != IIO_ACCEL || type != IIO_EV_TYPE_ROC || 1144 dir != IIO_EV_DIR_RISING) 1145 return -EINVAL; 1146 1147 guard(mutex)(&st->lock); 1148 1149 return st->chip_config.wom_en ? 1 : 0; 1150 } 1151 1152 static int inv_mpu6050_write_event_config(struct iio_dev *indio_dev, 1153 const struct iio_chan_spec *chan, 1154 enum iio_event_type type, 1155 enum iio_event_direction dir, 1156 int state) 1157 { 1158 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1159 int enable; 1160 1161 /* support only WoM (accel roc rising) event */ 1162 if (chan->type != IIO_ACCEL || type != IIO_EV_TYPE_ROC || 1163 dir != IIO_EV_DIR_RISING) 1164 return -EINVAL; 1165 1166 enable = !!state; 1167 1168 guard(mutex)(&st->lock); 1169 1170 if (st->chip_config.wom_en == enable) 1171 return 0; 1172 1173 return inv_mpu6050_enable_wom(st, enable); 1174 } 1175 1176 static int inv_mpu6050_read_event_value(struct iio_dev *indio_dev, 1177 const struct iio_chan_spec *chan, 1178 enum iio_event_type type, 1179 enum iio_event_direction dir, 1180 enum iio_event_info info, 1181 int *val, int *val2) 1182 { 1183 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1184 u32 rem; 1185 1186 /* support only WoM (accel roc rising) event value */ 1187 if (chan->type != IIO_ACCEL || type != IIO_EV_TYPE_ROC || 1188 dir != IIO_EV_DIR_RISING || info != IIO_EV_INFO_VALUE) 1189 return -EINVAL; 1190 1191 guard(mutex)(&st->lock); 1192 1193 /* return value in micro */ 1194 *val = div_u64_rem(st->chip_config.roc_threshold, 1000000U, &rem); 1195 *val2 = rem; 1196 1197 return IIO_VAL_INT_PLUS_MICRO; 1198 } 1199 1200 static int inv_mpu6050_write_event_value(struct iio_dev *indio_dev, 1201 const struct iio_chan_spec *chan, 1202 enum iio_event_type type, 1203 enum iio_event_direction dir, 1204 enum iio_event_info info, 1205 int val, int val2) 1206 { 1207 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1208 struct device *pdev = regmap_get_device(st->map); 1209 u64 value; 1210 int result; 1211 1212 /* support only WoM (accel roc rising) event value */ 1213 if (chan->type != IIO_ACCEL || type != IIO_EV_TYPE_ROC || 1214 dir != IIO_EV_DIR_RISING || info != IIO_EV_INFO_VALUE) 1215 return -EINVAL; 1216 1217 if (val < 0 || val2 < 0) 1218 return -EINVAL; 1219 1220 guard(mutex)(&st->lock); 1221 1222 result = pm_runtime_resume_and_get(pdev); 1223 if (result) 1224 return result; 1225 1226 value = (u64)val * 1000000ULL + (u64)val2; 1227 result = inv_mpu6050_set_wom_threshold(st, value, INV_MPU6050_FREQ_DIVIDER(st)); 1228 1229 pm_runtime_mark_last_busy(pdev); 1230 pm_runtime_put_autosuspend(pdev); 1231 1232 return result; 1233 } 1234 1235 /* 1236 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate. 1237 * 1238 * Based on the Nyquist principle, the bandwidth of the low 1239 * pass filter must not exceed the signal sampling rate divided 1240 * by 2, or there would be aliasing. 1241 * This function basically search for the correct low pass 1242 * parameters based on the fifo rate, e.g, sampling frequency. 1243 * 1244 * lpf is set automatically when setting sampling rate to avoid any aliases. 1245 */ 1246 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate) 1247 { 1248 static const int hz[] = {400, 200, 90, 40, 20, 10}; 1249 static const int d[] = { 1250 INV_MPU6050_FILTER_200HZ, INV_MPU6050_FILTER_100HZ, 1251 INV_MPU6050_FILTER_45HZ, INV_MPU6050_FILTER_20HZ, 1252 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ 1253 }; 1254 int i, result; 1255 u8 data; 1256 1257 data = INV_MPU6050_FILTER_5HZ; 1258 for (i = 0; i < ARRAY_SIZE(hz); ++i) { 1259 if (rate >= hz[i]) { 1260 data = d[i]; 1261 break; 1262 } 1263 } 1264 result = inv_mpu6050_set_lpf_regs(st, data); 1265 if (result) 1266 return result; 1267 st->chip_config.lpf = data; 1268 1269 return 0; 1270 } 1271 1272 /* 1273 * inv_mpu6050_fifo_rate_store() - Set fifo rate. 1274 */ 1275 static ssize_t 1276 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr, 1277 const char *buf, size_t count) 1278 { 1279 int fifo_rate; 1280 u32 fifo_period; 1281 bool fifo_on; 1282 u8 d; 1283 int result; 1284 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 1285 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1286 struct device *pdev = regmap_get_device(st->map); 1287 1288 if (kstrtoint(buf, 10, &fifo_rate)) 1289 return -EINVAL; 1290 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE || 1291 fifo_rate > INV_MPU6050_MAX_FIFO_RATE) 1292 return -EINVAL; 1293 1294 /* compute the chip sample rate divider */ 1295 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate); 1296 /* compute back the fifo rate to handle truncation cases */ 1297 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d); 1298 fifo_period = NSEC_PER_SEC / fifo_rate; 1299 1300 mutex_lock(&st->lock); 1301 if (d == st->chip_config.divider) { 1302 result = 0; 1303 goto fifo_rate_fail_unlock; 1304 } 1305 1306 fifo_on = st->chip_config.accl_fifo_enable || 1307 st->chip_config.gyro_fifo_enable || 1308 st->chip_config.magn_fifo_enable; 1309 result = inv_sensors_timestamp_update_odr(&st->timestamp, fifo_period, fifo_on); 1310 if (result) 1311 goto fifo_rate_fail_unlock; 1312 1313 result = pm_runtime_resume_and_get(pdev); 1314 if (result) 1315 goto fifo_rate_fail_unlock; 1316 1317 result = regmap_write(st->map, st->reg->sample_rate_div, d); 1318 if (result) 1319 goto fifo_rate_fail_power_off; 1320 st->chip_config.divider = d; 1321 1322 result = inv_mpu6050_set_lpf(st, fifo_rate); 1323 if (result) 1324 goto fifo_rate_fail_power_off; 1325 1326 /* update rate for magn, noop if not present in chip */ 1327 result = inv_mpu_magn_set_rate(st, fifo_rate); 1328 if (result) 1329 goto fifo_rate_fail_power_off; 1330 1331 /* update wom threshold since roc is dependent on sampling frequency */ 1332 result = inv_mpu6050_set_wom_threshold(st, st->chip_config.roc_threshold, 1333 INV_MPU6050_FREQ_DIVIDER(st)); 1334 if (result) 1335 goto fifo_rate_fail_power_off; 1336 1337 pm_runtime_mark_last_busy(pdev); 1338 fifo_rate_fail_power_off: 1339 pm_runtime_put_autosuspend(pdev); 1340 fifo_rate_fail_unlock: 1341 mutex_unlock(&st->lock); 1342 if (result) 1343 return result; 1344 1345 return count; 1346 } 1347 1348 /* 1349 * inv_fifo_rate_show() - Get the current sampling rate. 1350 */ 1351 static ssize_t 1352 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr, 1353 char *buf) 1354 { 1355 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 1356 unsigned fifo_rate; 1357 1358 mutex_lock(&st->lock); 1359 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 1360 mutex_unlock(&st->lock); 1361 1362 return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate); 1363 } 1364 1365 /* 1366 * inv_attr_show() - calling this function will show current 1367 * parameters. 1368 * 1369 * Deprecated in favor of IIO mounting matrix API. 1370 * 1371 * See inv_get_mount_matrix() 1372 */ 1373 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr, 1374 char *buf) 1375 { 1376 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 1377 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 1378 s8 *m; 1379 1380 switch (this_attr->address) { 1381 /* 1382 * In MPU6050, the two matrix are the same because gyro and accel 1383 * are integrated in one chip 1384 */ 1385 case ATTR_GYRO_MATRIX: 1386 case ATTR_ACCL_MATRIX: 1387 m = st->plat_data.orientation; 1388 1389 return scnprintf(buf, PAGE_SIZE, 1390 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n", 1391 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]); 1392 default: 1393 return -EINVAL; 1394 } 1395 } 1396 1397 /** 1398 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense 1399 * MPU6050 device. 1400 * @indio_dev: The IIO device 1401 * @trig: The new trigger 1402 * 1403 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050 1404 * device, -EINVAL otherwise. 1405 */ 1406 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev, 1407 struct iio_trigger *trig) 1408 { 1409 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1410 1411 if (st->trig != trig) 1412 return -EINVAL; 1413 1414 return 0; 1415 } 1416 1417 static const struct iio_mount_matrix * 1418 inv_get_mount_matrix(const struct iio_dev *indio_dev, 1419 const struct iio_chan_spec *chan) 1420 { 1421 struct inv_mpu6050_state *data = iio_priv(indio_dev); 1422 const struct iio_mount_matrix *matrix; 1423 1424 if (chan->type == IIO_MAGN) 1425 matrix = &data->magn_orient; 1426 else 1427 matrix = &data->orientation; 1428 1429 return matrix; 1430 } 1431 1432 static const struct iio_chan_spec_ext_info inv_ext_info[] = { 1433 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix), 1434 { } 1435 }; 1436 1437 static const struct iio_event_spec inv_wom_events[] = { 1438 { 1439 .type = IIO_EV_TYPE_ROC, 1440 .dir = IIO_EV_DIR_RISING, 1441 .mask_separate = BIT(IIO_EV_INFO_ENABLE) | 1442 BIT(IIO_EV_INFO_VALUE), 1443 }, 1444 }; 1445 1446 #define INV_MPU6050_CHAN(_type, _channel2, _index) \ 1447 { \ 1448 .type = _type, \ 1449 .modified = 1, \ 1450 .channel2 = _channel2, \ 1451 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 1452 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 1453 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 1454 .scan_index = _index, \ 1455 .scan_type = { \ 1456 .sign = 's', \ 1457 .realbits = 16, \ 1458 .storagebits = 16, \ 1459 .shift = 0, \ 1460 .endianness = IIO_BE, \ 1461 }, \ 1462 .ext_info = inv_ext_info, \ 1463 } 1464 1465 #define INV_MPU6050_TEMP_CHAN(_index) \ 1466 { \ 1467 .type = IIO_TEMP, \ 1468 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \ 1469 | BIT(IIO_CHAN_INFO_OFFSET) \ 1470 | BIT(IIO_CHAN_INFO_SCALE), \ 1471 .scan_index = _index, \ 1472 .scan_type = { \ 1473 .sign = 's', \ 1474 .realbits = 16, \ 1475 .storagebits = 16, \ 1476 .shift = 0, \ 1477 .endianness = IIO_BE, \ 1478 }, \ 1479 } 1480 1481 #define INV_MPU6050_EVENT_CHAN(_type, _channel2, _events, _events_nb) \ 1482 { \ 1483 .type = _type, \ 1484 .modified = 1, \ 1485 .channel2 = _channel2, \ 1486 .event_spec = _events, \ 1487 .num_event_specs = _events_nb, \ 1488 .scan_index = -1, \ 1489 } 1490 1491 static const struct iio_chan_spec inv_mpu6050_channels[] = { 1492 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP), 1493 1494 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1495 1496 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1497 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1498 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1499 1500 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1501 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1502 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1503 }; 1504 1505 static const struct iio_chan_spec inv_mpu6500_channels[] = { 1506 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP), 1507 1508 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1509 1510 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1511 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1512 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1513 1514 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1515 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1516 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1517 1518 INV_MPU6050_EVENT_CHAN(IIO_ACCEL, IIO_MOD_X_OR_Y_OR_Z, 1519 inv_wom_events, ARRAY_SIZE(inv_wom_events)), 1520 }; 1521 1522 #define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL \ 1523 (BIT(INV_MPU6050_SCAN_ACCL_X) \ 1524 | BIT(INV_MPU6050_SCAN_ACCL_Y) \ 1525 | BIT(INV_MPU6050_SCAN_ACCL_Z)) 1526 1527 #define INV_MPU6050_SCAN_MASK_3AXIS_GYRO \ 1528 (BIT(INV_MPU6050_SCAN_GYRO_X) \ 1529 | BIT(INV_MPU6050_SCAN_GYRO_Y) \ 1530 | BIT(INV_MPU6050_SCAN_GYRO_Z)) 1531 1532 #define INV_MPU6050_SCAN_MASK_TEMP (BIT(INV_MPU6050_SCAN_TEMP)) 1533 1534 static const unsigned long inv_mpu_scan_masks[] = { 1535 /* 3-axis accel */ 1536 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL, 1537 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1538 /* 3-axis gyro */ 1539 INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1540 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1541 /* 6-axis accel + gyro */ 1542 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1543 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1544 | INV_MPU6050_SCAN_MASK_TEMP, 1545 0, 1546 }; 1547 1548 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \ 1549 { \ 1550 .type = IIO_MAGN, \ 1551 .modified = 1, \ 1552 .channel2 = _chan2, \ 1553 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \ 1554 BIT(IIO_CHAN_INFO_RAW), \ 1555 .scan_index = _index, \ 1556 .scan_type = { \ 1557 .sign = 's', \ 1558 .realbits = _bits, \ 1559 .storagebits = 16, \ 1560 .shift = 0, \ 1561 .endianness = IIO_BE, \ 1562 }, \ 1563 .ext_info = inv_ext_info, \ 1564 } 1565 1566 static const struct iio_chan_spec inv_mpu9150_channels[] = { 1567 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP), 1568 1569 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1570 1571 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1572 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1573 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1574 1575 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1576 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1577 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1578 1579 /* Magnetometer resolution is 13 bits */ 1580 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X), 1581 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y), 1582 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z), 1583 }; 1584 1585 static const struct iio_chan_spec inv_mpu9250_channels[] = { 1586 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP), 1587 1588 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1589 1590 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1591 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1592 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1593 1594 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1595 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1596 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1597 1598 /* Magnetometer resolution is 16 bits */ 1599 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X), 1600 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y), 1601 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z), 1602 }; 1603 1604 #define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN \ 1605 (BIT(INV_MPU9X50_SCAN_MAGN_X) \ 1606 | BIT(INV_MPU9X50_SCAN_MAGN_Y) \ 1607 | BIT(INV_MPU9X50_SCAN_MAGN_Z)) 1608 1609 static const unsigned long inv_mpu9x50_scan_masks[] = { 1610 /* 3-axis accel */ 1611 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL, 1612 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1613 /* 3-axis gyro */ 1614 INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1615 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1616 /* 3-axis magn */ 1617 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1618 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP, 1619 /* 6-axis accel + gyro */ 1620 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1621 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1622 | INV_MPU6050_SCAN_MASK_TEMP, 1623 /* 6-axis accel + magn */ 1624 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1625 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1626 | INV_MPU6050_SCAN_MASK_TEMP, 1627 /* 6-axis gyro + magn */ 1628 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1629 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1630 | INV_MPU6050_SCAN_MASK_TEMP, 1631 /* 9-axis accel + gyro + magn */ 1632 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1633 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1634 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1635 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1636 | INV_MPU6050_SCAN_MASK_TEMP, 1637 0, 1638 }; 1639 1640 static const unsigned long inv_icm20602_scan_masks[] = { 1641 /* 3-axis accel + temp (mandatory) */ 1642 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1643 /* 3-axis gyro + temp (mandatory) */ 1644 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1645 /* 6-axis accel + gyro + temp (mandatory) */ 1646 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1647 | INV_MPU6050_SCAN_MASK_TEMP, 1648 0, 1649 }; 1650 1651 /* 1652 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and 1653 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the 1654 * low-pass filter. Specifically, each of these sampling rates are about twice 1655 * the bandwidth of a corresponding low-pass filter, which should eliminate 1656 * aliasing following the Nyquist principle. By picking a frequency different 1657 * from these, the user risks aliasing effects. 1658 */ 1659 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500"); 1660 static IIO_CONST_ATTR(in_anglvel_scale_available, 1661 "0.000133090 0.000266181 0.000532362 0.001064724"); 1662 static IIO_CONST_ATTR(in_accel_scale_available, 1663 "0.000598 0.001196 0.002392 0.004785"); 1664 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show, 1665 inv_mpu6050_fifo_rate_store); 1666 1667 /* Deprecated: kept for userspace backward compatibility. */ 1668 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL, 1669 ATTR_GYRO_MATRIX); 1670 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL, 1671 ATTR_ACCL_MATRIX); 1672 1673 static struct attribute *inv_attributes[] = { 1674 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */ 1675 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */ 1676 &iio_dev_attr_sampling_frequency.dev_attr.attr, 1677 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 1678 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 1679 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr, 1680 NULL, 1681 }; 1682 1683 static const struct attribute_group inv_attribute_group = { 1684 .attrs = inv_attributes 1685 }; 1686 1687 static int inv_mpu6050_reg_access(struct iio_dev *indio_dev, 1688 unsigned int reg, 1689 unsigned int writeval, 1690 unsigned int *readval) 1691 { 1692 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1693 int ret; 1694 1695 mutex_lock(&st->lock); 1696 if (readval) 1697 ret = regmap_read(st->map, reg, readval); 1698 else 1699 ret = regmap_write(st->map, reg, writeval); 1700 mutex_unlock(&st->lock); 1701 1702 return ret; 1703 } 1704 1705 static const struct iio_info mpu_info = { 1706 .read_raw = &inv_mpu6050_read_raw, 1707 .write_raw = &inv_mpu6050_write_raw, 1708 .write_raw_get_fmt = &inv_write_raw_get_fmt, 1709 .attrs = &inv_attribute_group, 1710 .read_event_config = inv_mpu6050_read_event_config, 1711 .write_event_config = inv_mpu6050_write_event_config, 1712 .read_event_value = inv_mpu6050_read_event_value, 1713 .write_event_value = inv_mpu6050_write_event_value, 1714 .validate_trigger = inv_mpu6050_validate_trigger, 1715 .debugfs_reg_access = &inv_mpu6050_reg_access, 1716 }; 1717 1718 /* 1719 * inv_check_and_setup_chip() - check and setup chip. 1720 */ 1721 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st) 1722 { 1723 int result; 1724 unsigned int regval, mask; 1725 int i; 1726 1727 st->hw = &hw_info[st->chip_type]; 1728 st->reg = hw_info[st->chip_type].reg; 1729 memcpy(&st->chip_config, hw_info[st->chip_type].config, 1730 sizeof(st->chip_config)); 1731 st->data = devm_kzalloc(regmap_get_device(st->map), st->hw->fifo_size, GFP_KERNEL); 1732 if (st->data == NULL) 1733 return -ENOMEM; 1734 1735 /* check chip self-identification */ 1736 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val); 1737 if (result) 1738 return result; 1739 if (regval != st->hw->whoami) { 1740 /* check whoami against all possible values */ 1741 for (i = 0; i < INV_NUM_PARTS; ++i) { 1742 if (regval == hw_info[i].whoami) { 1743 dev_warn(regmap_get_device(st->map), 1744 "whoami mismatch got 0x%02x (%s) expected 0x%02x (%s)\n", 1745 regval, hw_info[i].name, 1746 st->hw->whoami, st->hw->name); 1747 break; 1748 } 1749 } 1750 if (i >= INV_NUM_PARTS) { 1751 dev_err(regmap_get_device(st->map), 1752 "invalid whoami 0x%02x expected 0x%02x (%s)\n", 1753 regval, st->hw->whoami, st->hw->name); 1754 return -ENODEV; 1755 } 1756 } 1757 1758 /* reset to make sure previous state are not there */ 1759 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 1760 INV_MPU6050_BIT_H_RESET); 1761 if (result) 1762 return result; 1763 msleep(INV_MPU6050_POWER_UP_TIME); 1764 switch (st->chip_type) { 1765 case INV_MPU6000: 1766 case INV_MPU6500: 1767 case INV_MPU6515: 1768 case INV_MPU6880: 1769 case INV_MPU9250: 1770 case INV_MPU9255: 1771 /* reset signal path (required for spi connection) */ 1772 regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST | 1773 INV_MPU6050_BIT_GYRO_RST; 1774 result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET, 1775 regval); 1776 if (result) 1777 return result; 1778 msleep(INV_MPU6050_POWER_UP_TIME); 1779 break; 1780 default: 1781 break; 1782 } 1783 1784 /* 1785 * Turn power on. After reset, the sleep bit could be on 1786 * or off depending on the OTP settings. Turning power on 1787 * make it in a definite state as well as making the hardware 1788 * state align with the software state 1789 */ 1790 result = inv_mpu6050_set_power_itg(st, true); 1791 if (result) 1792 return result; 1793 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO | 1794 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN; 1795 result = inv_mpu6050_switch_engine(st, false, mask); 1796 if (result) 1797 goto error_power_off; 1798 1799 return 0; 1800 1801 error_power_off: 1802 inv_mpu6050_set_power_itg(st, false); 1803 return result; 1804 } 1805 1806 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st) 1807 { 1808 int result; 1809 1810 result = regulator_enable(st->vddio_supply); 1811 if (result) { 1812 dev_err(regmap_get_device(st->map), 1813 "Failed to enable vddio regulator: %d\n", result); 1814 } else { 1815 /* Give the device a little bit of time to start up. */ 1816 usleep_range(3000, 5000); 1817 } 1818 1819 return result; 1820 } 1821 1822 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st) 1823 { 1824 int result; 1825 1826 result = regulator_disable(st->vddio_supply); 1827 if (result) 1828 dev_err(regmap_get_device(st->map), 1829 "Failed to disable vddio regulator: %d\n", result); 1830 1831 return result; 1832 } 1833 1834 static void inv_mpu_core_disable_regulator_action(void *_data) 1835 { 1836 struct inv_mpu6050_state *st = _data; 1837 int result; 1838 1839 result = regulator_disable(st->vdd_supply); 1840 if (result) 1841 dev_err(regmap_get_device(st->map), 1842 "Failed to disable vdd regulator: %d\n", result); 1843 1844 inv_mpu_core_disable_regulator_vddio(st); 1845 } 1846 1847 static void inv_mpu_pm_disable(void *data) 1848 { 1849 struct device *dev = data; 1850 1851 pm_runtime_disable(dev); 1852 } 1853 1854 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, 1855 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type) 1856 { 1857 struct inv_mpu6050_state *st; 1858 struct iio_dev *indio_dev; 1859 struct inv_mpu6050_platform_data *pdata; 1860 struct device *dev = regmap_get_device(regmap); 1861 int result; 1862 struct irq_data *desc; 1863 int irq_type; 1864 1865 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 1866 if (!indio_dev) 1867 return -ENOMEM; 1868 1869 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS); 1870 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) { 1871 dev_err(dev, "Bad invensense chip_type=%d name=%s\n", 1872 chip_type, name); 1873 return -ENODEV; 1874 } 1875 st = iio_priv(indio_dev); 1876 mutex_init(&st->lock); 1877 st->chip_type = chip_type; 1878 st->irq = irq; 1879 st->map = regmap; 1880 1881 st->level_shifter = device_property_read_bool(dev, 1882 "invensense,level-shifter"); 1883 pdata = dev_get_platdata(dev); 1884 if (!pdata) { 1885 result = iio_read_mount_matrix(dev, &st->orientation); 1886 if (result) { 1887 dev_err(dev, "Failed to retrieve mounting matrix %d\n", 1888 result); 1889 return result; 1890 } 1891 } else { 1892 st->plat_data = *pdata; 1893 } 1894 1895 if (irq > 0) { 1896 desc = irq_get_irq_data(irq); 1897 if (!desc) { 1898 dev_err(dev, "Could not find IRQ %d\n", irq); 1899 return -EINVAL; 1900 } 1901 1902 irq_type = irqd_get_trigger_type(desc); 1903 if (!irq_type) 1904 irq_type = IRQF_TRIGGER_RISING; 1905 } else { 1906 /* Doesn't really matter, use the default */ 1907 irq_type = IRQF_TRIGGER_RISING; 1908 } 1909 1910 if (irq_type & IRQF_TRIGGER_RISING) // rising or both-edge 1911 st->irq_mask = INV_MPU6050_ACTIVE_HIGH; 1912 else if (irq_type == IRQF_TRIGGER_FALLING) 1913 st->irq_mask = INV_MPU6050_ACTIVE_LOW; 1914 else if (irq_type == IRQF_TRIGGER_HIGH) 1915 st->irq_mask = INV_MPU6050_ACTIVE_HIGH | 1916 INV_MPU6050_LATCH_INT_EN; 1917 else if (irq_type == IRQF_TRIGGER_LOW) 1918 st->irq_mask = INV_MPU6050_ACTIVE_LOW | 1919 INV_MPU6050_LATCH_INT_EN; 1920 else { 1921 dev_err(dev, "Invalid interrupt type 0x%x specified\n", 1922 irq_type); 1923 return -EINVAL; 1924 } 1925 device_set_wakeup_capable(dev, true); 1926 1927 st->vdd_supply = devm_regulator_get(dev, "vdd"); 1928 if (IS_ERR(st->vdd_supply)) 1929 return dev_err_probe(dev, PTR_ERR(st->vdd_supply), 1930 "Failed to get vdd regulator\n"); 1931 1932 st->vddio_supply = devm_regulator_get(dev, "vddio"); 1933 if (IS_ERR(st->vddio_supply)) 1934 return dev_err_probe(dev, PTR_ERR(st->vddio_supply), 1935 "Failed to get vddio regulator\n"); 1936 1937 result = regulator_enable(st->vdd_supply); 1938 if (result) { 1939 dev_err(dev, "Failed to enable vdd regulator: %d\n", result); 1940 return result; 1941 } 1942 msleep(INV_MPU6050_POWER_UP_TIME); 1943 1944 result = inv_mpu_core_enable_regulator_vddio(st); 1945 if (result) { 1946 regulator_disable(st->vdd_supply); 1947 return result; 1948 } 1949 1950 result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action, 1951 st); 1952 if (result) { 1953 dev_err(dev, "Failed to setup regulator cleanup action %d\n", 1954 result); 1955 return result; 1956 } 1957 1958 /* fill magnetometer orientation */ 1959 result = inv_mpu_magn_set_orient(st); 1960 if (result) 1961 return result; 1962 1963 /* power is turned on inside check chip type*/ 1964 result = inv_check_and_setup_chip(st); 1965 if (result) 1966 return result; 1967 1968 result = inv_mpu6050_init_config(indio_dev); 1969 if (result) { 1970 dev_err(dev, "Could not initialize device.\n"); 1971 goto error_power_off; 1972 } 1973 1974 dev_set_drvdata(dev, indio_dev); 1975 /* name will be NULL when enumerated via ACPI */ 1976 if (name) 1977 indio_dev->name = name; 1978 else 1979 indio_dev->name = dev_name(dev); 1980 1981 /* requires parent device set in indio_dev */ 1982 if (inv_mpu_bus_setup) { 1983 result = inv_mpu_bus_setup(indio_dev); 1984 if (result) 1985 goto error_power_off; 1986 } 1987 1988 /* chip init is done, turning on runtime power management */ 1989 result = pm_runtime_set_active(dev); 1990 if (result) 1991 goto error_power_off; 1992 pm_runtime_get_noresume(dev); 1993 pm_runtime_enable(dev); 1994 pm_runtime_set_autosuspend_delay(dev, INV_MPU6050_SUSPEND_DELAY_MS); 1995 pm_runtime_use_autosuspend(dev); 1996 pm_runtime_put(dev); 1997 result = devm_add_action_or_reset(dev, inv_mpu_pm_disable, dev); 1998 if (result) 1999 return result; 2000 2001 switch (chip_type) { 2002 case INV_MPU6000: 2003 case INV_MPU6050: 2004 indio_dev->channels = inv_mpu6050_channels; 2005 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6050_channels); 2006 indio_dev->available_scan_masks = inv_mpu_scan_masks; 2007 break; 2008 case INV_MPU9150: 2009 indio_dev->channels = inv_mpu9150_channels; 2010 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels); 2011 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks; 2012 break; 2013 case INV_MPU9250: 2014 case INV_MPU9255: 2015 indio_dev->channels = inv_mpu9250_channels; 2016 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels); 2017 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks; 2018 break; 2019 case INV_ICM20600: 2020 case INV_ICM20602: 2021 indio_dev->channels = inv_mpu6500_channels; 2022 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6500_channels); 2023 indio_dev->available_scan_masks = inv_icm20602_scan_masks; 2024 break; 2025 default: 2026 indio_dev->channels = inv_mpu6500_channels; 2027 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6500_channels); 2028 indio_dev->available_scan_masks = inv_mpu_scan_masks; 2029 break; 2030 } 2031 /* 2032 * Use magnetometer inside the chip only if there is no i2c 2033 * auxiliary device in use. Otherwise Going back to 6-axis only. 2034 */ 2035 if (st->magn_disabled) { 2036 switch (chip_type) { 2037 case INV_MPU9150: 2038 indio_dev->channels = inv_mpu6050_channels; 2039 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6050_channels); 2040 indio_dev->available_scan_masks = inv_mpu_scan_masks; 2041 break; 2042 default: 2043 indio_dev->channels = inv_mpu6500_channels; 2044 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6500_channels); 2045 indio_dev->available_scan_masks = inv_mpu_scan_masks; 2046 break; 2047 } 2048 } 2049 2050 indio_dev->info = &mpu_info; 2051 2052 if (irq > 0) { 2053 /* 2054 * The driver currently only supports buffered capture with its 2055 * own trigger. So no IRQ, no trigger, no buffer 2056 */ 2057 result = devm_iio_triggered_buffer_setup(dev, indio_dev, 2058 iio_pollfunc_store_time, 2059 inv_mpu6050_read_fifo, 2060 NULL); 2061 if (result) { 2062 dev_err(dev, "configure buffer fail %d\n", result); 2063 return result; 2064 } 2065 2066 result = inv_mpu6050_probe_trigger(indio_dev, irq_type); 2067 if (result) { 2068 dev_err(dev, "trigger probe fail %d\n", result); 2069 return result; 2070 } 2071 } 2072 2073 result = devm_iio_device_register(dev, indio_dev); 2074 if (result) { 2075 dev_err(dev, "IIO register fail %d\n", result); 2076 return result; 2077 } 2078 2079 return 0; 2080 2081 error_power_off: 2082 inv_mpu6050_set_power_itg(st, false); 2083 return result; 2084 } 2085 EXPORT_SYMBOL_NS_GPL(inv_mpu_core_probe, IIO_MPU6050); 2086 2087 static int inv_mpu_resume(struct device *dev) 2088 { 2089 struct iio_dev *indio_dev = dev_get_drvdata(dev); 2090 struct inv_mpu6050_state *st = iio_priv(indio_dev); 2091 bool wakeup; 2092 int result; 2093 2094 guard(mutex)(&st->lock); 2095 2096 wakeup = device_may_wakeup(dev) && st->chip_config.wom_en; 2097 2098 if (wakeup) { 2099 enable_irq(st->irq); 2100 disable_irq_wake(st->irq); 2101 result = inv_mpu6050_set_wom_lp(st, false); 2102 if (result) 2103 return result; 2104 } else { 2105 result = inv_mpu_core_enable_regulator_vddio(st); 2106 if (result) 2107 return result; 2108 result = inv_mpu6050_set_power_itg(st, true); 2109 if (result) 2110 return result; 2111 } 2112 2113 pm_runtime_disable(dev); 2114 pm_runtime_set_active(dev); 2115 pm_runtime_enable(dev); 2116 2117 result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors); 2118 if (result) 2119 return result; 2120 2121 if (st->chip_config.wom_en && !wakeup) { 2122 result = inv_mpu6050_set_wom_int(st, true); 2123 if (result) 2124 return result; 2125 } 2126 2127 if (iio_buffer_enabled(indio_dev)) 2128 result = inv_mpu6050_prepare_fifo(st, true); 2129 2130 return result; 2131 } 2132 2133 static int inv_mpu_suspend(struct device *dev) 2134 { 2135 struct iio_dev *indio_dev = dev_get_drvdata(dev); 2136 struct inv_mpu6050_state *st = iio_priv(indio_dev); 2137 bool wakeup; 2138 int result; 2139 2140 guard(mutex)(&st->lock); 2141 2142 st->suspended_sensors = 0; 2143 if (pm_runtime_suspended(dev)) 2144 return 0; 2145 2146 if (iio_buffer_enabled(indio_dev)) { 2147 result = inv_mpu6050_prepare_fifo(st, false); 2148 if (result) 2149 return result; 2150 } 2151 2152 wakeup = device_may_wakeup(dev) && st->chip_config.wom_en; 2153 2154 if (st->chip_config.wom_en && !wakeup) { 2155 result = inv_mpu6050_set_wom_int(st, false); 2156 if (result) 2157 return result; 2158 } 2159 2160 if (st->chip_config.accl_en && !wakeup) 2161 st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL; 2162 if (st->chip_config.gyro_en) 2163 st->suspended_sensors |= INV_MPU6050_SENSOR_GYRO; 2164 if (st->chip_config.temp_en) 2165 st->suspended_sensors |= INV_MPU6050_SENSOR_TEMP; 2166 if (st->chip_config.magn_en) 2167 st->suspended_sensors |= INV_MPU6050_SENSOR_MAGN; 2168 if (st->chip_config.wom_en && !wakeup) 2169 st->suspended_sensors |= INV_MPU6050_SENSOR_WOM; 2170 result = inv_mpu6050_switch_engine(st, false, st->suspended_sensors); 2171 if (result) 2172 return result; 2173 2174 if (wakeup) { 2175 result = inv_mpu6050_set_wom_lp(st, true); 2176 if (result) 2177 return result; 2178 enable_irq_wake(st->irq); 2179 disable_irq(st->irq); 2180 } else { 2181 result = inv_mpu6050_set_power_itg(st, false); 2182 if (result) 2183 return result; 2184 inv_mpu_core_disable_regulator_vddio(st); 2185 } 2186 2187 return 0; 2188 } 2189 2190 static int inv_mpu_runtime_suspend(struct device *dev) 2191 { 2192 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev)); 2193 unsigned int sensors; 2194 int ret; 2195 2196 mutex_lock(&st->lock); 2197 2198 sensors = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO | 2199 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN | 2200 INV_MPU6050_SENSOR_WOM; 2201 ret = inv_mpu6050_switch_engine(st, false, sensors); 2202 if (ret) 2203 goto out_unlock; 2204 2205 ret = inv_mpu6050_set_power_itg(st, false); 2206 if (ret) 2207 goto out_unlock; 2208 2209 inv_mpu_core_disable_regulator_vddio(st); 2210 2211 out_unlock: 2212 mutex_unlock(&st->lock); 2213 return ret; 2214 } 2215 2216 static int inv_mpu_runtime_resume(struct device *dev) 2217 { 2218 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev)); 2219 int ret; 2220 2221 ret = inv_mpu_core_enable_regulator_vddio(st); 2222 if (ret) 2223 return ret; 2224 2225 return inv_mpu6050_set_power_itg(st, true); 2226 } 2227 2228 EXPORT_NS_GPL_DEV_PM_OPS(inv_mpu_pmops, IIO_MPU6050) = { 2229 SYSTEM_SLEEP_PM_OPS(inv_mpu_suspend, inv_mpu_resume) 2230 RUNTIME_PM_OPS(inv_mpu_runtime_suspend, inv_mpu_runtime_resume, NULL) 2231 }; 2232 2233 MODULE_AUTHOR("Invensense Corporation"); 2234 MODULE_DESCRIPTION("Invensense device MPU6050 driver"); 2235 MODULE_LICENSE("GPL"); 2236 MODULE_IMPORT_NS(IIO_INV_SENSORS_TIMESTAMP); 2237