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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3566-soquartz-blade.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
10 #include "rk3566-soquartz.dtsi"
14 compatible = "pine64,soquartz-blad
[all...]
H A Drk3566-soquartz-cm4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "rk3566-soquartz.dtsi"
8 model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board";
9 compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566";
16 vcc12v_dcin: vcc12v-dcin-regulator {
17 compatible = "regulator-fixe
[all...]
H A Drk3566-soquartz-model-a.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "rk3566-soquartz.dtsi"
9 compatible = "pine64,soquartz-model-a", "pine64,soquartz", "rockchip,rk3566";
16 vcc12v_dcin: vcc12v-dcin-regulator {
17 compatible = "regulator-fixe
[all...]
H A Drk3566-soquartz.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
21 stdout-path = "serial2:1500000n8";
24 gmac1_clkin: external-gmac1-cloc
[all...]
H A Drk3568-bpi-r2-pro.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Author: Frank Wunderlich <frank-w@public-files.de>
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/soc/rockchip,vop2.h>
15 model = "Bananapi-R2 Pro (RK3568) DDR4 Board";
16 compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568";
26 stdout-path = "serial2:1500000n8";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dcirrus,cs35l41.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - david.rhodes@cirrus.com
19 - cirrus,cs35l40
20 - cirrus,cs35l41
28 '#sound-dai-cells':
33 reset-gpios:
36 VA-supply:
39 VP-supply:
[all …]
H A Dwm8960.txt7 - compatible : "wlf,wm8960"
9 - reg : the I2C address of the device.
12 - wlf,shared-lrclk: This is a boolean property. If present, the LRCM bit of
16 When wm8960 works on synchronize mode and DACLRC pin is used to supply
18 DACLRC pin. If shared-lrclk is present, no need to enable DAC for captrue.
20 - wlf,capless: This is a boolean property. If present, OUT3 pin will be
24 - wlf,hp-cfg: A list of headphone jack detect configuration register values.
26 hp-cfg[0]: HPSEL[1:0] of R48 (Additional Control 4).
27 hp-cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2).
28 hp-cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1).
[all …]
H A Dwlf,wm8960.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...]
H A Dmt8195-afe-pcm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mt8195-af
[all...]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Daxp20x.txt4 axp152 (X-Powers)
5 axp202 (X-Powers)
6 axp209 (X-Powers)
7 axp221 (X-Powers)
8 axp223 (X-Powers)
9 axp803 (X-Powers)
10 axp806 (X-Powers)
11 axp809 (X-Powers)
12 axp813 (X-Powers)
20 - compatible: should be one of:
[all …]
/freebsd/sys/dev/regulator/
H A Dregulator_fixed.c1 /*-
53 /* GPIO list for shared pins. */
96 * The GPIO pin is registerd and reseved for first consumer, all others share
106 busdev = GPIO_GET_BUS(gpio_pin->dev); in regnode_get_gpio_entry()
115 if (tmp->gpio_pin.dev == gpio_pin->dev && in regnode_get_gpio_entry()
116 tmp->gpio_pin.pin == gpio_pin->pin) { in regnode_get_gpio_entry()
117 tmp->use_cnt++; in regnode_get_gpio_entry()
124 /* Reserve pin. */ in regnode_get_gpio_entry()
126 rv = gpiobus_acquire_pin(busdev, gpio_pin->pin); in regnode_get_gpio_entry()
133 entry->gpio_pin = *gpio_pin; in regnode_get_gpio_entry()
[all …]
/freebsd/contrib/libfido2/src/
H A Dpin.c2 * Copyright (c) 2018-2022 Yubico AB. All rights reserved.
3 * Use of this source code is governed by a BSD-style
5 * SPDX-License-Identifier: BSD-2-Clause
22 if ((digest->ptr = calloc(1, SHA256_DIGEST_LENGTH)) == NULL) in fido_sha256()
23 return (-1); in fido_sha256()
25 digest->len = SHA256_DIGEST_LENGTH; in fido_sha256()
27 if (SHA256(data, data_len, digest->ptr) != digest->ptr) { in fido_sha256()
29 return (-1); in fido_sha256()
36 pin_sha256_enc(const fido_dev_t *dev, const fido_blob_t *shared, in pin_sha256_enc() argument
37 const fido_blob_t *pin, fido_blob_t **out) in pin_sha256_enc() argument
[all …]
/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Drenesas,rcar-gyroadc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car GyroADC
10 - Marek Vasut <marek.vasut+renesas@gmail.com>
15 are sampled by the GyroADC block in a round-robin fashion and the result
23 - enum:
24 - renesas,r8a7791-gyroadc
25 - renesas,r8a7792-gyroadc
[all …]
H A Drenesas,gyroadc.txt1 * Renesas R-Car GyroADC device driver
5 are sampled by the GyroADC block in a round-robin fashion and the result
9 - compatible: Should be "<soc-specific>", "renesas,rcar-gyroadc".
10 The <soc-specific> should be one of:
11 renesas,r8a7791-gyroadc - for the GyroADC block present
13 renesas,r8a7792-gyroadc - for the GyroADC with interrupt
15 - reg: Address and length of the register set for the device
16 - clocks: References to all the clocks specified in the clock-names
18 Documentation/devicetree/bindings/clock/clock-bindings.txt.
19 - clock-names: Shall contain "fck". The "fck" is the GyroADC block clock.
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 chassis-type = "embedded";
19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-suppl
[all...]
H A Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
17 model = "Bananapi BPI-R64";
18 chassis-type = "embedded";
19 compatible = "bananapi,bpi-r6
[all...]
/freebsd/usr.sbin/bhyve/amd64/
H A Dpci_irq.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
49 * Implement an 8 pin PCI interrupt router compatible with the router
57 /* Only IRQs 3-7, 9-12, and 14-15 are permitted. */
77 * Returns true if this pin is enabled with a valid IRQ. Setting the
79 * if the pin was disabled.
91 pirq_read(int pin) in pirq_read() argument
94 assert(pin > 0 && pin <= NPIRQS); in pirq_read()
95 return (pirqs[pin - 1].reg); in pirq_read()
99 pirq_write(struct vmctx *ctx, int pin, uint8_t val) in pirq_write() argument
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dfsl,imx-pinctrl.txt10 Please refer to pinctrl-bindings.txt in this directory for details of the
12 phrase "pin configuration node".
14 Freescale IMX pin configuration node is a node of a group of pins which can be
17 mode) this pin can work on and the 'config' configures various pad settings
18 such as pull-up, open drain, drive strength, etc.
21 - compatible: "fsl,<soc>-iomuxc"
22 Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs.
24 Required properties for pin configuration node:
25 - fsl,pins: each entry consists of 6 integers and represents the mux and config
26 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
[all …]
H A Datmel,at91-pinctrl.txt10 Please refer to pinctrl-bindings.txt in this directory for details of the
12 phrase "pin configuration node".
14 Atmel AT91 pin configuration node is a node of a group of pins which can be
16 of the pins in that group. The 'pins' selects the function mode(also named pin
17 mode) this pin can work on and the 'config' configures various pad settings
18 such as pull-up, multi drive, etc.
21 - compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
22 or "atmel,sama5d3-pinctrl" or "microchip,sam9x60-pinctrl"
23 - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
41 For each peripheral/bank we will describe in a u32 if a pin can be
[all …]
H A Dpinctrl-st.txt1 *ST pin controller.
3 Each multi-function pin is controlled, driven and routed through the
4 PIO multiplexing block. Each pin supports GPIO functionality (ALT0)
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
6 the pin to different hardware blocks.
8 When a pin is in GPIO mode, Output Enable (OE), Open Drain(OD), and
12 gpio driver to configure a pin.
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
[all …]
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dibm,ppc4xx-gpio.txt3 All GPIOs are pin-shared with other functions. DCRs control whether a
4 particular pin that has GPIO capabilities acts as a GPIO or is used for
6 an open-drain driver.
9 - compatible: must be "ibm,ppc4xx-gpio"
10 - reg: address and length of the register set for the device
11 - #gpio-cells: must be set to 2. The first cell is the pin number
15 - gpio-controller: marks the device node as a gpio controller.
20 compatible = "ibm,ppc4xx-gpio";
22 #gpio-cells = <2>;
23 gpio-controller;
H A Dbrcm,brcmstb-gpio.txt3 The controller's registers are organized as sets of eight 32-bit
5 interrupt is shared for all of the banks handled by the controller.
9 - compatible:
10 Must be "brcm,brcmstb-gpio"
12 - reg:
16 - #gpio-cells:
17 Should be <2>. The first cell is the pin number (within the controller's
18 pin space), and the second is used for the following:
19 bit[0]: polarity (0 for active-high, 1 for active-low)
21 - gpio-controller:
[all …]
H A Dbrcm,brcmstb-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/brcm,brcmstb-gpi
[all...]
/freebsd/sys/contrib/device-tree/Bindings/input/
H A Dnvidia,tegra20-kbc.txt2 The key controller has maximum 24 pins to make matrix keypad. Any pin
3 can be configured as row or column. The maximum column pin can be 8
7 - compatible: "nvidia,tegra20-kbc"
8 - reg: Register base address of KBC.
9 - interrupts: Interrupt number for the KBC.
10 - nvidia,kbc-row-pins: The KBC pins which are configured as row. This is an
11 array of pin numbers which is used as rows.
12 - nvidia,kbc-col-pins: The KBC pins which are configured as column. This is an
13 array of pin numbers which is used as column.
14 - linux,keymap: The keymap for keys as described in the binding document
[all …]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-href-tvk1281618-r2.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/input/input.h>
11 compatible = "gpio-keys";
12 #address-cell
[all...]

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