1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
49  * Implement an 8 pin PCI interrupt router compatible with the router
57 /* Only IRQs 3-7, 9-12, and 14-15 are permitted. */
77  * Returns true if this pin is enabled with a valid IRQ.  Setting the
79  * if the pin was disabled.
91 pirq_read(int pin)  in pirq_read()  argument
94 	assert(pin > 0 && pin <= NPIRQS);  in pirq_read()
95 	return (pirqs[pin - 1].reg);  in pirq_read()
99 pirq_write(struct vmctx *ctx, int pin, uint8_t val)  in pirq_write()  argument
103 	assert(pin > 0 && pin <= NPIRQS);  in pirq_write()
104 	pirq = &pirqs[pin - 1];  in pirq_write()
105 	pthread_mutex_lock(&pirq->lock);  in pirq_write()
106 	if (pirq->reg != (val & (PIRQ_DIS | PIRQ_IRQ))) {  in pirq_write()
107 		if (pirq->active_count != 0 && pirq_valid_irq(pirq->reg))  in pirq_write()
108 			vm_isa_deassert_irq(ctx, pirq->reg & PIRQ_IRQ, -1);  in pirq_write()
109 		pirq->reg = val & (PIRQ_DIS | PIRQ_IRQ);  in pirq_write()
110 		if (pirq->active_count != 0 && pirq_valid_irq(pirq->reg))  in pirq_write()
111 			vm_isa_assert_irq(ctx, pirq->reg & PIRQ_IRQ, -1);  in pirq_write()
113 	pthread_mutex_unlock(&pirq->lock);  in pirq_write()
159 	int pin;  in pci_irq_assert()  local
161 	pin = pi->pi_lintr.irq.pirq_pin;  in pci_irq_assert()
162 	if (pin > 0) {  in pci_irq_assert()
163 		assert(pin <= NPIRQS);  in pci_irq_assert()
164 		pirq = &pirqs[pin - 1];  in pci_irq_assert()
165 		pthread_mutex_lock(&pirq->lock);  in pci_irq_assert()
166 		pirq->active_count++;  in pci_irq_assert()
167 		if (pirq->active_count == 1 && pirq_valid_irq(pirq->reg)) {  in pci_irq_assert()
168 			vm_isa_assert_irq(pi->pi_vmctx, pirq->reg & PIRQ_IRQ,  in pci_irq_assert()
169 			    pi->pi_lintr.irq.ioapic_irq);  in pci_irq_assert()
170 			pthread_mutex_unlock(&pirq->lock);  in pci_irq_assert()
173 		pthread_mutex_unlock(&pirq->lock);  in pci_irq_assert()
175 	vm_ioapic_assert_irq(pi->pi_vmctx, pi->pi_lintr.irq.ioapic_irq);  in pci_irq_assert()
182 	int pin;  in pci_irq_deassert()  local
184 	pin = pi->pi_lintr.irq.pirq_pin;  in pci_irq_deassert()
185 	if (pin > 0) {  in pci_irq_deassert()
186 		assert(pin <= NPIRQS);  in pci_irq_deassert()
187 		pirq = &pirqs[pin - 1];  in pci_irq_deassert()
188 		pthread_mutex_lock(&pirq->lock);  in pci_irq_deassert()
189 		pirq->active_count--;  in pci_irq_deassert()
190 		if (pirq->active_count == 0 && pirq_valid_irq(pirq->reg)) {  in pci_irq_deassert()
191 			vm_isa_deassert_irq(pi->pi_vmctx, pirq->reg & PIRQ_IRQ,  in pci_irq_deassert()
192 			    pi->pi_lintr.irq.ioapic_irq);  in pci_irq_deassert()
193 			pthread_mutex_unlock(&pirq->lock);  in pci_irq_deassert()
196 		pthread_mutex_unlock(&pirq->lock);  in pci_irq_deassert()
198 	vm_ioapic_deassert_irq(pi->pi_vmctx, pi->pi_lintr.irq.ioapic_irq);  in pci_irq_deassert()
204 	struct vmctx *ctx = pi->pi_vmctx;  in pirq_alloc_pin()
205 	int best_count, best_irq, best_pin, irq, pin;  in pirq_alloc_pin()  local
211 		best_pin = (4 + pi->pi_slot + pi->pi_lintr.pin) % 8;  in pirq_alloc_pin()
213 		/* Find the least-used PIRQ pin. */  in pirq_alloc_pin()
216 		for (pin = 1; pin < NPIRQS; pin++) {  in pirq_alloc_pin()
217 			if (pirqs[pin].use_count < best_count) {  in pirq_alloc_pin()
218 				best_pin = pin;  in pirq_alloc_pin()
219 				best_count = pirqs[pin].use_count;  in pirq_alloc_pin()
225 	/* Second, route this pin to an IRQ. */  in pirq_alloc_pin()
227 		best_irq = -1;  in pirq_alloc_pin()
232 			if (best_irq == -1 || irq_counts[irq] < best_count) {  in pirq_alloc_pin()
247 pirq_irq(int pin)  in pirq_irq()  argument
249 	assert(pin > 0 && pin <= NPIRQS);  in pirq_irq()
250 	return (pirqs[pin - 1].reg & PIRQ_IRQ);  in pirq_irq()
257 	 * Attempt to allocate an I/O APIC pin for this intpin if one  in pci_irq_route()
260 	if (irq->ioapic_irq == 0)  in pci_irq_route()
261 		irq->ioapic_irq = ioapic_pci_alloc_irq(pi);  in pci_irq_route()
262 	assert(irq->ioapic_irq > 0);  in pci_irq_route()
265 	 * Attempt to allocate a PIRQ pin for this intpin if one is  in pci_irq_route()
268 	if (irq->pirq_pin == 0)  in pci_irq_route()
269 		irq->pirq_pin = pirq_alloc_pin(pi);  in pci_irq_route()
270 	assert(irq->pirq_pin > 0);  in pci_irq_route()
279 	int irq, pin;  in pirq_dsdt()  local
321 	for (pin = 0; pin < NPIRQS; pin++) {  in pirq_dsdt()
323 		dsdt_line("Device (LNK%c)", 'A' + pin);  in pirq_dsdt()
326 		dsdt_line("  Name (_UID, 0x%02X)", pin + 1);  in pirq_dsdt()
329 		dsdt_line("    If (PIRV (PIR%c))", 'A' + pin);  in pirq_dsdt()
340 		dsdt_line("    IRQ (Level, ActiveLow, Shared, )");  in pirq_dsdt()
343 		dsdt_line("  Name (CB%02X, ResourceTemplate ()", pin + 1);  in pirq_dsdt()
345 		dsdt_line("    IRQ (Level, ActiveLow, Shared, )");  in pirq_dsdt()
349 		    pin + 1, 'A' + pin);  in pirq_dsdt()
352 		dsdt_line("    And (PIR%c, 0x%02X, Local0)", 'A' + pin,  in pirq_dsdt()
356 		dsdt_line("      ShiftLeft (0x01, Local0, CIR%c)", 'A' + pin);  in pirq_dsdt()
360 		dsdt_line("      Store (0x00, CIR%c)", 'A' + pin);  in pirq_dsdt()
362 		dsdt_line("    Return (CB%02X)", pin + 1);  in pirq_dsdt()
366 		dsdt_line("    Store (0x80, PIR%c)", 'A' + pin);  in pirq_dsdt()
370 		dsdt_line("    CreateWordField (Arg0, 0x01, SIR%c)", 'A' + pin);  in pirq_dsdt()
371 		dsdt_line("    FindSetRightBit (SIR%c, Local0)", 'A' + pin);  in pirq_dsdt()
372 		dsdt_line("    Store (Decrement (Local0), PIR%c)", 'A' + pin);  in pirq_dsdt()