Lines Matching +full:shared +full:- +full:pin
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "rk3566-soquartz.dtsi"
8 model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board";
9 compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566";
16 vcc12v_dcin: vcc12v-dcin-regulator {
17 compatible = "regulator-fixed";
18 regulator-name = "vcc12v_dcin";
19 regulator-always-on;
20 regulator-boot-on;
21 regulator-min-microvolt = <12000000>;
22 regulator-max-microvolt = <12000000>;
26 vcc_5v: vcc-5v-regulator {
27 compatible = "regulator-fixed";
28 regulator-name = "vcc_5v";
29 regulator-always-on;
30 regulator-boot-on;
31 regulator-min-microvolt = <5000000>;
32 regulator-max-microvolt = <5000000>;
33 vin-supply = <&vcc12v_dcin>;
36 vcc_sd_pwr: vcc-sd-pwr-regulator {
37 compatible = "regulator-fixed";
38 regulator-name = "vcc_sd_pwr";
39 regulator-always-on;
40 regulator-boot-on;
41 regulator-min-microvolt = <3300000>;
42 regulator-max-microvolt = <3300000>;
43 vin-supply = <&vcc3v3_sys>;
49 phy-supply = <&vcc3v3_sys>;
59 * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
60 * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
76 * i2c2 is exposed on CM1 / Module1A - to PI40
77 * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
78 * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
85 * i2c3 is exposed on CM1 / Module1A - to PI40
86 * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
87 * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
94 * i2c4 is exposed on CM2 / Module1B - to PI40
95 * pin 45 - GPIO24 - i2c4_scl_m1
96 * pin 47 - GPIO23 - i2c4_sda_m1
103 * i2s1_8ch is exposed on CM1 / Module1A - to PI40
104 * pin 24 - GPIO26 - i2s1_sdi1_m1
105 * pin 25 - GPIO21 - i2s1_sdo0_m1
106 * pin 26 - GPIO19 - i2s1_lrck_tx_m1
107 * pin 27 - GPIO20 - i2s1_sdi0_m1
108 * pin 29 - GPIO16 - i2s1_sdi3_m1
109 * pin 30 - GPIO6 - i2s1_sdi2_m1
110 * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3
111 * pin 41 - GPIO25 - i2s1_sdo2_m1
112 * pin 49 - GPIO18 - i2s1_sclk_tx_m1
113 * pin 50 - GPIO17 - i2s1_mclk_m1
114 * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2
129 vpcie3v3-supply = <&vcc_3v3>;
138 * saradc is exposed on CM1 / Module1A - to J2
139 * pin 94 - AIN1 - saradc_vin3
140 * pin 96 - AIN0 - saradc_vin2
147 vmmc-supply = <&vcc_sd_pwr>;
152 * spi3 is exposed on CM1 / Module1A - to PI40
153 * pin 37 - GPIO7 - spi3_cs1_m0
154 * pin 38 - GPIO11 - spi3_clk_m0
155 * pin 39 - GPIO8 - spi3_cs0_m0
156 * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch
157 * pin 44 - GPIO10 - spi3_mosi_m0
164 * uart2 is exposed on CM1 / Module1A - to PI40
165 * pin 51 - GPIO15 - uart2_rx_m0
166 * pin 55 - GPIO14 - uart2_tx_m0
173 * uart7 is exposed on CM1 / Module1A - to PI40
174 * pin 46 - GPIO22 - uart7_tx_m2
175 * pin 47 - GPIO23 - uart7_rx_m2
186 phy-supply = <&vcc_5v>;
195 vin-supply = <&vcc_5v>;