Searched +full:pse +full:- +full:pi (Results 1 – 12 of 12) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.0-only15 /* Maximum current in uA according to IEEE 802.3-2022 Table 145-1 */17 /* Maximum power in mW according to IEEE 802.3-2022 Table 145-16 */25 /* C33 PSE extended state and substate. */46 * struct pse_irq_desc - notification sender description for IRQ based events.49 * @map_event: driver callback to map IRQ status into PSE devices with events.59 * struct pse_control_config - PSE control/channel configuration.61 * @podl_admin_control: set PoDL PSE admin control as described in62 * IEEE 802.3-2018 30.15.1.2.1 acPoDLPSEAdminControl63 * @c33_admin_control: set PSE admin control as described in[all …]
1 .. SPDX-License-Identifier: GPL-2.03 PSE Power Interface (PSE PI) Documentation6 The Power Sourcing Equipment Power Interface (PSE PI) plays a pivotal role in9 eight-pin modular jack, commonly known as the Ethernet RJ45 port. This14 ---------------------------16 The IEEE 802.3 standard provides detailed documentation on the PSE PI.19 - Section "33.2.3 PI pin assignments" covers the pin assignments for PoE21 - Section "145.2.4 PSE PI" addresses the configuration for PoE systems that24 PSE PI and Single Pair Ethernet25 -------------------------------[all …]
1 .. SPDX-License-Identifier: GPL-2.03 Power Sourcing Equipment (PSE) Documentation10 pse-pi
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/net/pse-pd/pse-controller.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Power Sourcing Equipment (PSE).9 description: Binding for the Power Sourcing Equipment (PSE) as defined in the11 power over twisted pair/ethernet cable. The ethernet-pse nodes should be12 used to describe PSE controller and referenced by the ethernet-phy node.15 - Oleksij Rempel <o.rempel@pengutronix.de>16 - Kory Maincent <kory.maincent@bootlin.com>[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/net/pse-pd/microchip,pd692x0.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Kory Maincent <kory.maincent@bootlin.com>13 - $ref: pse-controller.yaml#18 - microchip,pd6920019 - microchip,pd6921020 - microchip,pd6922025 vdd-supply:[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Driver for the TI TPS23881 PoE PSE Controller driver (I2C bus)16 #include <linux/pse-pd/pse.h>92 * @param chan: The channel number (0-7).112 * @param chan: The channel number (0-7).139 struct i2c_client *client = priv->client; in tps23881_pi_set_pw_pol_limit()144 chan = priv->port[id].chan[0]; in tps23881_pi_set_pw_pol_limit()148 /* One chan is enough to configure the 4p PI power limit */ in tps23881_pi_set_pw_pol_limit()165 struct i2c_client *client = priv->client; in tps23881_pi_enable_manual_pol()178 chan = priv->port[id].chan[0]; in tps23881_pi_enable_manual_pol()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Driver for the Microchip PD692X0 PoE PSE Controller driver (I2C bus)14 #include <linux/pse-pd/pse.h>117 /* Template list of communication messages. The non-null bytes defined here214 msg->echo = echo++; in pd692x0_build_msg()218 for (i = 0; i < sizeof(*msg) - sizeof(msg->chksum); i++) in pd692x0_build_msg()221 msg->chksum = cpu_to_be16(chksum); in pd692x0_build_msg()228 const struct i2c_client *client = priv->client; in pd692x0_send_msg()231 if (msg->key == PD692X0_KEY_CMD && priv->last_cmd_key) { in pd692x0_send_msg()234 cmd_msleep = 30 - jiffies_to_msecs(jiffies - priv->last_cmd_key_time); in pd692x0_send_msg()[all …]
4 * © Copyright 1995-2003 by Geert Uytterhoeven (geert@linux-m68k.org)7 * ---------------------------------------------------------------------------12 * Written 1993-94 by Donald Becker.14 * Am79C960: PCnet(tm)-ISA Single-Chip Ethernet Controller18 * MC68230: Parallel Interface/Timer (PI/T)21 * ---------------------------------------------------------------------------27 * ---------------------------------------------------------------------------29 * The Ariadne is a Zorro-II board made by Village Tronic. It contains:31 * - an Am79C960 PCnet-ISA Single-Chip Ethernet Controller with both32 * 10BASE-2 (thin coax) and 10BASE-T (UTP) connectors[all …]
4 * © Copyright 1995 by Geert Uytterhoeven (geert@linux-m68k.org)8 * ----------------------------------------------------------------------------------13 * Written 1993-94 by Donald Becker.15 * Am79C960: PCnet(tm)-ISA Single-Chip Ethernet Controller19 * MC68230: Parallel Interface/Timer (PI/T)22 * ----------------------------------------------------------------------------------28 * ----------------------------------------------------------------------------------30 * The Ariadne is a Zorro-II board made by Village Tronic. It contains:32 * - an Am79C960 PCnet-ISA Single-Chip Ethernet Controller with both33 * 10BASE-2 (thin coax) and 10BASE-T (UTP) connectors[all …]
1 # SPDX-License-Identifier: GPL-2.0-only20 sensors-detect script from the lm_sensors package. Read21 <file:Documentation/hwmon/userspace-tools.rst> for details.76 with SMpro co-processor.278 will be called as370-hwmon.311 will be called axi-fan-control320 lm-sensors 2.10.1 for proper userspace support.379 Only Intel-based Apple's computers are supported (MacBook Pro,386 the laptop to act as a pinball machine-esque joystick.401 will be called scmi-hwmon.[all …]
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1 // SPDX-License-Identifier: GPL-2.0-only3 * Kernel-based Virtual Machine driver for Linux5 * This module enables machines with Intel VT-x extensions to run virtual50 #include <asm/spec-ctrl.h>81 MODULE_DESCRIPTION("KVM support for VMX (Intel VT-x) extensions");144 /* Guest_tsc -> host_tsc conversion requires 64-bit division. */173 * These 2 parameters are used to config the controls for Pause-Loop Exiting:189 /* Default doubles per-vcpu window every exit. */193 /* Default resets per-vcpu window every exit to ple_window. */201 /* Default is SYSTEM mode, 1 for host-guest mode (which is BROKEN) */[all …]