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Searched +full:mt7621 +full:- +full:pinctrl (Results 1 – 15 of 15) sorted by relevance

/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt7621-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7621-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek MT7621 Pin Controller
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
14 MediaTek MT7621 pin controller for MT7621 SoC.
20 const: ralink,mt7621-pinctrl
23 '-pins$':
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/linux/Documentation/devicetree/bindings/i2c/
H A Dmediatek,mt7621-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/mediatek,mt7621-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Stefan Roese <sr@denx.de>
10 title: Mediatek MT7621/MT7628 I2C master controller
13 - $ref: /schemas/i2c/i2c-controller.yaml#
17 const: mediatek,mt7621-i2c
25 clock-names:
31 reset-names:
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/linux/Documentation/devicetree/bindings/spi/
H A Dralink,mt7621-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/ralink,mt7621-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
10 title: Mediatek MT7621/MT7628 SPI controller
13 - $ref: /schemas/spi/spi-controller.yaml#
17 const: ralink,mt7621-spi
25 clock-names:
31 reset-names:
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/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
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/linux/arch/mips/boot/dts/ralink/
H A Dmt7628a.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,mt7628a-soc";
9 #address-cells = <1>;
10 #size-cells = <0>;
19 resetc: reset-controller {
20 compatible = "ralink,rt2880-reset";
21 #reset-cells = <1>;
24 cpuintc: interrupt-controller {
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/linux/Documentation/devicetree/bindings/pci/
H A Dmediatek,mt7621-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/mediatek,mt7621-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek MT7621 PCIe controller
10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
13 MediaTek MT7621 PCIe subsys supports a single Root Complex (RC)
14 with 3 Root Ports. Each Root Port supports a Gen1 1-lane Link
16 MT7621 PCIe HOST Topology
18 .-------.
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/linux/Documentation/devicetree/bindings/gpio/
H A Dmediatek,mt7621-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/mediatek,mt7621-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek MT7621 SoC GPIO controller
10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
21 pattern: "^gpio@[0-9a-f]+$"
24 const: mediatek,mt7621-gpio
29 "#gpio-cells":
32 gpio-controller: true
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/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt7621.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "pinctrl-mtmips.h"
99 { .compatible = "ralink,mt7621-pinctrl" },
100 { .compatible = "ralink,rt2880-pinmux" },
108 .name = "mt7621-pinctrl",
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_EINT_MTK) += mtk-eint.o
4 obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o
5 obj-$(CONFIG_PINCTRL_MTK_V2) += pinctrl-mtk-common-v2.o
6 obj-$(CONFIG_PINCTRL_MTK_MTMIPS) += pinctrl-mtmips.o
7 obj-$(CONFIG_PINCTRL_MTK_MOORE) += pinctrl-moore.o
8 obj-$(CONFIG_PINCTRL_MTK_PARIS) += pinctrl-paris.o
11 obj-$(CONFIG_PINCTRL_AIROHA) += pinctrl-airoha.o
12 obj-$(CONFIG_PINCTRL_MT7620) += pinctrl-mt7620.o
13 obj-$(CONFIG_PINCTRL_MT7621) += pinctrl-mt7621.o
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "MediaTek pinctrl drivers"
58 bool "MediaTek MT7621 pin control"
/linux/Documentation/devicetree/bindings/net/bluetooth/
H A Dmediatek,bluetooth.txt13 - compatible: Must be
14 "mediatek,mt7663u-bluetooth": for MT7663U device
15 "mediatek,mt7668u-bluetooth": for MT7668U device
16 - vcc-supply: Main voltage regulator
21 - pinctrl-names: Should be "default", "runtime"
22 - pinctrl-0: Should contain UART RXD low when the device is powered up to
24 - pinctrl-1: Should contain UART mode pin ctrl
28 a legacy MediaTek SoC, MT7621. Please use the below properties.
30 - boot-gpios: GPIO same to the pin as UART RXD and used to keep LOW when
32 - pinctrl-names: Should be "default"
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/linux/Documentation/devicetree/bindings/bus/
H A Dpalmbus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
19 pattern: "^palmbus(@[0-9a-f]+)?$"
21 "#address-cells":
24 "#size-cells":
36 # All other properties should be child nodes with unit-address and 'reg'
37 "@[0-9a-f]+$":
45 - reg
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/linux/drivers/gpio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
47 this symbol, but new drivers should use the generic gpio-regmap
57 non-sleeping contexts. They can make bitbanged serial protocols
126 Enables support for the idio-16 library functions. The idio-16 library
128 ACCES IDIO-16 family such as the 104-IDIO-16 and the PCI-IDIO-16.
130 If built as a module its name will be gpio-idio-16.
136 tristate "GPIO driver for 74xx-ICs with MMIO access"
140 Say yes here to support GPIO functionality for 74xx-compatible ICs
155 If driver is built as a module it will be called gpio-altera.
316 tristate "Generic memory-mapped GPIO controller support (MMIO platform device)"
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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/linux/drivers/net/ethernet/mediatek/
H A Dmtk_eth_soc.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org>
5 * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org>
6 * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com>
22 #include <linux/pinctrl/devinfo.h>
24 #include <linux/pcs/pcs-mtk-lynxi.h>
34 static int mtk_msg_level = -1;
36 MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)");
294 __raw_writel(val, eth->base + reg); in mtk_w32()
299 return __raw_readl(eth->base + reg); in mtk_r32()
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