| /linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | renesas,lvds.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/renesas,lvds.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car LVDS Encoder 10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 13 These DT bindings describe the LVDS encoder embedded in the Renesas R-Car 14 Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs. 19 - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders 20 - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders [all …]
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| H A D | lontium,lt9211.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Lontium LT9211 DSI/LVDS/DPI to DSI/LVDS/DPI bridge. 10 - Marek Vasut <marex@denx.de> 13 The LT9211 are bridge devices which convert Single/Dual-Link DSI/LVDS 14 or Single DPI to Single/Dual-Link DSI/LVDS or Single DPI. 19 - lontium,lt9211 27 reset-gpios: 31 vccio-supply: [all …]
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| H A D | ti,sn65dsi83.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SN65DSI83 and SN65DSI84 DSI to LVDS bridge chip 10 - Marek Vasut <marex@denx.de> 13 Texas Instruments SN65DSI83 1x Single-link MIPI DSI 14 to 1x Single-link LVDS 16 Texas Instruments SN65DSI84 1x Single-link MIPI DSI 17 to 1x Dual-link or 2x Single-link LVDS 23 - ti,sn65dsi83 [all …]
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| H A D | thine,thc63lvd1024.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Thine Electronics THC63LVD1024 LVDS Decoder 10 - Jacopo Mondi <jacopo+renesas@jmondi.org> 11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 14 The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS 16 modes, handling up to two LVDS input streams and up to two digital CMOS/TTL 32 When operating in single input mode, all pixels are received on port@0, 33 and port@1 shall not contain any endpoint. In dual input mode, [all …]
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| H A D | toshiba,tc358775.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Toshiba TC358775 DSI to LVDS bridge 10 - Vinay Simha BN <simhavcs@gmail.com> 13 This binding supports DSI to LVDS bridges TC358765 and TC358775 15 MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane. 17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel 18 limited by 135 MHz LVDS speed 19 Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display [all …]
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| H A D | fsl,ldb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX8MP DPI to LVDS bridge chip 10 - Marek Vasut <marex@denx.de> 14 for configuring the on-SoC DPI-to-LVDS serializer. This describes 20 - fsl,imx6sx-ldb 21 - fsl,imx8mp-ldb 22 - fsl,imx93-ldb 27 clock-names: [all …]
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| H A D | fsl,imx8qxp-ldb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX8qm/qxp LVDS Display Bridge 10 - Liu Ying <victor.liu@nxp.com> 13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels. 23 LDB split mode to support a dual link LVDS display. The channel indexes 41 - fsl,imx8qm-ldb 42 - fsl,imx8qxp-ldb [all …]
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| H A D | parade,ps8622.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Parade PS8622/PS8625 DisplayPort to LVDS Converter 10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 15 - parade,ps8622 16 - parade,ps8625 21 lane-count: 26 use-external-pwm: 30 reset-gpios: [all …]
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| H A D | fsl,imx8qxp-pxl2dpi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Liu Ying <victor.liu@nxp.com> 14 interfaces the pixel link 36-bit data output and the DSI controller’s 15 MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module 16 used in LVDS mode, to remap the pixel color codings between those modules. 25 const: fsl,imx8qxp-pxl2dpi 27 fsl,sc-resource: [all …]
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| /linux/Documentation/devicetree/bindings/display/imx/ |
| H A D | fsl,imx6q-ldb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ldb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale LVDS Display Bridge (ldb) 10 The LVDS Display Bridge device tree node contains up to two lvds-channel 11 nodes describing each of the two LVDS encoder channels of the bridge. 14 - Frank Li <Frank.Li@nxp.com> 19 - enum: 20 - fsl,imx53-ldb [all …]
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| /linux/Documentation/devicetree/bindings/display/rockchip/ |
| H A D | rockchip,lvds.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,lvds.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip low-voltage differential signal (LVDS) transmitter 10 - Sandy Huang <hjc@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 16 - rockchip,px30-lvds 17 - rockchip,rk3288-lvds 25 clock-names: [all …]
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a774c0-ek874-idk-2121wr.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 * connected to an Advantech IDK-2121WR 21.5" LVDS panel 9 #include "r8a774c0-ek874.dts" 13 compatible = "pwm-backlight"; 16 brightness-levels = <0 4 8 16 32 64 128 255>; 17 default-brightness-level = <6>; 19 power-supply = <®_12p0v>; 20 enable-gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; 23 panel-lvds { 24 compatible = "advantech,idk-2121wr", "panel-lvds"; [all …]
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| /linux/Documentation/devicetree/bindings/display/ |
| H A D | allwinner,sun4i-a10-tcon.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 The TCON acts as a timing controller for RGB, LVDS and TV 18 "#clock-cells": 23 - const: allwinner,sun4i-a10-tcon 24 - const: allwinner,sun5i-a13-tcon [all …]
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| H A D | xylon,logicvc-display.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com> 16 with Xilinx Zynq-7000 SoCs and Xilinx FPGAs. 20 synthesis time. As a result, many of the device-tree bindings are meant to 24 Layers are declared in the "layers" sub-node and have dedicated configuration. 32 - xylon,logicvc-3.02.a-display 33 - xylon,logicvc-4.01.a-display [all …]
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| /linux/drivers/gpu/drm/renesas/rcar-du/ |
| H A D | rcar_du_drv.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * R-Car Display Unit DRM driver 5 * Copyright (C) 2013-2015 Renesas Electronics Corporation 11 #include <linux/dma-mapping.h> 32 /* ----------------------------------------------------------------------------- 45 * R8A774[34] has one RGB output and one LVDS output 49 .port = 0, 53 .port = 1, 73 .port = 0, 77 .port = 1, [all …]
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| H A D | rcar_du_encoder.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * R-Car Display Unit Encoder 5 * Copyright (C) 2013-2014 Renesas Electronics Corporation 21 /* ----------------------------------------------------------------------------- 28 struct device_node *port; in rcar_du_encoder_count_ports() local 35 for_each_child_of_node(ports, port) { in rcar_du_encoder_count_ports() 36 if (of_node_name_eq(port, "port")) in rcar_du_encoder_count_ports() 59 * DT node has a single port, assume that it describes a panel and in rcar_du_encoder_init() 70 bridge = devm_drm_panel_bridge_add_typed(rcdu->dev, panel, in rcar_du_encoder_init() 77 return -EPROBE_DEFER; in rcar_du_encoder_init() [all …]
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| /linux/arch/arm/boot/dts/nvidia/ |
| H A D | tegra30-asus-lvds-display.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 /* This dtsi file describes parts common for Asus T30 devices with a LVDS panel. */ 5 #include <dt-bindings/gpio/tegra-gpio.h> 13 port { 15 remote-endpoint = <&bridge_input>; 16 bus-width = <24>; 23 display-panel { 24 power-supply = <&vdd_pnl>; 25 ddc-i2c-bus = <&lcd_ddc>; 28 port { [all …]
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_lvds_regs.h | 1 /* SPDX-License-Identifier: MIT */ 11 /* LVDS port control */ 12 #define LVDS _MMIO(0x61180) macro 14 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as 15 * the DPLL semantics change when the LVDS is assigned to that pipe. 18 /* Selects pipe B for LVDS data. Must be set on pre-965. */ 23 /* LVDS dithering flag on 965/g4x platform */ 25 /* LVDS sync polarity flags. Set to invert (i.e. negative) */ 29 /* Enable border for unscaled (or aspect-scaled) display */ 32 * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per [all …]
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6q-var-mx6customboard.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Support for Variscite MX6 Carrier-board 9 /dts-v1/; 11 #include "imx6qdl-var-som.dtsi" 12 #include <dt-bindings/pwm/pwm.h> 15 model = "Variscite i.MX6 QUAD/DUAL VAR-SOM-MX6 Custom Board"; 16 compatible = "variscite,mx6customboard", "variscite,var-som-imx6q", "fsl,imx6q"; 18 panel0: lvds-panel0 { 19 compatible = "panel-lvds"; 21 width-mm = <152>; [all …]
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| H A D | imx53-sk-imx53-atm0700d4-lvds.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 /dts-v1/; 7 #include <dt-bindings/pwm/pwm.h> 8 #include "imx53-sk-imx53-atm0700d4.dtsi" 11 lvds-decoder { 12 compatible = "ti,sn65lvds94", "lvds-decoder"; 15 #address-cells = <1>; 16 #size-cells = <0>; 18 port@0 { 22 remote-endpoint = <&lvds0_out>; [all …]
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| /linux/Documentation/devicetree/bindings/display/panel/ |
| H A D | sgd,gktw70sdae4se.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Solomon Goldentek Display GKTW70SDAE4SE 7" WVGA LVDS Display Panel 10 - Neil Armstrong <neil.armstrong@linaro.org> 11 - Thierry Reding <thierry.reding@gmail.com> 14 - $ref: panel-common.yaml# 15 - $ref: /schemas/display/lvds.yaml# 24 - compatible 29 - const: sgd,gktw70sdae4se [all …]
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| H A D | advantech,idk-1110wr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/panel/advantech,idk-1110wr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Advantech IDK-1110WR 10.1" WSVGA LVDS Display Panel 10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> 11 - Thierry Reding <thierry.reding@gmail.com> 14 - $ref: panel-common.yaml# 15 - $ref: /schemas/display/lvds.yaml# 21 const: advantech,idk-1110wr [all …]
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| H A D | mitsubishi,aa121td01.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mitsubishi AA121TD01 12.1" WXGA LVDS Display Panel 10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 11 - Thierry Reding <thierry.reding@gmail.com> 14 - $ref: panel-common.yaml# 15 - $ref: /schemas/display/lvds.yaml# 24 - compatible 29 - const: mitsubishi,aa121td01 [all …]
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| H A D | innolux,ee101ia-01d.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/panel/innolux,ee101ia-01d.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Innolux Corporation 10.1" EE101IA-01D WXGA (1280x800) LVDS panel 10 - Heiko Stuebner <heiko.stuebner@bq.com> 11 - Thierry Reding <thierry.reding@gmail.com> 14 - $ref: panel-common.yaml# 15 - $ref: /schemas/display/lvds.yaml# 21 const: innolux,ee101ia-01d [all …]
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mp-evk-mx8-dlvds-lcd1.dtso | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 10 panel-lvds { 13 power-supply = <®_vext_3v3>; 15 panel-timing { 16 clock-frequency = <148500000>; 19 hfront-porch = <130>; 20 hback-porch = <70>; 21 hsync-len = <30>; 22 vfront-porch = <5>; [all …]
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