xref: /linux/arch/arm/boot/dts/nxp/imx/imx6q-var-mx6customboard.dts (revision 06d07429858317ded2db7986113a9e0129cd599b) 
1*a5b59a3fSJames Hilliard// SPDX-License-Identifier: GPL-2.0+
2*a5b59a3fSJames Hilliard/*
3*a5b59a3fSJames Hilliard * Support for Variscite MX6 Carrier-board
4*a5b59a3fSJames Hilliard *
5*a5b59a3fSJames Hilliard * Copyright 2016 Variscite, Ltd. All Rights Reserved
6*a5b59a3fSJames Hilliard * Copyright 2022 Bootlin
7*a5b59a3fSJames Hilliard */
8*a5b59a3fSJames Hilliard
9*a5b59a3fSJames Hilliard/dts-v1/;
10*a5b59a3fSJames Hilliard
11*a5b59a3fSJames Hilliard#include "imx6qdl-var-som.dtsi"
12*a5b59a3fSJames Hilliard#include <dt-bindings/pwm/pwm.h>
13*a5b59a3fSJames Hilliard
14*a5b59a3fSJames Hilliard/ {
15*a5b59a3fSJames Hilliard	model = "Variscite i.MX6 QUAD/DUAL VAR-SOM-MX6 Custom Board";
16*a5b59a3fSJames Hilliard	compatible = "variscite,mx6customboard", "variscite,var-som-imx6q", "fsl,imx6q";
17*a5b59a3fSJames Hilliard
18*a5b59a3fSJames Hilliard	panel0: lvds-panel0 {
19*a5b59a3fSJames Hilliard		compatible = "panel-lvds";
20*a5b59a3fSJames Hilliard		backlight = <&backlight_lvds>;
21*a5b59a3fSJames Hilliard		width-mm = <152>;
22*a5b59a3fSJames Hilliard		height-mm = <91>;
23*a5b59a3fSJames Hilliard		label = "etm070001adh6";
24*a5b59a3fSJames Hilliard		data-mapping = "jeida-18";
25*a5b59a3fSJames Hilliard
26*a5b59a3fSJames Hilliard		panel-timing {
27*a5b59a3fSJames Hilliard			clock-frequency = <32000000>;
28*a5b59a3fSJames Hilliard			hactive = <800>;
29*a5b59a3fSJames Hilliard			vactive = <480>;
30*a5b59a3fSJames Hilliard			hback-porch = <39>;
31*a5b59a3fSJames Hilliard			hfront-porch = <39>;
32*a5b59a3fSJames Hilliard			vback-porch = <29>;
33*a5b59a3fSJames Hilliard			vfront-porch = <13>;
34*a5b59a3fSJames Hilliard			hsync-len = <47>;
35*a5b59a3fSJames Hilliard			vsync-len = <2>;
36*a5b59a3fSJames Hilliard		};
37*a5b59a3fSJames Hilliard
38*a5b59a3fSJames Hilliard		port {
39*a5b59a3fSJames Hilliard			panel_in_lvds0: endpoint {
40*a5b59a3fSJames Hilliard				remote-endpoint = <&lvds0_out>;
41*a5b59a3fSJames Hilliard			};
42*a5b59a3fSJames Hilliard		};
43*a5b59a3fSJames Hilliard	};
44*a5b59a3fSJames Hilliard
45*a5b59a3fSJames Hilliard	panel1: lvds-panel1 {
46*a5b59a3fSJames Hilliard		compatible = "panel-lvds";
47*a5b59a3fSJames Hilliard		width-mm = <152>;
48*a5b59a3fSJames Hilliard		height-mm = <91>;
49*a5b59a3fSJames Hilliard		data-mapping = "jeida-18";
50*a5b59a3fSJames Hilliard
51*a5b59a3fSJames Hilliard		panel-timing {
52*a5b59a3fSJames Hilliard			clock-frequency = <38251000>;
53*a5b59a3fSJames Hilliard			hactive = <800>;
54*a5b59a3fSJames Hilliard			vactive = <600>;
55*a5b59a3fSJames Hilliard			hback-porch = <112>;
56*a5b59a3fSJames Hilliard			hfront-porch = <32>;
57*a5b59a3fSJames Hilliard			vback-porch = <3>;
58*a5b59a3fSJames Hilliard			vfront-porch = <17>;
59*a5b59a3fSJames Hilliard			hsync-len = <80>;
60*a5b59a3fSJames Hilliard			vsync-len = <4>;
61*a5b59a3fSJames Hilliard		};
62*a5b59a3fSJames Hilliard
63*a5b59a3fSJames Hilliard		port {
64*a5b59a3fSJames Hilliard			panel_in_lvds1: endpoint {
65*a5b59a3fSJames Hilliard				remote-endpoint = <&lvds1_out>;
66*a5b59a3fSJames Hilliard			};
67*a5b59a3fSJames Hilliard		};
68*a5b59a3fSJames Hilliard	};
69*a5b59a3fSJames Hilliard
70*a5b59a3fSJames Hilliard	backlight_lvds: backlight-lvds {
71*a5b59a3fSJames Hilliard		compatible = "pwm-backlight";
72*a5b59a3fSJames Hilliard		pwms = <&pwm2 0 50000 0>;
73*a5b59a3fSJames Hilliard		brightness-levels = <0 4 8 16 32 64 128 248>;
74*a5b59a3fSJames Hilliard		default-brightness-level = <7>;
75*a5b59a3fSJames Hilliard		power-supply = <&reg_3p3v>;
76*a5b59a3fSJames Hilliard	};
77*a5b59a3fSJames Hilliard};
78*a5b59a3fSJames Hilliard
79*a5b59a3fSJames Hilliard&i2c3 {
80*a5b59a3fSJames Hilliard	pinctrl-names = "default";
81*a5b59a3fSJames Hilliard	pinctrl-0 = <&pinctrl_i2c3>;
82*a5b59a3fSJames Hilliard	status = "okay";
83*a5b59a3fSJames Hilliard
84*a5b59a3fSJames Hilliard	touchscreen@24 {
85*a5b59a3fSJames Hilliard		compatible = "cypress,tt21000";
86*a5b59a3fSJames Hilliard		reg = <0x24>;
87*a5b59a3fSJames Hilliard		interrupt-parent = <&gpio3>;
88*a5b59a3fSJames Hilliard		interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
89*a5b59a3fSJames Hilliard		reset-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
90*a5b59a3fSJames Hilliard		vdd-supply = <&reg_3p3v>;
91*a5b59a3fSJames Hilliard		touchscreen-size-x = <880>;
92*a5b59a3fSJames Hilliard		touchscreen-size-y = <1280>;
93*a5b59a3fSJames Hilliard	};
94*a5b59a3fSJames Hilliard
95*a5b59a3fSJames Hilliard	touchscreen@38 {
96*a5b59a3fSJames Hilliard		compatible = "edt,edt-ft5306";
97*a5b59a3fSJames Hilliard		reg = <0x38>;
98*a5b59a3fSJames Hilliard		interrupt-parent = <&gpio3>;
99*a5b59a3fSJames Hilliard		interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
100*a5b59a3fSJames Hilliard		touchscreen-size-x = <1800>;
101*a5b59a3fSJames Hilliard		touchscreen-size-y = <1000>;
102*a5b59a3fSJames Hilliard	};
103*a5b59a3fSJames Hilliard};
104*a5b59a3fSJames Hilliard
105*a5b59a3fSJames Hilliard&iomuxc {
106*a5b59a3fSJames Hilliard	pinctrl_camera: cameragrp {
107*a5b59a3fSJames Hilliard		fsl,pins = <
108*a5b59a3fSJames Hilliard			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12		0x1b0b0
109*a5b59a3fSJames Hilliard			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13		0x1b0b0
110*a5b59a3fSJames Hilliard			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14		0x1b0b0
111*a5b59a3fSJames Hilliard			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15		0x1b0b0
112*a5b59a3fSJames Hilliard			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16		0x1b0b0
113*a5b59a3fSJames Hilliard			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17		0x1b0b0
114*a5b59a3fSJames Hilliard			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18		0x1b0b0
115*a5b59a3fSJames Hilliard			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19		0x1b0b0
116*a5b59a3fSJames Hilliard			MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN	0x1b0b0
117*a5b59a3fSJames Hilliard			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK	0x1b0b0
118*a5b59a3fSJames Hilliard			MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC		0x1b0b0
119*a5b59a3fSJames Hilliard			MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC		0x1b0b0
120*a5b59a3fSJames Hilliard		>;
121*a5b59a3fSJames Hilliard	};
122*a5b59a3fSJames Hilliard
123*a5b59a3fSJames Hilliard	pinctrl_flexcan1: flexcan1grp {
124*a5b59a3fSJames Hilliard		fsl,pins = <
125*a5b59a3fSJames Hilliard			MX6QDL_PAD_GPIO_7__FLEXCAN1_TX		0x1b0b0
126*a5b59a3fSJames Hilliard			MX6QDL_PAD_GPIO_8__FLEXCAN1_RX		0x1b0b0
127*a5b59a3fSJames Hilliard		>;
128*a5b59a3fSJames Hilliard	};
129*a5b59a3fSJames Hilliard
130*a5b59a3fSJames Hilliard	pinctrl_ipu1: ipu1grp {
131*a5b59a3fSJames Hilliard		fsl,pins = <
132*a5b59a3fSJames Hilliard			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x10
133*a5b59a3fSJames Hilliard			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x10
134*a5b59a3fSJames Hilliard			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x10
135*a5b59a3fSJames Hilliard			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x10
136*a5b59a3fSJames Hilliard			MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04		0x10
137*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x10
138*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x10
139*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x10
140*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x10
141*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x10
142*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x10
143*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x10
144*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x10
145*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x10
146*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x10
147*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x10
148*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x10
149*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x10
150*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x10
151*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x10
152*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x10
153*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x10
154*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x10
155*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18	0x10
156*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19	0x10
157*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20	0x10
158*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21	0x10
159*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22	0x10
160*a5b59a3fSJames Hilliard			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23	0x10
161*a5b59a3fSJames Hilliard		>;
162*a5b59a3fSJames Hilliard	};
163*a5b59a3fSJames Hilliard
164*a5b59a3fSJames Hilliard	pinctrl_uart3: uart3grp {
165*a5b59a3fSJames Hilliard		fsl,pins = <
166*a5b59a3fSJames Hilliard			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
167*a5b59a3fSJames Hilliard			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
168*a5b59a3fSJames Hilliard			MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1
169*a5b59a3fSJames Hilliard			MX6QDL_PAD_EIM_EB3__UART3_RTS_B		0x1b0b1
170*a5b59a3fSJames Hilliard		>;
171*a5b59a3fSJames Hilliard	};
172*a5b59a3fSJames Hilliard
173*a5b59a3fSJames Hilliard	pinctrl_usbotg_var: usbotggrp {
174*a5b59a3fSJames Hilliard		fsl,pins = <
175*a5b59a3fSJames Hilliard			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x17059
176*a5b59a3fSJames Hilliard		>;
177*a5b59a3fSJames Hilliard	};
178*a5b59a3fSJames Hilliard
179*a5b59a3fSJames Hilliard	pinctrl_usdhc1: usdhc1grp {
180*a5b59a3fSJames Hilliard		fsl,pins = <
181*a5b59a3fSJames Hilliard			MX6QDL_PAD_SD1_CMD__SD1_CMD		0x17071
182*a5b59a3fSJames Hilliard			MX6QDL_PAD_SD1_CLK__SD1_CLK		0x10071
183*a5b59a3fSJames Hilliard			MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x17071
184*a5b59a3fSJames Hilliard			MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x17071
185*a5b59a3fSJames Hilliard			MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x17071
186*a5b59a3fSJames Hilliard			MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x17071
187*a5b59a3fSJames Hilliard		>;
188*a5b59a3fSJames Hilliard	};
189*a5b59a3fSJames Hilliard
190*a5b59a3fSJames Hilliard	pinctrl_usdhc2: usdhc2grp {
191*a5b59a3fSJames Hilliard		fsl,pins = <
192*a5b59a3fSJames Hilliard			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
193*a5b59a3fSJames Hilliard			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
194*a5b59a3fSJames Hilliard			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
195*a5b59a3fSJames Hilliard			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
196*a5b59a3fSJames Hilliard			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
197*a5b59a3fSJames Hilliard			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
198*a5b59a3fSJames Hilliard		>;
199*a5b59a3fSJames Hilliard	};
200*a5b59a3fSJames Hilliard};
201*a5b59a3fSJames Hilliard
202*a5b59a3fSJames Hilliard&ldb {
203*a5b59a3fSJames Hilliard	status = "okay";
204*a5b59a3fSJames Hilliard
205*a5b59a3fSJames Hilliard	lvds-channel@0 {
206*a5b59a3fSJames Hilliard		fsl,data-mapping = "spwg";
207*a5b59a3fSJames Hilliard		fsl,data-width = <24>;
208*a5b59a3fSJames Hilliard		status = "okay";
209*a5b59a3fSJames Hilliard
210*a5b59a3fSJames Hilliard		port@4 {
211*a5b59a3fSJames Hilliard			reg = <4>;
212*a5b59a3fSJames Hilliard
213*a5b59a3fSJames Hilliard			lvds0_out: endpoint {
214*a5b59a3fSJames Hilliard				remote-endpoint = <&panel_in_lvds0>;
215*a5b59a3fSJames Hilliard			};
216*a5b59a3fSJames Hilliard		};
217*a5b59a3fSJames Hilliard	};
218*a5b59a3fSJames Hilliard
219*a5b59a3fSJames Hilliard	lvds-channel@1 {
220*a5b59a3fSJames Hilliard		fsl,data-mapping = "spwg";
221*a5b59a3fSJames Hilliard		fsl,data-width = <24>;
222*a5b59a3fSJames Hilliard		status = "okay";
223*a5b59a3fSJames Hilliard
224*a5b59a3fSJames Hilliard		port@4 {
225*a5b59a3fSJames Hilliard			reg = <4>;
226*a5b59a3fSJames Hilliard
227*a5b59a3fSJames Hilliard			lvds1_out: endpoint {
228*a5b59a3fSJames Hilliard				remote-endpoint = <&panel_in_lvds1>;
229*a5b59a3fSJames Hilliard			};
230*a5b59a3fSJames Hilliard		};
231*a5b59a3fSJames Hilliard	};
232*a5b59a3fSJames Hilliard};
233*a5b59a3fSJames Hilliard
234*a5b59a3fSJames Hilliard&uart3 {
235*a5b59a3fSJames Hilliard	pinctrl-names = "default";
236*a5b59a3fSJames Hilliard	pinctrl-0 = <&pinctrl_uart3>;
237*a5b59a3fSJames Hilliard	uart-has-rtscts;
238*a5b59a3fSJames Hilliard	status = "okay";
239*a5b59a3fSJames Hilliard};
240*a5b59a3fSJames Hilliard
241*a5b59a3fSJames Hilliard&usdhc2 {
242*a5b59a3fSJames Hilliard	pinctrl-names = "default";
243*a5b59a3fSJames Hilliard	pinctrl-0 = <&pinctrl_usdhc2>;
244*a5b59a3fSJames Hilliard	cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
245*a5b59a3fSJames Hilliard	wp-gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>;
246*a5b59a3fSJames Hilliard	status = "okay";
247*a5b59a3fSJames Hilliard};
248