| /freebsd/sys/contrib/dev/iwlwifi/mld/ |
| H A D | low_latency.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
9 * struct iwl_mld_low_latency_packets_counters - Packets counters
11 * @vo_vi: per-mac, counts the number of TX and RX voice and video packets
19 * enum iwl_mld_low_latency_cause - low-latency set causes
21 * @LOW_LATENCY_TRAFFIC: indicates low-latency traffic was detected
22 * @LOW_LATENCY_DEBUGFS: low-latency mode set from debugfs
23 * @LOW_LATENCY_VIF_TYPE: low-latency mode set because of vif type (AP)
32 * struct iwl_mld_low_latency - Manage low-latency detection and activation.
33 * @work: this work is used to detect low-latency by monitoring the number of
35 * threshold is reached, low-latency is activated. When active,
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| H A D | low_latency.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2024-2025 Intel Corporation
22 struct iwl_mld_low_latency *ll = &mld->low_latency; in iwl_mld_calc_low_latency()
24 u8 num_rx_q = mld->trans->info.num_rxqs; in iwl_mld_calc_low_latency()
33 if (!ll->window_start[mac_id]) in iwl_mld_calc_low_latency()
37 time_after(timestamp, ll->window_start[mac_id] + in iwl_mld_calc_low_latency()
41 ll->window_start[mac_id] = timestamp; in iwl_mld_calc_low_latency()
45 &mld->low_latency.pkts_counters[q]; in iwl_mld_calc_low_latency()
47 spin_lock_bh(&counters->lock); in iwl_mld_calc_low_latency()
49 total_vo_vi_pkts += counters->vo_vi[mac_id]; in iwl_mld_calc_low_latency()
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| /freebsd/sys/contrib/dev/iwlwifi/mvm/ |
| H A D | quota.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2012-2014, 2018, 2021-2022, 2025 Intel Corporation
4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
8 #include "fw-api.h"
33 if (vif == data->disabled_vif) in iwl_mvm_quota_iterator()
36 if (!mvmvif->deflink.phy_ctxt) in iwl_mvm_quota_iterator()
40 id = mvmvif->deflink.phy_ctxt->id; in iwl_mvm_quota_iterator()
48 switch (vif->type) { in iwl_mvm_quota_iterator()
50 if (vif->cfg.assoc) in iwl_mvm_quota_iterator()
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| H A D | mvm.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2025 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
26 #include "iwl-op-mode.h"
27 #include "iwl-trans.h"
28 #include "fw/notif-wait.h"
29 #include "iwl-nvm-utils.h"
31 #include "iwl-config.h"
33 #include "fw-api.h"
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| H A D | coex.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2013-2014, 2018-2020, 2022-2025 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
11 #include "iwl-modparams.h"
13 #include "iwl-debug.h"
100 * Checking that we hold mvm->mutex is a good idea, but the rate in iwl_get_coex_type()
109 chanctx_conf = rcu_dereference(vif->bss_conf.chanctx_conf); in iwl_get_coex_type()
112 chanctx_conf->def.chan->band != NL80211_BAND_2GHZ) { in iwl_get_coex_type()
119 phy_ctx_id = *((u16 *)chanctx_conf->drv_priv); in iwl_get_coex_type()
120 primary_ch_phy_id = le32_to_cpu(mvm->last_bt_ci_cmd.primary_ch_phy_id); in iwl_get_coex_type()
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| /freebsd/sys/contrib/device-tree/Bindings/arm/msm/ |
| H A D | qcom,idle-state.txt | 3 ARM provides idle-state node to define the cpuidle states, as defined in [1].
4 cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
5 states. Idle states have different enter/exit latency and residency values.
6 The idle states supported by the QCOM SoC are defined as -
26 Retention: Retention is a low power state where the core is clock gated and
31 state. Retention may have a slightly higher latency than Standby.
44 code in the EL for the SoC. On SoCs with write-back L1 cache, the cache has to
50 be flushed, system bus, clocks - lowered, and SoC main XO clock gated and
51 voltages reduced, provided all cpus enter this state. Since the span of low
52 power modes possible at this state is vast, the exit latency and the residency
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| /freebsd/lib/libpmc/ |
| H A D | pmc.corei7uc.3 | 44 .Bl -tag -width "Li PMC_CLASS_UCP"
46 Fixed-function counters that count only one hardware event per counter.
58 .%B "Intel(R) 64 and IA-32 Architectures Software Developes Manual"
60 .%N "Order Number: 253669-033US"
69 .Bl -column "PMC_CAP_INTERRUPT" "Support"
86 .Bl -tag -width indent
92 Configure the PMC to count the number of de-asserted to asserted
107 .Bl -tag -width indent
132 by the count to obtain the average read tracker latency.
138 to obtain the average cache line read L3 miss latency.
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| H A D | pmc.westmereuc.3 | 44 .Bl -tag -width "Li PMC_CLASS_UCP"
46 Fixed-function counters that count only one hardware event per counter.
58 .%B "Intel(R) 64 and IA-32 Architectures Software Developes Manual"
60 .%N "Order Number: 253669-033US"
67 Not all CPUs in this family implement fixed-function counters.
70 .Bl -column "PMC_CAP_INTERRUPT" "Support"
87 .Bl -tag -width indent
93 Configure the PMC to count the number of de-asserted to asserted
108 .Bl -tag -width indent
134 count to obtain the average read tracker latency.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.cpp | 1 //===-- SIMachineScheduler.cpp - SI Scheduler Interface -------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
22 #define DEBUG_TYPE "machine-scheduler"
49 // . Hiding low latencies (SGPR constant loading, etc)
50 // . Keeping register usage low for better latency hiding and general
58 // simpler sub-problems. It divides the instructions into blocks, schedules
59 // locally inside the blocks where it takes care of low latencies, and then
62 // usage low.
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| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | st,stm32-fmc2-ebi-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 - Marek Vasut <marex@denx.de>
14 st,fmc2-ebi-cs-transaction-type:
33 st,fmc2-ebi-cs-cclk-enable:
40 st,fmc2-ebi-cs-mux-enable:
46 st,fmc2-ebi-cs-buswidth:
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| /freebsd/sys/contrib/device-tree/Bindings/cpu/ |
| H A D | idle-states.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
22 run-time, can be specified through device tree bindings representing the
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| /freebsd/sys/dev/bhnd/ |
| H A D | bhnd_types.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
118 * Idle Low-Power (ILP).
120 * No register access is required, or long request latency is
126 * Active Low-Power (ALP).
128 * Low-latency register access and low-rate DMA.
135 * High bus throughput and lowest-latency register access.
160 /** Clock is provided by a low power oscillator. */
176 * @note While the interconnect may support 64-bit addressing, not
|
| H A D | bhndreg.h | 1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
10 * sbchipc.h distributed with the Asus RT-N16 firmware source code release.
46 * Common per-core clock control/status register available on PMU-equipped
50 * High Throughput (HT) Full bandwidth, low latency. Generally supplied
52 * Active Low Power (ALP) Register access, low speed DMA.
53 * Idle Low Power (ILP) No interconnect activity, or if long latency
70 #define BHND_CCS_ERSRC_MAX 2 /**< maximum ERSRC value (corresponding to bits 0-2) */
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| /freebsd/sys/dev/iicbus/ |
| H A D | iicbb.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
31 * Generic I2C bit-banging code
42 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
77 u_int io_latency; /* approximate pin toggling latency */
136 device_set_desc(dev, "I2C bit-banging driver"); in iicbb_probe()
146 sc->iicbus = device_add_child(dev, "iicbus", DEVICE_UNIT_ANY); in iicbb_attach()
147 if (!sc->iicbus) in iicbb_attach()
150 sc->scl_low_timeout = DEFAULT_SCL_LOW_TIMEOUT; in iicbb_attach()
154 "delay", CTLFLAG_RD, &sc->udelay, in iicbb_attach()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMSchedule.td | 1 //===-- ARMSchedule.td - ARM Scheduling Definitions -------
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| /freebsd/share/man/man4/ |
| H A D | pcm.4 | 2 .\" Copyright (c) 2009-2011 Joel Dahl <joel@FreeBSD.org>
39 .Bd -ragged -offset indent
60 driver are: multichannel audio, per-application
62 duplex operation, bit perfect audio, rate conversion and low latency
74 .Bl -bullet -compact
118 .Xr snd_uaudio 4 (auto-loaded on device plug)
145 .Bl -tag -width ".Va snd_driver_load" -offset indent
177 re-routing of channels.
198 Commonly used for ear-candy or frequency compensation due to the vast
232 .Bl -tag -width indent
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SchedulerRegistry.h | 1 //===- llvm/CodeGen/SchedulerRegistry.h ---------
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| /freebsd/sys/dev/sfxge/common/ |
| H A D | ef10_tlv_layout.h | 1 /*-
2 * Copyright (c) 2012-2016 Solarflare Communications Inc.
48 * systems which are little-endian and do not do strange things with structure
49 * padding. (Big-endian host systems will require some byte-swapping.)
51 * -----
53 * Please refer to SF-108797-SW for a general overview of the TLV partition
56 * -----
62 * - L is a location, indicating where this tag is expected to be found:
69 * - TTT is a type, which is just a unique value. The same type value
73 * - NNNN is an index of some form. Some item types are per-port, some
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| /freebsd/sys/contrib/device-tree/Bindings/iio/accel/ |
| H A D | lis302.txt | 8 - compatible: should be set to "st,lis3lv02d-spi"
9 - reg: the chipselect index
10 - spi-max-frequency: maximal bus speed, should be set to 1000000 unless
12 - interrupts: the interrupt generated by the device
15 - compatible: should be set to "st,lis3lv02d"
16 - reg: i2c slave address
17 - Vdd-supply: The input supply for Vdd
18 - Vdd_IO-supply: The input supply for Vdd_IO
23 - st,click-single-{x,y,z}: if present, tells the device to issue an
26 - st,click-double-{x,y,z}: if present, tells the device to issue an
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| /freebsd/share/man/man9/ |
| H A D | bhnd.9 | 1 .\" Copyright (c) 2015-2016 Landon Fuller <landonf@FreeBSD.org>
392 .Bd -literal
398 .Bd -literal
406 .Bd -literal
414 .Bd -literal
417 .Bd -literal
427 .Bd -literal
435 .Bd -literal
442 .Bd -literal
512 .Bd -literal
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| /freebsd/usr.sbin/sndctl/ |
| H A D | sndctl.8 | 1 .\"-
2 .\" SPDX-License-Identifier: BSD-2-Clause
4 .\" Copyright (c) 2024-2025 The FreeBSD Foundation
45 control-driven interface, in order to filter and/or set specific properties.
48 .Bl -tag -width "-f device"
65 .Bl -column xxxxxxxxxxxxxxx xxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxx -offset indent
74 .It bitperfect Ta Boolean Ta Read/Write Ta Bit-perfect mode enabled
75 .It autoconv Ta Boolean Ta Read/Write Ta Auto-conversions enabled
76 .It realtime Ta Boolean Ta Read/Write Ta Real-time mode enabled
102 controls will be read-only if VCHANs are disabled.
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| /freebsd/sys/contrib/device-tree/Bindings/arm/ |
| H A D | idle-states.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
14 1 - Introduction
18 where cores can be put in different low-power states (ranging from simple wfi
20 range of dynamic idle states that a processor can enter at run-time, can be
27 - Running
28 - Idle_standby
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| /freebsd/share/doc/psd/02.implement/ |
| H A D | implement | 4 .\" Copyright (C) Caldera International Inc. 2001-2002. All rights reserved.
40 .EH 'PSD:2-%''UNIX Implementation'
41 .OH 'UNIX Implementation''PSD:2-%'
55 \&\\$3\s-1\\$1\\s0\&\\$2
69 .AU "MH 2C-523" 2394
75 This paper describes in high-level terms the
120 but have that way be the least-common divisor
125 It is a soap-box platform on
159 from a read-only text segment,
165 from shared-text segments.
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| /freebsd/contrib/llvm-project/llvm/tools/llvm-xray/ |
| H A D | xray-account.h | 1 //===- xray-account.h - XRay Function Call Accounting -------
63 recordLatency(int32_t FuncId,uint64_t Latency) recordLatency() argument
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| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ddr/ |
| H A D | jedec,lpddr3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR3 SDRAM compliant to JEDEC JESD209-3
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - items:
19 - enum:
20 - samsung,K3QF2F20DB
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