1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
31  * Generic I2C bit-banging code
42  * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
77 	u_int io_latency;	/* approximate pin toggling latency */
136 	device_set_desc(dev, "I2C bit-banging driver");  in iicbb_probe()
146 	sc->iicbus = device_add_child(dev, "iicbus", DEVICE_UNIT_ANY);  in iicbb_attach()
147 	if (!sc->iicbus)  in iicbb_attach()
150 	sc->scl_low_timeout = DEFAULT_SCL_LOW_TIMEOUT;  in iicbb_attach()
154 	    "delay", CTLFLAG_RD, &sc->udelay,  in iicbb_attach()
159 	    "scl_low_timeout", CTLFLAG_RWTUN, &sc->scl_low_timeout,  in iicbb_attach()
160 	    0, "SCL low timeout, microseconds");  in iicbb_attach()
163 	    "io_latency", CTLFLAG_RWTUN, &sc->io_latency,  in iicbb_attach()
164 	    0, "Estimate of pin toggling latency, microseconds");  in iicbb_attach()
185 	if (child == sc->iicbus)  in iicbb_child_detached()
186 		sc->iicbus = NULL;  in iicbb_child_detached()
200 		retval += printf(" on %s master-only\n",  in iicbb_print_child()
219     &i2c_debug, 0, "Enable i2c bit-banging driver debug");
243 	timeout = now + sc->scl_low_timeout * SBT_1US;  in iicbb_waitforscl()
252 		pause_sbt("iicbb-scl-low", SBT_1MS, 0, C_PREL(2));  in iicbb_waitforscl()
268 	 * Precondition: SCL is low.  in iicbb_clockin()
270 	 * - set SDA to the value;  in iicbb_clockin()
271 	 * - release SCL and wait until it's high.  in iicbb_clockin()
274 	 * There should be a data set-up time, 250 ns minimum, between setting  in iicbb_clockin()
275 	 * SDA and raising SCL.  It's expected that the I/O access latency will  in iicbb_clockin()
284  * End the high phase of the clock and wait out the low phase
295 	 * - pull SCL low and hold for udelay.  in iicbb_clockout()
298 	DELAY(sc->udelay);  in iicbb_clockout()
310 	DELAY(sc->udelay);  in iicbb_sendbit()
321  * Now it must wait for the SLAVE to pull the DATA line low.
326  * When the SLAVE has pulled this line low the MASTER will take the CLOCK
327  * line low and then the SLAVE will release the SDA (data) line.
343 	/* Sample SDA until ACK (low) or udelay runs out. */  in iicbb_getack()
344 	for (t = 0; t < sc->udelay; t++) {  in iicbb_getack()
351 	DELAY(sc->udelay - t);  in iicbb_getack()
354 	I2C_DEBUG(printf("%c ", noack ? '-' : '+'));  in iicbb_getack()
363 	for (i = 7; i >= 0; i--) {  in iicbb_sendbyte()
387 	for (i = 7; i >= 0; i--) {  in iicbb_readbyte()
394 		DELAY((sc->udelay + 1) / 2);  in iicbb_readbyte()
397 		DELAY((sc->udelay + 1) / 2);  in iicbb_readbyte()
402 	 * Send master->slave ACK (low) for more data,  in iicbb_readbyte()
406 	I2C_DEBUG(printf("r%02x%c ", *data, last ? '-' : '+'));  in iicbb_readbyte()
443 		/* SDA will go low in the middle of the SCL high phase. */  in iicbb_start_impl()
444 		DELAY((sc->udelay + 1) / 2);  in iicbb_start_impl()
456 	/* Start: SDA high->low. */  in iicbb_start_impl()
460 	DELAY((sc->udelay + 1) / 2);  in iicbb_start_impl()
462 	/* Pull SCL low to keep the bus reserved. */  in iicbb_start_impl()
497 	 * Stop: SDA goes from low to high in the middle of the SCL high phase.  in iicbb_stop()
502 	DELAY((sc->udelay + 1) / 2);  in iicbb_stop()
504 	DELAY((sc->udelay + 1) / 2);  in iicbb_stop()
527 		len--;  in iicbb_write()
548 		len--;  in iicbb_read()
577 	 * udelay is half a period, the clock is held high or low for this long.  in iicbb_set_speed()
579 	busfreq = IICBUS_GET_FREQUENCY(sc->iicbus, speed);  in iicbb_set_speed()
580 	period = 1000000 / 2 / busfreq;	/* Hz -> uS */  in iicbb_set_speed()
581 	period -= sc->io_latency;  in iicbb_set_speed()
582 	sc->udelay = MAX(period, 1);  in iicbb_set_speed()