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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmotorcomm,yt8xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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H A Dqca,ar803x.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heine
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3328-orangepi-r1-plus-lts.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com>
9 /dts-v1/;
10 #include "rk3328-orangepi-r1-plu
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H A Drk3328-nanopi-r2c.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com>
9 /dts-v1/;
10 #include "rk3328-nanopi-r2s.dts"
14 compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328";
18 phy-handle = <&yt8521s>;
23 /delete-node/ ethernet-phy@1;
25 yt8521s: ethernet-phy@3 {
26 compatible = "ethernet-phy-ieee802.3-c22";
29 motorcomm,clk-out-frequency-hz = <125000000>;
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1028a-kontron-sl28-var4.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
12 /dts-v1/;
13 #include "fsl-ls1028a-kontron-sl28.dts"
14 #include <dt-bindings/net/qca-ar803
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H A Dfsl-ls1028a-kontron-sl28-var1.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
15 /dts-v1/;
16 #include "fsl-ls1028a-kontron-sl28.dts"
17 #include <dt-bindings/net/qca-ar803
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H A Dimx8mp-data-modul-edm-sbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/net/qca-ar803x.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 compatible = "dmo,imx8mp-data-modul-edm-sbc", "fsl,imx8mp";
22 stdout-path = &uart3;
32 compatible = "pwm-backlight";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_panel_backlight>;
35 brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
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H A Dimx8mm-data-modul-edm-sbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/net/qca-ar803x.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 compatible = "dmo,imx8mm-data-modul-edm-sbc", "fsl,imx8mm";
22 stdout-path = &uart3;
32 compatible = "pwm-backlight";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_panel_backlight>;
35 brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
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/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Dqca8k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/arm/conf/
H A Dstd.armv719 options UFS_GJOURNAL # Enable gjournal-based UFS journaling
27 options PSEUDOFS # Pseudo-filesystem framework
33 options COMPAT_43 # Compatible with BSD 4.3 [KEEP THIS!]
37 options SYSVSHM # SYSV-style shared memory
38 options SYSVMSG # SYSV-style message queues
39 options SYSVSEM # SYSV-style semaphores
40 options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions
58 options DDB_CTF # all architectures - kernel ELF linker loads CTF data
62 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
71 # Optional extras, never enabled b
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/freebsd/contrib/ntp/ntpd/
H A Drefclock_irig.c2 * refclock_irig - audio IRIG-B/E demodulator/decoder
26 * Audio IRIG-B/E demodulator/decoder
29 * IRIG-B/E signals commonly produced by GPS receivers and other timing
30 * devices. The IRIG signal is an amplitude-modulated carrier with
31 * pulse-width modulated data bits. For IRIG-B, the carrier frequency is
32 * 1000 Hz and bit rate 100 b/s; for IRIG-E, the carrier frequenchy is
37 * kHz and mu-law companding. This is the same standard as used by the
43 * The program processes 8000-H
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/freebsd/sys/arm/freescale/imx/
H A Dimx6_anatop.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
32 * Analog PLL and power regulator driver for Freescale i.MX6 family of SoCs.
34 * kitchen-sinked this device, not us. :)
46 * source describing i.MX6 SoCs, and in the linux and u-boot code which comes
52 * are deci-Celsius, which are converted to/from deci-Kelvins in the sysctl
81 { -1, 0 }
136 * value (0-3) from the ocotp CFG3 register into a mhz value that can be looked
141 #define TZ_ZEROC 2731 /* deci-Kelvin <-> deci-Celsius offset. */
149 return (bus_read_4(imx6_anatop_sc->res[MEMRES], offset)); in imx6_anatop_read_4()
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
14 #include "sdm845-wcd9340.dtsi"
21 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>;
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H A Dsm8550-samsung-q5q.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 /delete-node/ &adspslpi_mem;
18 /delete-node/ &cdsp_mem;
19 /delete-node/ &mpss_dsm_mem;
20 /delete-node/ &mpss_mem;
21 /delete-node/ &rmtfs_mem;
26 chassis-type = "handset";
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra124-nyan.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
14 stdout-path = "serial0:115200n8";
20 * missing a unit-address. However, the bootloader on these Chromebook
22 * Adding the unit-address causes the bootloader to create a /memory
34 /delete-node/ memory@80000000;
40 vdd-supply = <&vdd_3v3_hdmi>;
41 pll-supply = <&vdd_hdmi_pll>;
42 hdmi-supply = <&vdd_5v0_hdmi>;
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/freebsd/sys/kern/
H A Dkern_ntptime.c1 /*-
4 * Copyright (c) David L. Mills 1993-2001 *
22 * Poul-Henning Kamp <phk@FreeBSD.org>.
53 FEATURE(pps_sync, "Support usage of external PPS signal by kernel PLL");
57 * Single-precision macros for 64-bit machines
61 #define L_SUB(v, u) ((v) -= (u))
63 #define L_NEG(v) ((v) = -(v))
67 (v) = -(-(v) >> (n)); \
77 ((v) = -((int64_t)(-(a)) << 32)); \
81 #define L_GINT(v) ((v) < 0 ? -(-(v) >> 32) : (v) >> 32)
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/freebsd/sys/dev/bhnd/cores/chipc/
H A Dchipcreg.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 2010-2015 Broadcom Corporation
10 * distributed with the Asus RT-N16 firmware source code release.
77 /* siba backplane configuration broadcast (siba-only) */
81 #define CHIPC_GPIOPU 0x58 /**< pull-up mask (rev >= 20) */
97 #define CHIPC_GPIOTIMERVAL 0x88 /**< gpio-based LED duty cycle (rev >= 16) */
100 /* clock control registers (non-PMU devices) */
111 /* pll/slowclk clock control registers (rev >= 4) */
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/freebsd/contrib/ntp/html/drivers/
H A Ddriver6.html1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
13 <!-- #BeginDate format:En2m -->17-Jul-2014 02:17<!-- #EndDate -->
22 …-Range Instrumentation Group (IRIG) standard time distribution signal. This signal is generated by…
23 <p>The driver requires an audio codec or sound card with sampling rate 8 kHz and &mu;-law compandin…
24 …d 50 Ohms. In such cases the cable should be terminated at the line-in port with a 50-Ohm resistor…
25 … to the PPS&nbsp;signal from a GPS&nbsp;receiver, the mean offset with a 2.4-GHz P4 running FreeBS…
26 …. The Sun kernel driver has a sawtooth modulation with amplitude over 5 ms P-P and period 5.5 s. T…
30 …-modulated carrier with pulse-width modulated data bits. For IRIG-B, the carrier frequency is 1000…
31 …-Hz &mu;-law companded samples using separate signal filters for IRIG-B and IRIG-E, a comb filter,…
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/freebsd/sys/dev/hifn/
H A Dhifn7751.c3 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
9 * Copyright (c) 2000-2001 Network Security Technologies, Inc.
14 * requested: Please send any comments, feedback, bug-fixes, or feature
42 * Materiel Command, USAF, under agreement number F30602-01-2-0537.
171 u_int32_t v = bus_space_read_4(sc->sc_st0, sc->sc_sh0, reg); in READ_REG_0()
172 sc->sc_bar0_lastreg = (bus_size_t) -1; in READ_REG_0()
180 u_int32_t v = bus_space_read_4(sc->sc_st1, sc->sc_sh1, reg); in READ_REG_1()
181 sc->sc_bar1_lastreg = (bus_size_t) -1; in READ_REG_1()
229 *paddr = segs->ds_addr; in hifn_dmamap_cb()
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_reset.c121 ahp->ah_hwp = HAL_TRUE_CHIP; in ar9300_attach_hw_platform()
196 * Mask used to construct AAD for CCMP-AES in ar9300_init_mfp()
197 * Cisco spec defined bits 0-3 as mask in ar9300_init_mfp()
226 centers->ctl_center = centers->ext_center = in ar9300_get_channel_centers()
227 centers->synth_center = ichan->channel; in ar9300_get_channel_centers()
238 centers->synth_center = ichan->channel + HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
241 centers->synth_center = ichan->channel - HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
242 extoff = -1; in ar9300_get_channel_centers()
245 centers->ctl_center = in ar9300_get_channel_centers()
246 centers->synth_center - (extoff * HT40_CHANNEL_CENTER_SHIFT); in ar9300_get_channel_centers()
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H A Dar9300_power.c30 ahp->ah_mcast_filter_l32_set = 0; in ar9300_wowoffload_prep()
31 ahp->ah_mcast_filter_u32_set = 0; in ar9300_wowoffload_prep()
39 if (ahp->ah_mcast_filter_l32_set != 0) { in ar9300_wowoffload_post()
41 val &= ~ahp->ah_mcast_filter_l32_set; in ar9300_wowoffload_post()
44 if (ahp->ah_mcast_filter_u32_set != 0) { in ar9300_wowoffload_post()
46 val &= ~ahp->ah_mcast_filter_u32_set; in ar9300_wowoffload_post()
50 ahp->ah_mcast_filter_l32_set = 0; in ar9300_wowoffload_post()
51 ahp->ah_mcast_filter_u32_set = 0; in ar9300_wowoffload_post()
72 ahp->ah_mcast_filter_u32_set |= (1 << pos); in ar9300_wowoffload_add_mcast_filter()
74 ahp->ah_mcast_filter_l32_set |= (1 << pos); in ar9300_wowoffload_add_mcast_filter()
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/freebsd/contrib/ntp/include/
H A Dntpd.h2 * ntpd.h - Prototypes and external variables for ntpd.
24 * ---------
341 int enabled; global() member
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/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_reset.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
33 (AH_PRIVATE(_ah)->ah_eeversion & AR5416_EEP_VER_MINOR_MASK)
122 HALASSERT(AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER14_1); in ar5416Reset()
144 * Don't do this for the AR9285 - it breaks RX for single in ar5416Reset()
173 (ah->ah_config.ah_force_full_reset)) in ar5416Reset()
192 AH5416(ah)->ah_writeIni(ah, chan); in ar5416Reset()
230 * This routine swaps the analog chains - it should be done in ar5416Reset()
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/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212_reset.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
78 #define V(r, c) (ia)->data[((r)*(ia)->cols) + (c)] in write_common()
82 for (r = 0; r < ia->rows; r++) { in write_common()
141 HALASSERT(ah->ah_magic == AR5212_MAGIC); in ar5212Reset()
142 ee = AH_PRIVATE(ah)->ah_eeprom; in ar5212Reset()
171 HALASSERT(AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER3); in ar5212Reset()
188 * only) - the best and most general fix for this situation in ar5212Reset()
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/freebsd/sys/dev/bhnd/
H A Dbhnd_ids.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 1999-2015, Broadcom Corporation
9 * with the dd-wrt project, and the hndsoc.h header distributed with Broadcom's
30 * JEDEC JEP-106 Core Vendor IDs
32 * These are the JEDEC JEP-106 manufacturer ID representions (with ARM's
33 * non-standard 4-bit continutation code), as used in ARM's PrimeCell
38 * will need to convert bus-specific vendor IDs to their BHND_MFGID
39 * JEP-106 equivalents.
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