sys: Remove $FreeBSD$: two-line .h pattern

Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

bhnd: clean up empty lines in .c and .h files

bwn(4): migrate bwn(4) to the native bhnd(9) interface, and drop siba_bwn.

- Remove the shim interface that allowed bwn(4) to use either siba_bwn or
bhnd(4), replacing all siba_bwn calls with thei

bwn(4): migrate bwn(4) to the native bhnd(9) interface, and drop siba_bwn.

- Remove the shim interface that allowed bwn(4) to use either siba_bwn or
bhnd(4), replacing all siba_bwn calls with their bhnd(4) bus equivalents.
- Drop the legay, now-unused siba_bwn bus driver.
- Clean up bhnd(4) board flag defines referenced by bwn(4).

Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D13518

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bhnd/bwn(4): Define a bhnd(4) softmodem device class for the v.90 modem
codec core, and mark the core as unpopulated on all BCM4306 bwn(4) devices.

Sponsored by: The FreeBSD Foundation

SPDX: license IDs for some ISC-related files.

Merge ^/head r325999 through r326131.

bhnd(4): implement MIPS and PCI(e) interrupt support

On BHND MIPS SoCs, this replaces the use of hard-coded MIPS IRQ#s in the
common bhnd(4) core drivers; we now register an INTRNG child PIC that
ha

bhnd(4): implement MIPS and PCI(e) interrupt support

On BHND MIPS SoCs, this replaces the use of hard-coded MIPS IRQ#s in the
common bhnd(4) core drivers; we now register an INTRNG child PIC that
handles routing of backplane interrupt vectors via the MIPS core.

On BHND PCI devices, backplane interrupt vectors are now routed to the
PCI/PCIe host bridge core when bus_setup_intr() is called, where they are
dispatched by the PCI core via a host interrupt (e.g. INTx/MSI).

The bhndb(4) bridge driver tracks registered interrupt handlers for the
bridged bhnd(4) devices and manages backplane interrupt routing, while
delegating actual bus interrupt setup/teardown to the parent bus on behalf
of the bridged cores.

Approved by: adrian (mentor, implicit)
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D12518

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MFhead @ r305013

Merge ^/head r304700 through r304884.

bhnd(4): Initial PMU/PWRCTL power and clock management support.


- Added bhnd_pmu driver implementations for PMU and PWRCTL chipsets,
derived from Broadcom's ISC-licensed HND code.
- Added bhnd bu

bhnd(4): Initial PMU/PWRCTL power and clock management support.


- Added bhnd_pmu driver implementations for PMU and PWRCTL chipsets,
derived from Broadcom's ISC-licensed HND code.
- Added bhnd bus-level support for routing per-core clock and resource
power requests to the PMU device.
- Lift ChipCommon support out into the bhnd module, dropping
bhnd_chipc.

Reviewed by: mizhka
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7492

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[mips/broadcom] Generic platform_reset() support.

This adds support for performing platform_reset() on all supported
devices, using early boot enumeration of chipc capabilities and
available cores.

[mips/broadcom] Generic platform_reset() support.

This adds support for performing platform_reset() on all supported
devices, using early boot enumeration of chipc capabilities and
available cores.


- Added Broadcom-specific MIPS CP0 register definitions used by
BCM4785-specific reset handling.
- Added a bcm_platform structure for tracking chipc/pmu/cfe platform
data.
- Extended the BCMA EROM API to support early boot lookup of core info
(including port/region mappings).
- Extended platform_reset() to support PMU, PMU+AOB, and non-PMU
devices.

Reviewed by: mizhka
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7539

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[bhnd] Finish bhnd(4) PCI/PCIe-G1 hostb support.

Now that we've got access to SPROM and can access board identification,
this implements all known remaining hardware work-arounds for the bhnd(4)
PCI

[bhnd] Finish bhnd(4) PCI/PCIe-G1 hostb support.

Now that we've got access to SPROM and can access board identification,
this implements all known remaining hardware work-arounds for the bhnd(4)
PCI and PCIe-G1 cores operating endpoint mode.

Additionally, this adds an initial set of skeleton PCIe-G2 hostb and pcib
drivers, required by fullmac and newer softmac devices.

Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D6377

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[bhnd] Centralize fetching of board information

Centralizes fetching of board information (vendor, type, revision, etc),
and adds support for matching quirks against board identification info.

* Ad

[bhnd] Centralize fetching of board information

Centralizes fetching of board information (vendor, type, revision, etc),
and adds support for matching quirks against board identification info.

* Adds a BHND_BUS_READ_BOARD_INFO(), allowing bhnd bus/bus parent(s) to
handle implementation-specific fetching of board info.
* Integrates board type constants from the latest Broadcom ISC-licensed
bcmdevs.h included in dd-wrt's Broadcom driver source drops.
* Adds support for matching on chip/board quirks to bhnd_device_quirks()/
bhnd_chip_quirks().
* Use the new board/chip quirk matching to match Apple devices that failed
to set BFL2_PCIEWAR_OVR in SROM.

Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D6361

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[bhnd] Initial bhnd(4) SPROM/NVRAM support.

This adds support for the NVRAM handling and the basic SPROM
hardware used on siba(4) and bcma(4) devices, including:

* SPROM directly attached to the PC

[bhnd] Initial bhnd(4) SPROM/NVRAM support.

This adds support for the NVRAM handling and the basic SPROM
hardware used on siba(4) and bcma(4) devices, including:

* SPROM directly attached to the PCI core, accessible via PCI configuration
space.
* SPROM attached to later ChipCommon cores.
* SPROM variables vended from the parent SoC bus (e.g. via a directly-attached
flash device).

Additional improvements to the NVRAM/SPROM interface will
be required, but this changeset stands alone as working
checkpoint.

Submitted by: Landon Fuller <landonf@landonf.org>
Reviewed by: Michael Zhilin <mizkha@gmail.com> (Broadcom MIPS support)
Differential Revision: https://reviews.freebsd.org/D6196

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sys/dev: minor spelling fixes.

Most affect comments, very few have user-visible effects.

Merge ^/head r296007 through r296368.

MFH

Sponsored by: The FreeBSD Foundation

Bring over the initial rewrite of the broadcom bus support found in their
SoCs and various chips (including, famously, their wifi chips.)

This is "just" (all 20,000 lines of it) code to enumerate th

Bring over the initial rewrite of the broadcom bus support found in their
SoCs and various chips (including, famously, their wifi chips.)

This is "just" (all 20,000 lines of it) code to enumerate the various
versions of busses inside these devices, including the PCI bridge and
the direct SIBA bridge found in MIPS chips.

It also includes shared code for some bus operations (suspend, resume, etc);
EEPROM/SROM/etc parsing and other things that are shared between chips.

Eventually this'll replace the code that bwi/bwn uses for the internal
bus, as well as some apparently upcoming mips74k broadcom SoC support
which uses bwn!

Thanks to Landon Fuller <landonf@landonf.org> for all this work!

Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT

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